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authorPeter Rosin <peda@axentia.se>2016-11-24 21:45:18 +0100
committerLinus Walleij <linus.walleij@linaro.org>2016-11-25 14:40:06 +0100
commit1663682cf090b94bd8531a0b9be812e10477143f (patch)
tree7ff34bba9d58b9fdbac741fd5564a3f3c8859b99 /drivers/pinctrl
parent8f5983ad6b81070376db9487ce81000c85a16027 (diff)
pinctrl: sx150x: use correct registers for reg_sense (sx1502 and sx1508)
All other registers on these chips are 8-bit, but reg_sense is 16-bits and therefore needs to be moved down one notch. This was apparently overlooked in the conversion to regmap, which only updated the register locations for the 16-bit chips. Fixes: 6489677f86c3 ("pinctrl-sx150x: Replace sx150x_*_cfg by means of regmap API") Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r--drivers/pinctrl/pinctrl-sx150x.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/pinctrl/pinctrl-sx150x.c b/drivers/pinctrl/pinctrl-sx150x.c
index f9e559e22537..a19c814843aa 100644
--- a/drivers/pinctrl/pinctrl-sx150x.c
+++ b/drivers/pinctrl/pinctrl-sx150x.c
@@ -156,7 +156,7 @@ static const struct sx150x_device_data sx1508q_device_data = {
.reg_data = 0x08,
.reg_irq_mask = 0x09,
.reg_irq_src = 0x0c,
- .reg_sense = 0x0b,
+ .reg_sense = 0x0a,
.pri.x789 = {
.reg_drain = 0x05,
.reg_polarity = 0x06,
@@ -221,7 +221,7 @@ static const struct sx150x_device_data sx1502q_device_data = {
.reg_data = 0x00,
.reg_irq_mask = 0x05,
.reg_irq_src = 0x08,
- .reg_sense = 0x07,
+ .reg_sense = 0x06,
.pri.x123 = {
.reg_pld_mode = 0x10,
.reg_pld_table0 = 0x11,