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authorJohn Crispin <blogic@openwrt.org>2013-02-01 13:05:01 +0100
committerLinus Walleij <linus.walleij@linaro.org>2013-02-05 16:17:24 +0100
commit41228b7b336e4445f7a908bc2834cd4ef31d195f (patch)
tree973d54722b29e2c9295a52f2a4cce7fdcb7518a3 /drivers/pinctrl
parenta8ae367f40867fde80c90484c90b96c3968c224b (diff)
pinctrl/lantiq: one of the boot leds was defined incorrectly
On the Falcon SoC the bootleds are located on pins 9->14. Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r--drivers/pinctrl/pinctrl-falcon.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pinctrl/pinctrl-falcon.c b/drivers/pinctrl/pinctrl-falcon.c
index 6331c5c25dbb..249a405fb80b 100644
--- a/drivers/pinctrl/pinctrl-falcon.c
+++ b/drivers/pinctrl/pinctrl-falcon.c
@@ -170,7 +170,7 @@ static const unsigned pins_ntr[] = {GPIO4};
static const unsigned pins_ntr8k[] = {GPIO5};
static const unsigned pins_hrst[] = {GPIO6};
static const unsigned pins_mdio[] = {GPIO7, GPIO8};
-static const unsigned pins_bled[] = {GPIO7, GPIO10, GPIO11,
+static const unsigned pins_bled[] = {GPIO9, GPIO10, GPIO11,
GPIO12, GPIO13, GPIO14};
static const unsigned pins_asc0[] = {GPIO32, GPIO33};
static const unsigned pins_spi[] = {GPIO34, GPIO35, GPIO36};