diff options
author | Jens Axboe <axboe@kernel.dk> | 2018-02-07 15:54:20 -0700 |
---|---|---|
committer | Jens Axboe <axboe@kernel.dk> | 2018-02-07 15:54:20 -0700 |
commit | 61a695184fcc8f225327206b88320279dd8684af (patch) | |
tree | 6cbda2b0e7de94ebad95072d17cc0aa82c9d8ab3 /drivers/platform/x86/intel_pmc_core.h | |
parent | 9e05c864993c5442227f83ae1694a737d7a102ed (diff) | |
parent | 581e400ff935d34d95811258586128bf11baef15 (diff) |
Merge branch 'master' into test
* master: (1190 commits)
ASoC: stm32: add of dependency for stm32 drivers
ASoC: mt8173-rt5650: fix child-node lookup
ASoC: dapm: fix debugfs read using path->connected
platform/x86: samsung-laptop: Re-use DEFINE_SHOW_ATTRIBUTE() macro
platform/x86: ideapad-laptop: Re-use DEFINE_SHOW_ATTRIBUTE() macro
platform/x86: dell-laptop: Re-use DEFINE_SHOW_ATTRIBUTE() macro
seq_file: Introduce DEFINE_SHOW_ATTRIBUTE() helper macro
Documentation/sysctl/user.txt: fix typo
MAINTAINERS: update ARM/QUALCOMM SUPPORT patterns
MAINTAINERS: update various PALM patterns
MAINTAINERS: update "ARM/OXNAS platform support" patterns
MAINTAINERS: update Cortina/Gemini patterns
MAINTAINERS: remove ARM/CLKDEV SUPPORT file pattern
MAINTAINERS: remove ANDROID ION pattern
mm: docs: add blank lines to silence sphinx "Unexpected indentation" errors
mm: docs: fix parameter names mismatch
mm: docs: fixup punctuation
pipe: read buffer limits atomically
pipe: simplify round_pipe_size()
pipe: reject F_SETPIPE_SZ with size over UINT_MAX
...
Diffstat (limited to 'drivers/platform/x86/intel_pmc_core.h')
-rw-r--r-- | drivers/platform/x86/intel_pmc_core.h | 29 |
1 files changed, 20 insertions, 9 deletions
diff --git a/drivers/platform/x86/intel_pmc_core.h b/drivers/platform/x86/intel_pmc_core.h index 3d225a9cc09f..5fa5f97870aa 100644 --- a/drivers/platform/x86/intel_pmc_core.h +++ b/drivers/platform/x86/intel_pmc_core.h @@ -21,9 +21,10 @@ #ifndef PMC_CORE_H #define PMC_CORE_H +#define PMC_BASE_ADDR_DEFAULT 0xFE000000 + /* Sunrise Point Power Management Controller PCI Device ID */ #define SPT_PMC_PCI_DEVICE_ID 0x9d21 - #define SPT_PMC_BASE_ADDR_OFFSET 0x48 #define SPT_PMC_SLP_S0_RES_COUNTER_OFFSET 0x13c #define SPT_PMC_PM_CFG_OFFSET 0x18 @@ -122,6 +123,17 @@ enum ppfear_regs { #define SPT_PMC_BIT_MPHY_CMN_LANE2 BIT(2) #define SPT_PMC_BIT_MPHY_CMN_LANE3 BIT(3) +/* Cannonlake Power Management Controller register offsets */ +#define CNP_PMC_SLP_S0_RES_COUNTER_OFFSET 0x193C +#define CNP_PMC_LTR_IGNORE_OFFSET 0x1B0C +#define CNP_PMC_PM_CFG_OFFSET 0x1818 +/* Cannonlake: PGD PFET Enable Ack Status Register(s) start */ +#define CNP_PMC_HOST_PPFEAR0A 0x1D90 + +#define CNP_PMC_MMIO_REG_LEN 0x2000 +#define CNP_PPFEAR_NUM_ENTRIES 8 +#define CNP_PMC_READ_DISABLE_BIT 22 + struct pmc_bit_map { const char *name; u32 bit_mask; @@ -135,7 +147,6 @@ struct pmc_bit_map { * @pll_sts: Maps name of PLL to corresponding bit status * @slp_s0_offset: PWRMBASE offset to read SLP_S0 residency * @ltr_ignore_offset: PWRMBASE offset to read/write LTR ignore bit - * @base_address: Base address of PWRMBASE defined in BIOS writer guide * @regmap_length: Length of memory to map from PWRMBASE address to access * @ppfear0_offset: PWRMBASE offset to to read PPFEAR* * @ppfear_buckets: Number of 8 bits blocks to read all IP blocks from @@ -152,7 +163,6 @@ struct pmc_reg_map { const struct pmc_bit_map *pll_sts; const u32 slp_s0_offset; const u32 ltr_ignore_offset; - const u32 base_address; const int regmap_length; const u32 ppfear0_offset; const int ppfear_buckets; @@ -162,12 +172,14 @@ struct pmc_reg_map { /** * struct pmc_dev - pmc device structure - * @base_addr: comtains pmc base address + * @base_addr: contains pmc base address * @regbase: pointer to io-remapped memory location - * @dbgfs_dir: path to debug fs interface - * @feature_available: flag to indicate whether - * the feature is available - * on a particular platform or not. + * @map: pointer to pmc_reg_map struct that contains platform + * specific attributes + * @dbgfs_dir: path to debugfs interface + * @pmc_xram_read_bit: flag to indicate whether PMC XRAM shadow registers + * used to read MPHY PG and PLL status are available + * @mutex_lock: mutex to complete one transcation * * pmc_dev contains info about power management controller device. */ @@ -178,7 +190,6 @@ struct pmc_dev { #if IS_ENABLED(CONFIG_DEBUG_FS) struct dentry *dbgfs_dir; #endif /* CONFIG_DEBUG_FS */ - bool has_slp_s0_res; int pmc_xram_read_bit; struct mutex lock; /* generic mutex lock for PMC Core */ }; |