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authorNicolas Ferre <nicolas.ferre@microchip.com>2020-07-20 10:56:52 +0200
committerDavid S. Miller <davem@davemloft.net>2020-07-20 17:01:45 -0700
commit558e35ccfe9516c8786c3dd3b8a486fb37e6b858 (patch)
treead57b6e3cd041f0ac2345f04f5c6fa3538844ecb /drivers/pwm/pwm-atmel.c
parenta8b7b2d0b3fc965d823e362840e5451e2eb4a71b (diff)
net: macb: WoL support for GEM type of Ethernet controller
Adapt the Wake-on-Lan feature to the Cadence GEM Ethernet controller. This controller has different register layout and cannot be handled by previous code. We disable completely interrupts on all the queues but the queue 0. Handling of WoL interrupt is done in another interrupt handler positioned depending on the controller version used, just between suspend() and resume() calls. It allows to lower pressure on the generic interrupt hot path by removing the need to handle 2 tests for each IRQ: the first figuring out the controller revision, the second for actually knowing if the WoL bit is set. Queue management in suspend()/resume() functions inspired from RFC patch by Harini Katakam <harinik@xilinx.com>, thanks! Cc: Claudiu Beznea <claudiu.beznea@microchip.com> Cc: Harini Katakam <harini.katakam@xilinx.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/pwm/pwm-atmel.c')
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