diff options
| author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2021-05-10 16:06:40 +0200 |
|---|---|---|
| committer | Thierry Reding <thierry.reding@gmail.com> | 2021-05-25 18:19:15 +0200 |
| commit | e9fdf122cf3442573d811c0cb664d6b5c30b7780 (patch) | |
| tree | 613649f025aa137c413777da9ae637331c9070c0 /drivers/pwm/pwm-lpc18xx-sct.c | |
| parent | 69230cfac3d02c1b8d78aa7bdb29a1710147d49b (diff) | |
pwm: Simplify all drivers with explicit of_pwm_n_cells = 3
With the previous commit there is no need for the lowlevel driver any
more to specify it it uses two or three cells. So simplify accordingly.
The only non-trival change affects the pwm-rockchip driver: It used to only
support three cells if the hardware supports polarity. Now the default
number depends on the device tree which has to match hardware anyhow
(and if it doesn't the error is just a bit delayed as a PWM handle with
an inverted setting is catched when pwm_apply_state() is called).
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'drivers/pwm/pwm-lpc18xx-sct.c')
| -rw-r--r-- | drivers/pwm/pwm-lpc18xx-sct.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/pwm/pwm-lpc18xx-sct.c b/drivers/pwm/pwm-lpc18xx-sct.c index b643ac61a2e7..8e461f3baa05 100644 --- a/drivers/pwm/pwm-lpc18xx-sct.c +++ b/drivers/pwm/pwm-lpc18xx-sct.c @@ -371,8 +371,6 @@ static int lpc18xx_pwm_probe(struct platform_device *pdev) lpc18xx_pwm->chip.dev = &pdev->dev; lpc18xx_pwm->chip.ops = &lpc18xx_pwm_ops; lpc18xx_pwm->chip.npwm = 16; - lpc18xx_pwm->chip.of_xlate = of_pwm_xlate_with_flags; - lpc18xx_pwm->chip.of_pwm_n_cells = 3; /* SCT counter must be in unify (32 bit) mode */ lpc18xx_pwm_writel(lpc18xx_pwm, LPC18XX_PWM_CONFIG, |