diff options
| author | Qin Jian <qinjian@cqplus1.com> | 2022-06-28 14:26:43 +0800 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2022-07-08 14:23:39 +0200 |
| commit | dbf018be52e312bdd7d51d1b944dbdb32ccf8fa4 (patch) | |
| tree | d19e6ad92068b0313e649a362951c05133dba142 /drivers/reset/Kconfig | |
| parent | 55bfc376b8fb421a193fb422ca052235f023161b (diff) | |
reset: Add Sunplus SP7021 reset driver
Add reset driver for Sunplus SP7021 SoC.
Signed-off-by: Qin Jian <qinjian@cqplus1.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'drivers/reset/Kconfig')
| -rw-r--r-- | drivers/reset/Kconfig | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 93c8d07ee328..48d94649ea82 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -231,6 +231,15 @@ config RESET_STARFIVE_JH7100 help This enables the reset controller driver for the StarFive JH7100 SoC. +config RESET_SUNPLUS + bool "Sunplus SoCs Reset Driver" if COMPILE_TEST + default ARCH_SUNPLUS + help + This enables the reset driver support for Sunplus SoCs. + The reset lines that can be asserted and deasserted by toggling bits + in a contiguous, exclusive register space. The register is HIWORD_MASKED, + which means each register holds 16 reset lines. + config RESET_SUNXI bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI default ARCH_SUNXI |