diff options
| author | Sumit Saxena <sumit.saxena@avagotech.com> | 2016-01-28 21:04:28 +0530 |
|---|---|---|
| committer | Martin K. Petersen <martin.petersen@oracle.com> | 2016-02-23 21:27:02 -0500 |
| commit | 179ac14291a0e1cf8c2b2dfedce7c5af66696cc9 (patch) | |
| tree | 3c682b3d9639a17d03b6970a107078c9b43d75fa /drivers/scsi/megaraid/megaraid_sas_fusion.h | |
| parent | 8f05024cd3dbd3ec85923f3e8da05bf6db187d57 (diff) | |
megaraid_sas: Reply Descriptor Post Queue (RDPQ) support
This patch will create a reply queue pool for each MSI-X index and will
provide an array of base addresses instead of the single address of
legacy mode. Using this new interface the driver can support higher
queue depths through scattered DMA pools.
If array mode is not supported driver will fall back to the legacy
method of reply pool allocation. This limits controller queue depth to
1K max. To enable a queue depth of more than 1K driver requires firmware
to support array mode and scratch_pad3 will provide the new queue depth
value.
When RDPQ is used, downgrading to an older firmware release should not
be permitted. This may cause firmware fault and is not supported.
Signed-off-by: Kashyap Desai <kashyap.desai@avagotech.com>
Signed-off-by: Sumit Saxena <sumit.saxena@avagotech.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Diffstat (limited to 'drivers/scsi/megaraid/megaraid_sas_fusion.h')
| -rw-r--r-- | drivers/scsi/megaraid/megaraid_sas_fusion.h | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/drivers/scsi/megaraid/megaraid_sas_fusion.h b/drivers/scsi/megaraid/megaraid_sas_fusion.h index db0978d0fc88..80eaee22f5bc 100644 --- a/drivers/scsi/megaraid/megaraid_sas_fusion.h +++ b/drivers/scsi/megaraid/megaraid_sas_fusion.h @@ -928,6 +928,12 @@ struct MR_PD_CFG_SEQ_NUM_SYNC { struct MR_PD_CFG_SEQ seq[1]; } __packed; +struct MPI2_IOC_INIT_RDPQ_ARRAY_ENTRY { + u64 RDPQBaseAddress; + u32 Reserved1; + u32 Reserved2; +}; + struct fusion_context { struct megasas_cmd_fusion **cmd_list; dma_addr_t req_frames_desc_phys; @@ -940,8 +946,8 @@ struct fusion_context { struct dma_pool *sg_dma_pool; struct dma_pool *sense_dma_pool; - dma_addr_t reply_frames_desc_phys; - union MPI2_REPLY_DESCRIPTORS_UNION *reply_frames_desc; + dma_addr_t reply_frames_desc_phys[MAX_MSIX_QUEUES_FUSION]; + union MPI2_REPLY_DESCRIPTORS_UNION *reply_frames_desc[MAX_MSIX_QUEUES_FUSION]; struct dma_pool *reply_frames_desc_pool; u16 last_reply_idx[MAX_MSIX_QUEUES_FUSION]; @@ -951,6 +957,8 @@ struct fusion_context { u32 reply_alloc_sz; u32 io_frames_alloc_sz; + struct MPI2_IOC_INIT_RDPQ_ARRAY_ENTRY *rdpq_virt; + dma_addr_t rdpq_phys; u16 max_sge_in_main_msg; u16 max_sge_in_chain; |