diff options
| author | Sumit.Saxena@lsi.com <Sumit.Saxena@lsi.com> | 2013-09-06 15:50:52 +0530 |
|---|---|---|
| committer | James Bottomley <JBottomley@Parallels.com> | 2013-09-10 15:01:26 -0700 |
| commit | 94cd65ddf4d70b1d536178d096eeb4d3bd08272e (patch) | |
| tree | 201f07f90fb07795d9f6d03409a4ee5407600725 /drivers/scsi/megaraid/megaraid_sas_fusion.h | |
| parent | 6f8f8e4d313a47e3f8aa7eeb5201d1b02ffa0951 (diff) | |
[SCSI] megaraid_sas: addded support for big endian architecture
This patch will add big endian architecture support to megaraid_sas
driver. The support added is for LSI MegaRAID all generation controllers-
(3Gb/s, 6Gb/s and 12 Gb/s controllers).
We have done basic sanity test @ppc64 arch and @x86_64. Additional
testing/observations are welcome.
[jejb: fix up rejections]
Signed-off-by: Kashyap Desai <kashyap.desai@lsi.com>
Signed-off-by: Sumit Saxena <sumit.saxena@lsi.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Diffstat (limited to 'drivers/scsi/megaraid/megaraid_sas_fusion.h')
| -rw-r--r-- | drivers/scsi/megaraid/megaraid_sas_fusion.h | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/drivers/scsi/megaraid/megaraid_sas_fusion.h b/drivers/scsi/megaraid/megaraid_sas_fusion.h index 92b4daa172b6..e88d935d5912 100644 --- a/drivers/scsi/megaraid/megaraid_sas_fusion.h +++ b/drivers/scsi/megaraid/megaraid_sas_fusion.h @@ -93,8 +93,13 @@ enum MR_RAID_FLAGS_IO_SUB_TYPE { */ struct RAID_CONTEXT { +#if defined(__BIG_ENDIAN_BITFIELD) + u8 nseg:4; + u8 Type:4; +#else u8 Type:4; u8 nseg:4; +#endif u8 resvd0; u16 timeoutValue; u8 regLockFlags; @@ -298,8 +303,13 @@ struct MPI2_RAID_SCSI_IO_REQUEST { * MPT RAID MFA IO Descriptor. */ struct MEGASAS_RAID_MFA_IO_REQUEST_DESCRIPTOR { +#if defined(__BIG_ENDIAN_BITFIELD) + u32 MessageAddress1:24; /* bits 31:8*/ + u32 RequestFlags:8; +#else u32 RequestFlags:8; u32 MessageAddress1:24; /* bits 31:8*/ +#endif u32 MessageAddress2; /* bits 61:32 */ }; @@ -518,6 +528,19 @@ struct MR_SPAN_BLOCK_INFO { struct MR_LD_RAID { struct { +#if defined(__BIG_ENDIAN_BITFIELD) + u32 reserved4:7; + u32 fpNonRWCapable:1; + u32 fpReadAcrossStripe:1; + u32 fpWriteAcrossStripe:1; + u32 fpReadCapable:1; + u32 fpWriteCapable:1; + u32 encryptionType:8; + u32 pdPiMode:4; + u32 ldPiMode:4; + u32 reserved5:3; + u32 fpCapable:1; +#else u32 fpCapable:1; u32 reserved5:3; u32 ldPiMode:4; @@ -529,6 +552,7 @@ struct MR_LD_RAID { u32 fpReadAcrossStripe:1; u32 fpNonRWCapable:1; u32 reserved4:7; +#endif } capability; u32 reserved6; u64 size; |