diff options
| author | Bart Van Assche <bart.vanassche@wdc.com> | 2018-06-15 14:41:57 -0700 |
|---|---|---|
| committer | Martin K. Petersen <martin.petersen@oracle.com> | 2018-06-19 22:02:25 -0400 |
| commit | 84203b3561726be0e4c4fbb2db90c9d7e6f59314 (patch) | |
| tree | 83054a2d7a78512a98ef75a93e45ca0cd2c5a8c2 /drivers/scsi/mpt3sas | |
| parent | eb0c7af26beb1cf13b30fc51ea05dd1977df2061 (diff) | |
scsi: mpt3sas: Introduce struct mpt3sas_nvme_cmd
Make _base_build_nvme_prp() easier to read by introducing a structure
to access NVMe command fields.
Signed-off-by: Bart Van Assche <bart.vanassche@wdc.com>
Cc: Sathya Prakash <sathya.prakash@broadcom.com>
Cc: Chaitra P B <chaitra.basappa@broadcom.com>
Cc: Suganath Prabu Subramani <suganath-prabu.subramani@broadcom.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Diffstat (limited to 'drivers/scsi/mpt3sas')
| -rw-r--r-- | drivers/scsi/mpt3sas/mpt3sas_base.c | 13 | ||||
| -rw-r--r-- | drivers/scsi/mpt3sas/mpt3sas_base.h | 7 |
2 files changed, 9 insertions, 11 deletions
diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.c b/drivers/scsi/mpt3sas/mpt3sas_base.c index 3bf9ee7d9603..340db9ee090d 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_base.c +++ b/drivers/scsi/mpt3sas/mpt3sas_base.c @@ -1864,6 +1864,8 @@ _base_build_nvme_prp(struct MPT3SAS_ADAPTER *ioc, u16 smid, u32 offset, entry_len; u32 page_mask_result, page_mask; size_t length; + struct mpt3sas_nvme_cmd *nvme_cmd = + (void *)nvme_encap_request->NVMe_Command; /* * Not all commands require a data transfer. If no data, just return @@ -1871,15 +1873,8 @@ _base_build_nvme_prp(struct MPT3SAS_ADAPTER *ioc, u16 smid, */ if (!data_in_sz && !data_out_sz) return; - /* - * Set pointers to PRP1 and PRP2, which are in the NVMe command. - * PRP1 is located at a 24 byte offset from the start of the NVMe - * command. Then set the current PRP entry pointer to PRP1. - */ - prp1_entry = (__le64 *)(nvme_encap_request->NVMe_Command + - NVME_CMD_PRP1_OFFSET); - prp2_entry = (__le64 *)(nvme_encap_request->NVMe_Command + - NVME_CMD_PRP2_OFFSET); + prp1_entry = &nvme_cmd->prp1; + prp2_entry = &nvme_cmd->prp2; prp_entry = prp1_entry; /* * For the PRP entries, use the specially allocated buffer of diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.h b/drivers/scsi/mpt3sas/mpt3sas_base.h index b00670a54106..247a9e6c485c 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_base.h +++ b/drivers/scsi/mpt3sas/mpt3sas_base.h @@ -143,14 +143,17 @@ * NVMe defines */ #define NVME_PRP_SIZE 8 /* PRP size */ -#define NVME_CMD_PRP1_OFFSET 24 /* PRP1 offset in NVMe cmd */ -#define NVME_CMD_PRP2_OFFSET 32 /* PRP2 offset in NVMe cmd */ #define NVME_ERROR_RESPONSE_SIZE 16 /* Max NVME Error Response */ #define NVME_TASK_ABORT_MIN_TIMEOUT 6 #define NVME_TASK_ABORT_MAX_TIMEOUT 60 #define NVME_TASK_MNGT_CUSTOM_MASK (0x0010) #define NVME_PRP_PAGE_SIZE 4096 /* Page size */ +struct mpt3sas_nvme_cmd { + u8 rsvd[24]; + __le64 prp1; + __le64 prp2; +}; /* * reset phases |