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authorSandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com>2018-12-12 11:41:10 +0100
committerAlexandre Belloni <alexandre.belloni@bootlin.com>2018-12-12 11:55:20 +0100
commit446e8986a2417148aed14f362831bf2425d434cb (patch)
treee901caea1686546f9494f73b846110808c481821 /drivers/soc/atmel
parent15653dc850e4bc64dffd9105faab063f81c4b3b2 (diff)
ARM: at91: add support in soc driver for new SAM9X60
Add detection of new SAM9X60 by this soc.c driver. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> [nicolas.ferre@microchip.com: split patch] Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Diffstat (limited to 'drivers/soc/atmel')
-rw-r--r--drivers/soc/atmel/soc.c2
-rw-r--r--drivers/soc/atmel/soc.h3
2 files changed, 5 insertions, 0 deletions
diff --git a/drivers/soc/atmel/soc.c b/drivers/soc/atmel/soc.c
index 2cc272ddf906..096a83cf0caf 100644
--- a/drivers/soc/atmel/soc.c
+++ b/drivers/soc/atmel/soc.c
@@ -66,6 +66,8 @@ static const struct at91_soc __initconst socs[] = {
AT91_SOC(AT91SAM9XE128_CIDR_MATCH, 0, "at91sam9xe128", "at91sam9xe128"),
AT91_SOC(AT91SAM9XE256_CIDR_MATCH, 0, "at91sam9xe256", "at91sam9xe256"),
AT91_SOC(AT91SAM9XE512_CIDR_MATCH, 0, "at91sam9xe512", "at91sam9xe512"),
+ AT91_SOC(SAM9X60_CIDR_MATCH, SAM9X60_EXID_MATCH,
+ "sam9x60", "sam9x60"),
#endif
#ifdef CONFIG_SOC_SAMA5
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D21CU_EXID_MATCH,
diff --git a/drivers/soc/atmel/soc.h b/drivers/soc/atmel/soc.h
index ed89b24ecee1..ee652e4841a5 100644
--- a/drivers/soc/atmel/soc.h
+++ b/drivers/soc/atmel/soc.h
@@ -42,6 +42,7 @@ at91_soc_init(const struct at91_soc *socs);
#define AT91SAM9G45_CIDR_MATCH 0x019b05a0
#define AT91SAM9X5_CIDR_MATCH 0x019a05a0
#define AT91SAM9N12_CIDR_MATCH 0x019a07a0
+#define SAM9X60_CIDR_MATCH 0x019b35a0
#define AT91SAM9M11_EXID_MATCH 0x00000001
#define AT91SAM9M10_EXID_MATCH 0x00000002
@@ -58,6 +59,8 @@ at91_soc_init(const struct at91_soc *socs);
#define AT91SAM9N12_EXID_MATCH 0x00000006
#define AT91SAM9CN11_EXID_MATCH 0x00000009
+#define SAM9X60_EXID_MATCH 0x00000000
+
#define AT91SAM9XE128_CIDR_MATCH 0x329973a0
#define AT91SAM9XE256_CIDR_MATCH 0x329a93a0
#define AT91SAM9XE512_CIDR_MATCH 0x329aa3a0