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authorDavid S. Miller <davem@davemloft.net>2021-10-15 14:32:41 +0100
committerDavid S. Miller <davem@davemloft.net>2021-10-15 14:32:41 +0100
commit295711fa8fec42a55623bf6997d05a21d7855132 (patch)
tree3c0ece069ddb593aae8548e01fb21992a1cdb2c3 /drivers/soc/fsl/dpio/qbman-portal.h
parentf3fafbcbe873cb4bf45d62623bf39897ab5f46b4 (diff)
parentfc398bec03879a7469f0c8e16567698b7d5d814c (diff)
Merge branch 'dpaa2-irq-coalescing'
Ioana Ciornei says: ==================== dpaa2-eth: add support for IRQ coalescing This patch set adds support for interrupts coalescing in dpaa2-eth. The first patches add support for the hardware level configuration of the IRQ coalescing in the dpio driver, while the ones that touch the dpaa2-eth driver are responsible for the ethtool user interraction. With the adaptive IRQ coalescing in place and enabled we have observed the following changes in interrupt rates on one A72 core @2.2GHz (LX2160A) while running a Rx TCP flow. The TCP stream is sent on a 10Gbit link and the only cpu that does Rx is fully utilized. IRQ rate (irqs / sec) before: 4.59 Gbits/sec 24k after: 5.67 Gbits/sec 1.3k ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/soc/fsl/dpio/qbman-portal.h')
-rw-r--r--drivers/soc/fsl/dpio/qbman-portal.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/soc/fsl/dpio/qbman-portal.h b/drivers/soc/fsl/dpio/qbman-portal.h
index c7c2225b7d91..b23883dd2725 100644
--- a/drivers/soc/fsl/dpio/qbman-portal.h
+++ b/drivers/soc/fsl/dpio/qbman-portal.h
@@ -24,6 +24,8 @@ struct qbman_swp_desc {
void *cena_bar; /* Cache-enabled portal base address */
void __iomem *cinh_bar; /* Cache-inhibited portal base address */
u32 qman_version;
+ u32 qman_clk;
+ u32 qman_256_cycles_per_ns;
};
#define QBMAN_SWP_INTERRUPT_EQRI 0x01
@@ -156,6 +158,11 @@ struct qbman_swp {
} eqcr;
spinlock_t access_spinlock;
+
+ /* Interrupt coalescing */
+ u32 irq_threshold;
+ u32 irq_holdoff;
+ int use_adaptive_rx_coalesce;
};
/* Function pointers */
@@ -648,4 +655,10 @@ static inline const struct dpaa2_dq *qbman_swp_dqrr_next(struct qbman_swp *s)
return qbman_swp_dqrr_next_ptr(s);
}
+int qbman_swp_set_irq_coalescing(struct qbman_swp *p, u32 irq_threshold,
+ u32 irq_holdoff);
+
+void qbman_swp_get_irq_coalescing(struct qbman_swp *p, u32 *irq_threshold,
+ u32 *irq_holdoff);
+
#endif /* __FSL_QBMAN_PORTAL_H */