diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2021-04-26 12:11:52 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2021-04-26 12:11:52 -0700 |
commit | 37f00ab4a003f371f81e0eae76cf372f06dec780 (patch) | |
tree | c6217483f22a0fac876f12af53f4b8948200f2fd /drivers/soc/mediatek/mtk-pmic-wrap.c | |
parent | 2b90506a8186df5f7c81ad1ebd250103d8469e27 (diff) | |
parent | 5ffa828534036348fa90fb3079ccc0972d202c4a (diff) |
Merge tag 'arm-drivers-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
"Updates for SoC specific drivers include a few subsystems that have
their own maintainers but send them through the soc tree:
TEE/OP-TEE:
- Add tracepoints around calls to secure world
Memory controller drivers:
- Minor fixes for Renesas, Exynos, Mediatek and Tegra platforms
- Add debug statistics to Tegra20 memory controller
- Update Tegra bindings and convert to dtschema
ARM SCMI Firmware:
- Support for modular SCMI protocols and vendor specific extensions
- New SCMI IIO driver
- Per-cpu DVFS
The other driver changes are all from the platform maintainers
directly and reflect the drivers that don't fit into any other
subsystem as well as treewide changes for a particular platform.
SoCFPGA:
- Various cleanups contributed by Krzysztof Kozlowski
Mediatek:
- add MT8183 support to mutex driver
- MMSYS: use per SoC array to describe the possible routing
- add MMSYS support for MT8183 and MT8167
- add support for PMIC wrapper with integrated arbiter
- add support for MT8192/MT6873
Tegra:
- Bug fixes to PMC and clock drivers
NXP/i.MX:
- Update SCU power domain driver to keep console domain power on.
- Add missing ADC1 power domain to SCU power domain driver.
- Update comments for single global power domain in SCU power domain
driver.
- Add i.MX51/i.MX53 unique id support to i.MX SoC driver.
NXP/FSL SoC driver updates for v5.13
- Add ACPI support for RCPM driver
- Use generic io{read,write} for QE drivers after performance
optimized for PowerPC
- Fix QBMAN probe to cleanup HW states correctly for kexec
- Various cleanup and style fix for QBMAN/QE/GUTS drivers
OMAP:
- Preparation to use devicetree for genpd
- ti-sysc needs iorange check improved when the interconnect target
module has no control registers listed
- ti-sysc needs to probe l4_wkup and l4_cfg interconnects first to
avoid issues with missing resources and unnecessary deferred probe
- ti-sysc debug option can now detect more devices
- ti-sysc now warns if an old incomplete devicetree data is found as
we now rely on it being complete for am3 and 4
- soc init code needs to check for prcm and prm nodes for omap4/5 and
dra7
- omap-prm driver needs to enable autoidle retention support for
omap4
- omap5 clocks are missing gpmc and ocmc clock registers
- pci-dra7xx now needs to use builtin_platform_driver instead of
using builtin_platform_driver_probe for deferred probe to work
Raspberry Pi:
- Fix-up all RPi firmware drivers so as for unbind to happen in an
orderly fashion
- Support for RPi's PoE hat PWM bus
Qualcomm
- Improved detection for SCM calling conventions
- Support for OEM specific wifi firmware path
- Added drivers for SC7280/SM8350: RPMH, LLCC< AOSS QMP"
* tag 'arm-drivers-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (165 commits)
soc: aspeed: fix a ternary sign expansion bug
memory: mtk-smi: Add device-link between smi-larb and smi-common
memory: samsung: exynos5422-dmc: handle clk_set_parent() failure
memory: renesas-rpc-if: fix possible NULL pointer dereference of resource
clk: socfpga: fix iomem pointer cast on 64-bit
soc: aspeed: Adapt to new LPC device tree layout
pinctrl: aspeed-g5: Adapt to new LPC device tree layout
ipmi: kcs: aspeed: Adapt to new LPC DTS layout
ARM: dts: Remove LPC BMC and Host partitions
dt-bindings: aspeed-lpc: Remove LPC partitioning
soc: fsl: enable acpi support in RCPM driver
soc: qcom: mdt_loader: Detect truncated read of segments
soc: qcom: mdt_loader: Validate that p_filesz < p_memsz
soc: qcom: pdr: Fix error return code in pdr_register_listener
firmware: qcom_scm: Fix kernel-doc function names to match
firmware: qcom_scm: Suppress sysfs bind attributes
firmware: qcom_scm: Workaround lack of "is available" call on SC7180
firmware: qcom_scm: Reduce locking section for __get_convention()
firmware: qcom_scm: Make __qcom_scm_is_call_available() return bool
Revert "soc: fsl: qe: introduce qe_io{read,write}* wrappers"
...
Diffstat (limited to 'drivers/soc/mediatek/mtk-pmic-wrap.c')
-rw-r--r-- | drivers/soc/mediatek/mtk-pmic-wrap.c | 97 |
1 files changed, 82 insertions, 15 deletions
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c index 5d34e8b9c988..e4de75f35c33 100644 --- a/drivers/soc/mediatek/mtk-pmic-wrap.c +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c @@ -25,10 +25,12 @@ /* macro for wrapper status */ #define PWRAP_GET_WACS_RDATA(x) (((x) >> 0) & 0x0000ffff) +#define PWRAP_GET_WACS_ARB_FSM(x) (((x) >> 1) & 0x00000007) #define PWRAP_GET_WACS_FSM(x) (((x) >> 16) & 0x00000007) #define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & 0x00000001) -#define PWRAP_STATE_SYNC_IDLE0 (1 << 20) -#define PWRAP_STATE_INIT_DONE0 (1 << 21) +#define PWRAP_STATE_SYNC_IDLE0 BIT(20) +#define PWRAP_STATE_INIT_DONE0 BIT(21) +#define PWRAP_STATE_INIT_DONE1 BIT(15) /* macro for WACS FSM */ #define PWRAP_WACS_FSM_IDLE 0x00 @@ -74,6 +76,7 @@ #define PWRAP_CAP_DCM BIT(2) #define PWRAP_CAP_INT1_EN BIT(3) #define PWRAP_CAP_WDT_SRC1 BIT(4) +#define PWRAP_CAP_ARB BIT(5) /* defines for slave device wrapper registers */ enum dew_regs { @@ -340,6 +343,8 @@ enum pwrap_regs { PWRAP_DCM_DBC_PRD, PWRAP_EINT_STA0_ADR, PWRAP_EINT_STA1_ADR, + PWRAP_SWINF_2_WDATA_31_0, + PWRAP_SWINF_2_RDATA_31_0, /* MT2701 only regs */ PWRAP_ADC_CMD_ADDR, @@ -627,6 +632,17 @@ static int mt6797_regs[] = { [PWRAP_DCM_DBC_PRD] = 0x1D4, }; +static int mt6873_regs[] = { + [PWRAP_INIT_DONE2] = 0x0, + [PWRAP_TIMER_EN] = 0x3E0, + [PWRAP_INT_EN] = 0x448, + [PWRAP_WACS2_CMD] = 0xC80, + [PWRAP_SWINF_2_WDATA_31_0] = 0xC84, + [PWRAP_SWINF_2_RDATA_31_0] = 0xC94, + [PWRAP_WACS2_VLDCLR] = 0xCA4, + [PWRAP_WACS2_RDATA] = 0xCA8, +}; + static int mt7622_regs[] = { [PWRAP_MUX_SEL] = 0x0, [PWRAP_WRAP_EN] = 0x4, @@ -1045,6 +1061,7 @@ enum pwrap_type { PWRAP_MT6765, PWRAP_MT6779, PWRAP_MT6797, + PWRAP_MT6873, PWRAP_MT7622, PWRAP_MT8135, PWRAP_MT8173, @@ -1106,18 +1123,25 @@ static void pwrap_writel(struct pmic_wrapper *wrp, u32 val, enum pwrap_regs reg) writel(val, wrp->base + wrp->master->regs[reg]); } -static bool pwrap_is_fsm_idle(struct pmic_wrapper *wrp) +static u32 pwrap_get_fsm_state(struct pmic_wrapper *wrp) { - u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA); + u32 val; - return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_IDLE; + val = pwrap_readl(wrp, PWRAP_WACS2_RDATA); + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) + return PWRAP_GET_WACS_ARB_FSM(val); + else + return PWRAP_GET_WACS_FSM(val); } -static bool pwrap_is_fsm_vldclr(struct pmic_wrapper *wrp) +static bool pwrap_is_fsm_idle(struct pmic_wrapper *wrp) { - u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA); + return pwrap_get_fsm_state(wrp) == PWRAP_WACS_FSM_IDLE; +} - return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR; +static bool pwrap_is_fsm_vldclr(struct pmic_wrapper *wrp) +{ + return pwrap_get_fsm_state(wrp) == PWRAP_WACS_FSM_WFVLDCLR; } /* @@ -1165,6 +1189,7 @@ static int pwrap_wait_for_state(struct pmic_wrapper *wrp, static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata) { int ret; + u32 val; ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle); if (ret) { @@ -1172,13 +1197,21 @@ static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata) return ret; } - pwrap_writel(wrp, (adr >> 1) << 16, PWRAP_WACS2_CMD); + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) + val = adr; + else + val = (adr >> 1) << 16; + pwrap_writel(wrp, val, PWRAP_WACS2_CMD); ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_vldclr); if (ret) return ret; - *rdata = PWRAP_GET_WACS_RDATA(pwrap_readl(wrp, PWRAP_WACS2_RDATA)); + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) + val = pwrap_readl(wrp, PWRAP_SWINF_2_RDATA_31_0); + else + val = pwrap_readl(wrp, PWRAP_WACS2_RDATA); + *rdata = PWRAP_GET_WACS_RDATA(val); pwrap_writel(wrp, 1, PWRAP_WACS2_VLDCLR); @@ -1228,8 +1261,13 @@ static int pwrap_write16(struct pmic_wrapper *wrp, u32 adr, u32 wdata) return ret; } - pwrap_writel(wrp, (1 << 31) | ((adr >> 1) << 16) | wdata, - PWRAP_WACS2_CMD); + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) { + pwrap_writel(wrp, wdata, PWRAP_SWINF_2_WDATA_31_0); + pwrap_writel(wrp, BIT(29) | adr, PWRAP_WACS2_CMD); + } else { + pwrap_writel(wrp, BIT(31) | ((adr >> 1) << 16) | wdata, + PWRAP_WACS2_CMD); + } return 0; } @@ -1485,6 +1523,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp) case PWRAP_MT7622: pwrap_writel(wrp, 0, PWRAP_CIPHER_EN); break; + case PWRAP_MT6873: case PWRAP_MT8183: break; } @@ -1921,6 +1960,19 @@ static const struct pmic_wrapper_type pwrap_mt6797 = { .init_soc_specific = NULL, }; +static const struct pmic_wrapper_type pwrap_mt6873 = { + .regs = mt6873_regs, + .type = PWRAP_MT6873, + .arb_en_all = 0x777f, + .int_en_all = BIT(4) | BIT(5), + .int1_en_all = 0, + .spi_w = PWRAP_MAN_CMD_SPI_WRITE, + .wdt_src = PWRAP_WDT_SRC_MASK_ALL, + .caps = PWRAP_CAP_ARB, + .init_reg_clock = pwrap_common_init_reg_clock, + .init_soc_specific = NULL, +}; + static const struct pmic_wrapper_type pwrap_mt7622 = { .regs = mt7622_regs, .type = PWRAP_MT7622, @@ -1999,6 +2051,9 @@ static const struct of_device_id of_pwrap_match_tbl[] = { .compatible = "mediatek,mt6797-pwrap", .data = &pwrap_mt6797, }, { + .compatible = "mediatek,mt6873-pwrap", + .data = &pwrap_mt6873, + }, { .compatible = "mediatek,mt7622-pwrap", .data = &pwrap_mt7622, }, { @@ -2022,6 +2077,7 @@ MODULE_DEVICE_TABLE(of, of_pwrap_match_tbl); static int pwrap_probe(struct platform_device *pdev) { int ret, irq; + u32 mask_done; struct pmic_wrapper *wrp; struct device_node *np = pdev->dev.of_node; const struct of_device_id *of_slave_id = NULL; @@ -2116,14 +2172,21 @@ static int pwrap_probe(struct platform_device *pdev) } } - if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & PWRAP_STATE_INIT_DONE0)) { + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) + mask_done = PWRAP_STATE_INIT_DONE1; + else + mask_done = PWRAP_STATE_INIT_DONE0; + + if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & mask_done)) { dev_dbg(wrp->dev, "initialization isn't finished\n"); ret = -ENODEV; goto err_out2; } /* Initialize watchdog, may not be done by the bootloader */ - pwrap_writel(wrp, 0xf, PWRAP_WDT_UNIT); + if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) + pwrap_writel(wrp, 0xf, PWRAP_WDT_UNIT); + /* * Since STAUPD was not used on mt8173 platform, * so STAUPD of WDT_SRC which should be turned off @@ -2132,7 +2195,11 @@ static int pwrap_probe(struct platform_device *pdev) if (HAS_CAP(wrp->master->caps, PWRAP_CAP_WDT_SRC1)) pwrap_writel(wrp, wrp->master->wdt_src, PWRAP_WDT_SRC_EN_1); - pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN); + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) + pwrap_writel(wrp, 0x3, PWRAP_TIMER_EN); + else + pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN); + pwrap_writel(wrp, wrp->master->int_en_all, PWRAP_INT_EN); /* * We add INT1 interrupt to handle starvation and request exception |