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authorLucas Stach <l.stach@pengutronix.de>2021-10-02 02:59:37 +0200
committerShawn Guo <shawnguo@kernel.org>2021-10-05 14:29:19 +0800
commit2b2f106eb55276a60a89ac27a52d0d738b57a546 (patch)
tree1c280bac60e42edce10ab27d9807e7e83a44a6e7 /drivers/soc
parent8da8bd5399cfc2ff98514a6b31a3aa2159516fe6 (diff)
Revert "soc: imx: gpcv2: move reset assert after requesting domain power up"
This reverts commit a77ebdd9f553. It turns out that the VPU domain has no different requirements, even though the downstream ATF implementation seems to suggest otherwise. Powering on the domain with the reset asserted works fine. As the changed sequence has caused sporadic issues with the GPU domains, just revert the change to go back to the working sequence. Cc: <stable@vger.kernel.org> # 5.14 Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Peng Fan <peng.fan@nxp.com> Tested-by: Adam Ford <aford173@gmail.com> #imx8mm-beacon Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'drivers/soc')
-rw-r--r--drivers/soc/imx/gpcv2.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c
index 39a581f9b4ac..7fbf1f25b48e 100644
--- a/drivers/soc/imx/gpcv2.c
+++ b/drivers/soc/imx/gpcv2.c
@@ -244,6 +244,8 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd)
goto out_regulator_disable;
}
+ reset_control_assert(domain->reset);
+
if (domain->bits.pxx) {
/* request the domain to power up */
regmap_update_bits(domain->regmap, GPC_PU_PGC_SW_PUP_REQ,
@@ -268,8 +270,6 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd)
}
}
- reset_control_assert(domain->reset);
-
/* delay for reset to propagate */
udelay(5);