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authorMatthew Gerlach <matthew.gerlach@linux.intel.com>2021-04-16 09:57:20 -0700
committerMark Brown <broonie@kernel.org>2021-04-20 17:26:41 +0100
commitba2fc167e9447596a812e828842d0130ea9cd0e4 (patch)
tree231fbd3887b68259e57046d5715c470971836cd3 /drivers/spi/Kconfig
parentb0c3d9354de1f87eebc00694d5218b6611265933 (diff)
spi: altera: Add DFL bus driver for Altera API Controller
This patch adds a Device Feature List (DFL) bus driver for the Altera SPI Master controller. The SPI master is connected to an Intel SPI Slave to Avalon Bridge inside an Intel MAX10 BMC Chip. Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Link: https://lore.kernel.org/r/20210416165720.554144-3-matthew.gerlach@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/Kconfig')
-rw-r--r--drivers/spi/Kconfig9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index e59f548e882a..8b161ec4943b 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -70,6 +70,15 @@ config SPI_ALTERA_CORE
help
"The core code for the Altera SPI Controller"
+config SPI_ALTERA_DFL
+ tristate "DFL bus driver for Altera SPI Controller"
+ depends on FPGA_DFL
+ select SPI_ALTERA_CORE
+ help
+ This is a Device Feature List (DFL) bus driver for the
+ Altera SPI master controller. The SPI master is connected
+ to a SPI slave to Avalon bridge in a Intel MAX BMC.
+
config SPI_AR934X
tristate "Qualcomm Atheros AR934X/QCA95XX SPI controller driver"
depends on ATH79 || COMPILE_TEST