diff options
| author | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2017-06-09 15:26:06 -0700 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2017-06-12 09:43:29 -0700 |
| commit | 04416108ccea55f7536abeb9f81f1879922774eb (patch) | |
| tree | 23aa7fd67ee2d737ab9e167645e0be9003196228 /drivers/spi/spi-efm32.c | |
| parent | 4557c6072724fbb8e339b589e1897b20973b3b69 (diff) | |
drm/i915/cnl: Add registers related to voltage swing sequences.
This are the registers and bits needed for the voltage swing
sequence on Cannonlake.
v2: Remove CL_DW5 that was wrongly defined.
v3: Use (1 << 1) instead of (1<<1) as Paulo suggested
Change DW2 swing sel upper and lower macros to do the
bit selection instead of definint a table that doesn't
match the spec. It is based on a Manasi version of it.
Credits-to: Manasi.
v4: Let SCALING_MODE_SEL flexible. (Manasi)
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1497047175-27250-9-git-send-email-rodrigo.vivi@intel.com
Diffstat (limited to 'drivers/spi/spi-efm32.c')
0 files changed, 0 insertions, 0 deletions