diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2019-09-03 11:31:09 +0200 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzk@kernel.org> | 2020-08-19 21:45:38 +0200 |
| commit | f131a4443ea468cd532410c271c229bb39caab08 (patch) | |
| tree | 1657f15d7a487abceab5612b94e490089e706f14 /drivers/spi/spi-s3c24xx.c | |
| parent | 7dbad03ebcb924cde142f7477d65a54ffb1166a3 (diff) | |
ARM: s3c24xx: move spi fiq handler into platform
The fiq handler needs access to some register definitions that
should not be used directly by device drivers.
Since this is closely related to the irqchip driver anyway,
move it into the same place.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[krzk: Add a header guard in include/linux/spi/s3c24xx-fiq.h, fix
SPDX comment style, update maintainer's entry]
Co-developed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200806182059.2431-23-krzk%40kernel.org
Acked-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-s3c24xx.c')
| -rw-r--r-- | drivers/spi/spi-s3c24xx.c | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/drivers/spi/spi-s3c24xx.c b/drivers/spi/spi-s3c24xx.c index 0691248c7c0d..6ac6f0b6f237 100644 --- a/drivers/spi/spi-s3c24xx.c +++ b/drivers/spi/spi-s3c24xx.c @@ -19,12 +19,12 @@ #include <linux/spi/spi.h> #include <linux/spi/spi_bitbang.h> #include <linux/spi/s3c24xx.h> +#include <linux/spi/s3c24xx-fiq.h> #include <linux/module.h> #include <asm/fiq.h> #include "spi-s3c24xx-regs.h" -#include "spi-s3c24xx-fiq.h" /** * s3c24xx_spi_devstate - per device data @@ -229,10 +229,6 @@ struct spi_fiq_code { u8 data[]; }; -extern struct spi_fiq_code s3c24xx_spi_fiq_txrx; -extern struct spi_fiq_code s3c24xx_spi_fiq_tx; -extern struct spi_fiq_code s3c24xx_spi_fiq_rx; - /** * ack_bit - turn IRQ into IRQ acknowledgement bit * @irq: The interrupt number @@ -282,7 +278,6 @@ static void s3c24xx_spi_tryfiq(struct s3c24xx_spi *hw) regs.uregs[fiq_rrx] = (long)hw->rx; regs.uregs[fiq_rtx] = (long)hw->tx + 1; regs.uregs[fiq_rcount] = hw->len - 1; - regs.uregs[fiq_rirq] = (long)S3C24XX_VA_IRQ; set_fiq_regs(®s); |