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authorMarc Kleine-Budde <mkl@pengutronix.de>2020-07-06 16:34:43 +0200
committerMark Brown <broonie@kernel.org>2020-07-07 10:41:41 +0100
commit7716fa8068d418c39425f0fc9f3bae6c56261e86 (patch)
tree2b5a41beeba6dfa96c87ca371b7bf500aa06f8e5 /drivers/spi/spi-sun6i.c
parent4e7390e997af380e20c5979a9963b521e62b4a58 (diff)
spi: spi-sun6i: sun6i_spi_transfer_one(): enable RF_RDY interrupt only if needed
In sun6i_spi_transfer_one() the RX FIFO Ready (SUN6I_INT_CTL_RF_RDY) is unconditionally enabled. A RX interrupt is only needed, if more data than fits into the FIFO is going to be received during this transfer. As the RX-FIFO is drained during transfer complete interrupt, enable the RX FIFO Ready interrupt only if the data doesn't fit into the FIFO. Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Acked-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20200706143443.9855-11-mkl@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-sun6i.c')
-rw-r--r--drivers/spi/spi-sun6i.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c
index bba9843c40c5..19238e1b76b4 100644
--- a/drivers/spi/spi-sun6i.c
+++ b/drivers/spi/spi-sun6i.c
@@ -190,7 +190,7 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
unsigned int mclk_rate, div, div_cdr1, div_cdr2, timeout;
unsigned int start, end, tx_time;
unsigned int trig_level;
- unsigned int tx_len = 0;
+ unsigned int tx_len = 0, rx_len = 0;
int ret = 0;
u32 reg;
@@ -245,10 +245,12 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
* If it's a TX only transfer, we don't want to fill the RX
* FIFO with bogus data
*/
- if (sspi->rx_buf)
+ if (sspi->rx_buf) {
reg &= ~SUN6I_TFR_CTL_DHB;
- else
+ rx_len = tfr->len;
+ } else {
reg |= SUN6I_TFR_CTL_DHB;
+ }
/* We want to control the chip select manually */
reg |= SUN6I_TFR_CTL_CS_MANUAL;
@@ -302,8 +304,10 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
sun6i_spi_fill_fifo(sspi);
/* Enable the interrupts */
- reg = SUN6I_INT_CTL_TC | SUN6I_INT_CTL_RF_RDY;
+ reg = SUN6I_INT_CTL_TC;
+ if (rx_len > sspi->fifo_depth)
+ reg |= SUN6I_INT_CTL_RF_RDY;
if (tx_len > sspi->fifo_depth)
reg |= SUN6I_INT_CTL_TF_ERQ;