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authorJarkko Nikula <jarkko.nikula@linux.intel.com>2015-09-15 16:26:28 +0300
committerMark Brown <broonie@kernel.org>2015-09-17 18:36:15 +0100
commitb69d42b5c44bcfc1c73fe185d4644487f1bd3193 (patch)
tree430041fa2efbd65691213794c456278fe0fbc1ae /drivers/spi
parent196b0e2cf2373f43d7b0e8c1a63e9d528c06e1df (diff)
spi: pxa2xx: Remove cr0 variable from struct chip_data
There hasn't been need to carry chip->cr0 after SPI core started to validate speed_hz and bits_per_word transfer parameters. That effectively caused that pump_transfers() always recalculated it and practically chip->cr0 is used locally in setup() for debug prints only. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/spi-pxa2xx.c10
-rw-r--r--drivers/spi/spi-pxa2xx.h1
2 files changed, 4 insertions, 7 deletions
diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c
index ebafd537b59f..a25bc1d4bf7f 100644
--- a/drivers/spi/spi-pxa2xx.c
+++ b/drivers/spi/spi-pxa2xx.c
@@ -1101,6 +1101,7 @@ static int setup(struct spi_device *spi)
struct driver_data *drv_data = spi_master_get_devdata(spi->master);
unsigned int clk_div;
uint tx_thres, tx_hi_thres, rx_thres;
+ u32 cr0;
switch (drv_data->ssp_type) {
case QUARK_X1000_SSP:
@@ -1193,8 +1194,6 @@ static int setup(struct spi_device *spi)
clk_div = pxa2xx_ssp_get_clk_div(drv_data, chip, spi->max_speed_hz);
- chip->cr0 = pxa2xx_configure_sscr0(drv_data, clk_div,
- spi->bits_per_word);
switch (drv_data->ssp_type) {
case QUARK_X1000_SSP:
chip->threshold = (QUARK_X1000_SSCR1_RxTresh(rx_thres)
@@ -1216,15 +1215,16 @@ static int setup(struct spi_device *spi)
chip->cr1 |= SSCR1_LBM;
/* NOTE: PXA25x_SSP _could_ use external clocking ... */
+ cr0 = pxa2xx_configure_sscr0(drv_data, clk_div, spi->bits_per_word);
if (!pxa25x_ssp_comp(drv_data))
dev_dbg(&spi->dev, "%ld Hz actual, %s\n",
drv_data->max_clk_rate
- / (1 + ((chip->cr0 & SSCR0_SCR(0xfff)) >> 8)),
+ / (1 + ((cr0 & SSCR0_SCR(0xfff)) >> 8)),
chip->enable_dma ? "DMA" : "PIO");
else
dev_dbg(&spi->dev, "%ld Hz actual, %s\n",
drv_data->max_clk_rate / 2
- / (1 + ((chip->cr0 & SSCR0_SCR(0x0ff)) >> 8)),
+ / (1 + ((cr0 & SSCR0_SCR(0x0ff)) >> 8)),
chip->enable_dma ? "DMA" : "PIO");
if (spi->bits_per_word <= 8) {
@@ -1236,8 +1236,6 @@ static int setup(struct spi_device *spi)
chip->read = u16_reader;
chip->write = u16_writer;
} else if (spi->bits_per_word <= 32) {
- if (!is_quark_x1000_ssp(drv_data))
- chip->cr0 |= SSCR0_EDSS;
chip->n_bytes = 4;
chip->read = u32_reader;
chip->write = u32_writer;
diff --git a/drivers/spi/spi-pxa2xx.h b/drivers/spi/spi-pxa2xx.h
index 0875e985b90d..b91bda26bfa8 100644
--- a/drivers/spi/spi-pxa2xx.h
+++ b/drivers/spi/spi-pxa2xx.h
@@ -86,7 +86,6 @@ struct driver_data {
};
struct chip_data {
- u32 cr0;
u32 cr1;
u32 dds_rate;
u32 psp;