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authorSerge Semin <Sergey.Semin@baikalelectronics.ru>2020-10-08 02:55:03 +0300
committerMark Brown <broonie@kernel.org>2020-10-08 23:00:17 +0100
commit49d7d695ca4bb2f62290c7039c4165556f0ca1e4 (patch)
tree391fc0c22999f8a1fe2a8db565f48afb7767a7bb /drivers/spi
parentfbddc989a5c441099978aad320ada0d5327309f4 (diff)
spi: dw: Explicitly de-assert CS on SPI transfer completion
By design of the currently available native set_cs callback, the CS de-assertion will be done only if it's required by the corresponding controller capability. But in order to pre-fill the Tx FIFO buffer with data during the SPI memory ops execution the SER register needs to be left cleared before that. We'll also need a way to explicitly set and clear the corresponding CS bit at a certain moment of the operation. Let's alter the set_cs function then to also de-activate the CS, when it's required. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Link: https://lore.kernel.org/r/20201007235511.4935-15-Sergey.Semin@baikalelectronics.ru Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/spi-dw-core.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c
index ac87ff6d8be4..76e323db170f 100644
--- a/drivers/spi/spi-dw-core.c
+++ b/drivers/spi/spi-dw-core.c
@@ -100,7 +100,7 @@ void dw_spi_set_cs(struct spi_device *spi, bool enable)
*/
if (cs_high == enable)
dw_writel(dws, DW_SPI_SER, BIT(spi->chip_select));
- else if (dws->caps & DW_SPI_CAP_CS_OVERRIDE)
+ else
dw_writel(dws, DW_SPI_SER, 0);
}
EXPORT_SYMBOL_GPL(dw_spi_set_cs);