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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2017-09-01 09:36:39 -0400
committerMauro Carvalho Chehab <mchehab@s-opensource.com>2017-09-23 15:05:47 -0400
commit209627bff1c609983aaea7085a03677ce12bf2c6 (patch)
tree51af1953f47e2c81c0e248efdccd88ceff8dbafc /drivers/staging/media/atomisp/include/asm/intel_mid_pcihelpers.h
parent66228be9fff77d3fcc02663d534dff17c30aedc1 (diff)
media: staging: atomisp: Remove dead code for MID (#4)
Since we switched to upstream IOSF MBI API the custom code become not in use anymore. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Diffstat (limited to 'drivers/staging/media/atomisp/include/asm/intel_mid_pcihelpers.h')
-rw-r--r--drivers/staging/media/atomisp/include/asm/intel_mid_pcihelpers.h22
1 files changed, 0 insertions, 22 deletions
diff --git a/drivers/staging/media/atomisp/include/asm/intel_mid_pcihelpers.h b/drivers/staging/media/atomisp/include/asm/intel_mid_pcihelpers.h
deleted file mode 100644
index bf39f42c1c96..000000000000
--- a/drivers/staging/media/atomisp/include/asm/intel_mid_pcihelpers.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * Access to message bus through three registers
- * in CUNIT(0:0:0) PCI configuration space.
- * MSGBUS_CTRL_REG(0xD0):
- * 31:24 = message bus opcode
- * 23:16 = message bus port
- * 15:8 = message bus address, low 8 bits.
- * 7:4 = message bus byte enables
- * MSGBUS_CTRL_EXT_REG(0xD8):
- * 31:8 = message bus address, high 24 bits.
- * MSGBUS_DATA_REG(0xD4):
- * hold the data for write or read
- */
-#define PCI_ROOT_MSGBUS_CTRL_REG 0xD0
-#define PCI_ROOT_MSGBUS_DATA_REG 0xD4
-#define PCI_ROOT_MSGBUS_CTRL_EXT_REG 0xD8
-#define PCI_ROOT_MSGBUS_READ 0x10
-#define PCI_ROOT_MSGBUS_WRITE 0x11
-#define PCI_ROOT_MSGBUS_DWORD_ENABLE 0xf0
-
-u32 intel_mid_msgbus_read32(u8 port, u32 addr);
-void intel_mid_msgbus_write32(u8 port, u32 addr, u32 data);