summaryrefslogtreecommitdiff
path: root/drivers/staging/mt7621-dts
diff options
context:
space:
mode:
authorSergio Paracuellos <sergio.paracuellos@gmail.com>2019-01-04 08:08:23 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2019-01-07 11:28:14 +0100
commit06184ba5a33a16f1772857d2cf97f7f14c8018c7 (patch)
treea10b7b60b5bf3ee54144eab1579d2b65647d2c70 /drivers/staging/mt7621-dts
parent61f9bde6ea578f5baa1662c97365f7b36fc790fa (diff)
staging: mt7621-dts: add pci-phy related bindings to board's device tree
New driver for pci phy has been added, as well as. pci driver has been changed to use kernel's generic PHY API. Add related PCI PHY bindings accordly. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/mt7621-dts')
-rw-r--r--drivers/staging/mt7621-dts/mt7621.dtsi31
1 files changed, 31 insertions, 0 deletions
diff --git a/drivers/staging/mt7621-dts/mt7621.dtsi b/drivers/staging/mt7621-dts/mt7621.dtsi
index 1cec0879e825..f0c51622eca1 100644
--- a/drivers/staging/mt7621-dts/mt7621.dtsi
+++ b/drivers/staging/mt7621-dts/mt7621.dtsi
@@ -424,6 +424,8 @@
reset-names = "pcie0", "pcie1", "pcie2";
clocks = <&clkctrl 24 &clkctrl 25 &clkctrl 26>;
clock-names = "pcie0", "pcie1", "pcie2";
+ phys = <&pcie0_port>, <&pcie1_port>, <&pcie2_port>;
+ phy-names = "pcie-phy0", "pcie-phy1", "pcie-phy2";
pcie@0,0 {
reg = <0x0000 0 0 0 0>;
@@ -449,4 +451,33 @@
bus-range = <0x00 0xff>;
};
};
+
+ pcie0_phy: pcie-phy@1a149000 {
+ compatible = "mediatek,mt7621-pci-phy";
+ reg = <0x1a149000 0x0700>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pcie0_port: pcie-phy@0 {
+ reg = <0>;
+ #phy-cells = <0>;
+ };
+
+ pcie1_port: pcie-phy@1 {
+ reg = <1>;
+ #phy-cells = <0>;
+ };
+ };
+
+ pcie1_phy: pcie-phy@1a14a000 {
+ compatible = "mediatek,mt7621-pci-phy";
+ reg = <0x1a14a000 0x0700>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pcie2_port: pcie-phy@0 {
+ reg = <0>;
+ #phy-cells = <0>;
+ };
+ };
};