Staging: rt28x0: fix comments in *.c files

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

1 files changed, 145 insertions, 145 deletions

diff --git a/drivers/staging/rt2860/pci_main_dev.c b/drivers/staging/rt2860/pci_main_dev.c
index 2a22e458ae00..76c71f1882f3 100644
--- a/drivers/staging/rt2860/pci_main_dev.c
+++ b/drivers/staging/rt2860/pci_main_dev.c
@@ -38,17 +38,17 @@
 #include "rt_config.h"
 #include <linux/pci.h>
 
-// Following information will be show when you run 'modinfo'
-// *** If you have a solution for the bug in current version of driver, please mail to me.
-// Otherwise post to forum in ralinktech's web site(www.ralinktech.com) and let all users help you. ***
+/* Following information will be show when you run 'modinfo' */
+/* *** If you have a solution for the bug in current version of driver, please mail to me. */
+/* Otherwise post to forum in ralinktech's web site(www.ralinktech.com) and let all users help you. *** */
 MODULE_AUTHOR("Jett Chen <jett_chen@ralinktech.com>");
 MODULE_DESCRIPTION("RT2860/RT3090 Wireless Lan Linux Driver");
 MODULE_LICENSE("GPL");
 MODULE_ALIAS("rt3090sta");
 
-//
-// Function declarations
-//
+/* */
+/* Function declarations */
+/* */
 extern int rt28xx_close(IN struct net_device *net_dev);
 extern int rt28xx_open(struct net_device *net_dev);
 
@@ -64,14 +64,14 @@ static VOID RTMPInitPCIeDevice(IN struct pci_dev *pci_dev,
 #ifdef CONFIG_PM
 static int rt2860_suspend(struct pci_dev *pci_dev, pm_message_t state);
 static int rt2860_resume(struct pci_dev *pci_dev);
-#endif // CONFIG_PM //
+#endif /* CONFIG_PM // */
 
-//
-// Ralink PCI device table, include all supported chipsets
-//
+/* */
+/* Ralink PCI device table, include all supported chipsets */
+/* */
 static struct pci_device_id rt2860_pci_tbl[] __devinitdata = {
 #ifdef RT2860
-	{PCI_DEVICE(NIC_PCI_VENDOR_ID, NIC2860_PCI_DEVICE_ID)},	//RT28602.4G
+	{PCI_DEVICE(NIC_PCI_VENDOR_ID, NIC2860_PCI_DEVICE_ID)},	/*RT28602.4G */
 	{PCI_DEVICE(NIC_PCI_VENDOR_ID, NIC2860_PCIe_DEVICE_ID)},
 	{PCI_DEVICE(NIC_PCI_VENDOR_ID, NIC2760_PCI_DEVICE_ID)},
 	{PCI_DEVICE(NIC_PCI_VENDOR_ID, NIC2790_PCIe_DEVICE_ID)},
@@ -88,13 +88,13 @@ static struct pci_device_id rt2860_pci_tbl[] __devinitdata = {
 	{PCI_DEVICE(NIC_PCI_VENDOR_ID, NIC3090_PCIe_DEVICE_ID)},
 	{PCI_DEVICE(NIC_PCI_VENDOR_ID, NIC3091_PCIe_DEVICE_ID)},
 	{PCI_DEVICE(NIC_PCI_VENDOR_ID, NIC3092_PCIe_DEVICE_ID)},
-#endif // RT3090 //
+#endif /* RT3090 // */
 #ifdef RT3390
 	{PCI_DEVICE(NIC_PCI_VENDOR_ID, NIC3390_PCIe_DEVICE_ID)},
 	{PCI_DEVICE(NIC_PCI_VENDOR_ID, NIC3391_PCIe_DEVICE_ID)},
 	{PCI_DEVICE(NIC_PCI_VENDOR_ID, NIC3392_PCIe_DEVICE_ID)},
-#endif // RT3390 //
-	{0,}			// terminate list
+#endif /* RT3390 // */
+	{0,}			/* terminate list */
 };
 
 MODULE_DEVICE_TABLE(pci, rt2860_pci_tbl);
@@ -102,9 +102,9 @@ MODULE_DEVICE_TABLE(pci, rt2860_pci_tbl);
 MODULE_VERSION(STA_DRIVER_VERSION);
 #endif
 
-//
-// Our PCI driver structure
-//
+/* */
+/* Our PCI driver structure */
+/* */
 static struct pci_driver rt2860_driver = {
 name:	"rt2860",
 id_table:rt2860_pci_tbl,
@@ -125,8 +125,8 @@ resume:rt2860_resume,
 
 VOID RT2860RejectPendingPackets(IN PRTMP_ADAPTER pAd)
 {
-	// clear PS packets
-	// clear TxSw packets
+	/* clear PS packets */
+	/* clear TxSw packets */
 }
 
 static int rt2860_suspend(struct pci_dev *pci_dev, pm_message_t state)
@@ -146,33 +146,33 @@ static int rt2860_suspend(struct pci_dev *pci_dev, pm_message_t state)
 		/* and 1 suspend/resume function for 1 module, not for each interface */
 		/* so Linux will call suspend/resume function once */
 		if (VIRTUAL_IF_NUM(pAd) > 0) {
-			// avoid users do suspend after interface is down
+			/* avoid users do suspend after interface is down */
 
-			// stop interface
+			/* stop interface */
 			netif_carrier_off(net_dev);
 			netif_stop_queue(net_dev);
 
-			// mark device as removed from system and therefore no longer available
+			/* mark device as removed from system and therefore no longer available */
 			netif_device_detach(net_dev);
 
-			// mark halt flag
+			/* mark halt flag */
 			RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS);
 			RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
 
-			// take down the device
+			/* take down the device */
 			rt28xx_close((PNET_DEV) net_dev);
 
 			RT_MOD_DEC_USE_COUNT();
 		}
 	}
 
-	// reference to http://vovo2000.com/type-lab/linux/kernel-api/linux-kernel-api.html
-	// enable device to generate PME# when suspended
-	// pci_choose_state(): Choose the power state of a PCI device to be suspended
+	/* reference to http://vovo2000.com/type-lab/linux/kernel-api/linux-kernel-api.html */
+	/* enable device to generate PME# when suspended */
+	/* pci_choose_state(): Choose the power state of a PCI device to be suspended */
 	retval = pci_enable_wake(pci_dev, pci_choose_state(pci_dev, state), 1);
-	// save the PCI configuration space of a device before suspending
+	/* save the PCI configuration space of a device before suspending */
 	pci_save_state(pci_dev);
-	// disable PCI device after use
+	/* disable PCI device after use */
 	pci_disable_device(pci_dev);
 
 	retval = pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state));
@@ -187,22 +187,22 @@ static int rt2860_resume(struct pci_dev *pci_dev)
 	PRTMP_ADAPTER pAd = (PRTMP_ADAPTER) NULL;
 	INT32 retval;
 
-	// set the power state of a PCI device
-	// PCI has 4 power states, DO (normal) ~ D3(less power)
-	// in include/linux/pci.h, you can find that
-	// #define PCI_D0          ((pci_power_t __force) 0)
-	// #define PCI_D1          ((pci_power_t __force) 1)
-	// #define PCI_D2          ((pci_power_t __force) 2)
-	// #define PCI_D3hot       ((pci_power_t __force) 3)
-	// #define PCI_D3cold      ((pci_power_t __force) 4)
-	// #define PCI_UNKNOWN     ((pci_power_t __force) 5)
-	// #define PCI_POWER_ERROR ((pci_power_t __force) -1)
+	/* set the power state of a PCI device */
+	/* PCI has 4 power states, DO (normal) ~ D3(less power) */
+	/* in include/linux/pci.h, you can find that */
+	/* #define PCI_D0          ((pci_power_t __force) 0) */
+	/* #define PCI_D1          ((pci_power_t __force) 1) */
+	/* #define PCI_D2          ((pci_power_t __force) 2) */
+	/* #define PCI_D3hot       ((pci_power_t __force) 3) */
+	/* #define PCI_D3cold      ((pci_power_t __force) 4) */
+	/* #define PCI_UNKNOWN     ((pci_power_t __force) 5) */
+	/* #define PCI_POWER_ERROR ((pci_power_t __force) -1) */
 	retval = pci_set_power_state(pci_dev, PCI_D0);
 
-	// restore the saved state of a PCI device
+	/* restore the saved state of a PCI device */
 	pci_restore_state(pci_dev);
 
-	// initialize device before it's used by a driver
+	/* initialize device before it's used by a driver */
 	if (pci_enable_device(pci_dev)) {
 		printk("pci enable fail!\n");
 		return 0;
@@ -220,16 +220,16 @@ static int rt2860_resume(struct pci_dev *pci_dev)
 		/* and 1 suspend/resume function for 1 module, not for each interface */
 		/* so Linux will call suspend/resume function once */
 		if (VIRTUAL_IF_NUM(pAd) > 0) {
-			// mark device as attached from system and restart if needed
+			/* mark device as attached from system and restart if needed */
 			netif_device_attach(net_dev);
 
 			if (rt28xx_open((PNET_DEV) net_dev) != 0) {
-				// open fail
+				/* open fail */
 				DBGPRINT(RT_DEBUG_TRACE,
 					 ("<=== rt2860_resume()\n"));
 				return 0;
 			}
-			// increase MODULE use count
+			/* increase MODULE use count */
 			RT_MOD_INC_USE_COUNT();
 
 			RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS);
@@ -244,16 +244,16 @@ static int rt2860_resume(struct pci_dev *pci_dev)
 	DBGPRINT(RT_DEBUG_TRACE, ("<=== rt2860_resume()\n"));
 	return 0;
 }
-#endif // CONFIG_PM //
+#endif /* CONFIG_PM // */
 
 static INT __init rt2860_init_module(VOID)
 {
 	return pci_register_driver(&rt2860_driver);
 }
 
-//
-// Driver module unload function
-//
+/* */
+/* Driver module unload function */
+/* */
 static VOID __exit rt2860_cleanup_module(VOID)
 {
 	pci_unregister_driver(&rt2860_driver);
@@ -262,9 +262,9 @@ static VOID __exit rt2860_cleanup_module(VOID)
 module_init(rt2860_init_module);
 module_exit(rt2860_cleanup_module);
 
-//
-// PCI device probe & initialization function
-//
+/* */
+/* PCI device probe & initialization function */
+/* */
 static INT __devinit rt2860_probe(IN struct pci_dev *pci_dev,
 				  IN const struct pci_device_id *pci_id)
 {
@@ -278,8 +278,8 @@ static INT __devinit rt2860_probe(IN struct pci_dev *pci_dev,
 
 	DBGPRINT(RT_DEBUG_TRACE, ("===> rt2860_probe\n"));
 
-//PCIDevInit==============================================
-	// wake up and enable device
+/*PCIDevInit============================================== */
+	/* wake up and enable device */
 	if ((rv = pci_enable_device(pci_dev)) != 0) {
 		DBGPRINT(RT_DEBUG_ERROR,
 			 ("Enable PCI device failed, errno=%d!\n", rv));
@@ -293,7 +293,7 @@ static INT __devinit rt2860_probe(IN struct pci_dev *pci_dev,
 			 ("Request PCI resource failed, errno=%d!\n", rv));
 		goto err_out;
 	}
-	// map physical address to virtual address for accessing register
+	/* map physical address to virtual address for accessing register */
 	csr_addr =
 	    (unsigned long)ioremap(pci_resource_start(pci_dev, 0),
 				   pci_resource_len(pci_dev, 0));
@@ -310,11 +310,11 @@ static INT __devinit rt2860_probe(IN struct pci_dev *pci_dev,
 			  (ULONG) csr_addr, pci_dev->irq));
 	}
 
-	// Set DMA master
+	/* Set DMA master */
 	pci_set_master(pci_dev);
 
-//RtmpDevInit==============================================
-	// Allocate RTMP_ADAPTER adapter structure
+/*RtmpDevInit============================================== */
+	/* Allocate RTMP_ADAPTER adapter structure */
 	handle = kmalloc(sizeof(struct os_cookie), GFP_KERNEL);
 	if (handle == NULL) {
 		DBGPRINT(RT_DEBUG_ERROR,
@@ -325,25 +325,25 @@ static INT __devinit rt2860_probe(IN struct pci_dev *pci_dev,
 
 	((POS_COOKIE) handle)->pci_dev = pci_dev;
 
-	rv = RTMPAllocAdapterBlock(handle, &pAd);	//shiang: we may need the pci_dev for allocate structure of "RTMP_ADAPTER"
+	rv = RTMPAllocAdapterBlock(handle, &pAd);	/*shiang: we may need the pci_dev for allocate structure of "RTMP_ADAPTER" */
 	if (rv != NDIS_STATUS_SUCCESS)
 		goto err_out_iounmap;
-	// Here are the RTMP_ADAPTER structure with pci-bus specific parameters.
+	/* Here are the RTMP_ADAPTER structure with pci-bus specific parameters. */
 	pAd->CSRBaseAddress = (PUCHAR) csr_addr;
 	DBGPRINT(RT_DEBUG_ERROR,
 		 ("pAd->CSRBaseAddress =0x%lx, csr_addr=0x%lx!\n",
 		  (ULONG) pAd->CSRBaseAddress, csr_addr));
 	RtmpRaDevCtrlInit(pAd, RTMP_DEV_INF_PCI);
 
-//NetDevInit==============================================
+/*NetDevInit============================================== */
 	net_dev = RtmpPhyNetDevInit(pAd, &netDevHook);
 	if (net_dev == NULL)
 		goto err_out_free_radev;
 
-	// Here are the net_device structure with pci-bus specific parameters.
-	net_dev->irq = pci_dev->irq;	// Interrupt IRQ number
-	net_dev->base_addr = csr_addr;	// Save CSR virtual address and irq to device structure
-	pci_set_drvdata(pci_dev, net_dev);	// Set driver data
+	/* Here are the net_device structure with pci-bus specific parameters. */
+	net_dev->irq = pci_dev->irq;	/* Interrupt IRQ number */
+	net_dev->base_addr = csr_addr;	/* Save CSR virtual address and irq to device structure */
+	pci_set_drvdata(pci_dev, net_dev);	/* Set driver data */
 
 /* for supporting Network Manager */
 	/* Set the sysfs physical device reference for the network logical device
@@ -351,8 +351,8 @@ static INT __devinit rt2860_probe(IN struct pci_dev *pci_dev,
 	 */
 	SET_NETDEV_DEV(net_dev, &(pci_dev->dev));
 
-//All done, it's time to register the net device to linux kernel.
-	// Register this device
+/*All done, it's time to register the net device to linux kernel. */
+	/* Register this device */
 	rv = RtmpOSNetDevAttach(net_dev, &netDevHook);
 	if (rv)
 		goto err_out_free_netdev;
@@ -362,7 +362,7 @@ static INT __devinit rt2860_probe(IN struct pci_dev *pci_dev,
 
 	DBGPRINT(RT_DEBUG_TRACE, ("<=== rt2860_probe\n"));
 
-	return 0;		// probe ok
+	return 0;		/* probe ok */
 
 	/* --------------------------- ERROR HANDLE --------------------------- */
 err_out_free_netdev:
@@ -393,39 +393,39 @@ static VOID __devexit rt2860_remove_one(IN struct pci_dev *pci_dev)
 {
 	PNET_DEV net_dev = pci_get_drvdata(pci_dev);
 	RTMP_ADAPTER *pAd = NULL;
-	ULONG csr_addr = net_dev->base_addr;	// pAd->CSRBaseAddress;
+	ULONG csr_addr = net_dev->base_addr;	/* pAd->CSRBaseAddress; */
 
 	GET_PAD_FROM_NET_DEV(pAd, net_dev);
 
 	DBGPRINT(RT_DEBUG_TRACE, ("===> rt2860_remove_one\n"));
 
 	if (pAd != NULL) {
-		// Unregister/Free all allocated net_device.
+		/* Unregister/Free all allocated net_device. */
 		RtmpPhyNetDevExit(pAd, net_dev);
 
-		// Unmap CSR base address
+		/* Unmap CSR base address */
 		iounmap((char *)(csr_addr));
 
-		// release memory region
+		/* release memory region */
 		release_mem_region(pci_resource_start(pci_dev, 0),
 				   pci_resource_len(pci_dev, 0));
 
-		// Free RTMP_ADAPTER related structures.
+		/* Free RTMP_ADAPTER related structures. */
 		RtmpRaDevCtrlExit(pAd);
 
 	} else {
-		// Unregister network device
+		/* Unregister network device */
 		RtmpOSNetDevDetach(net_dev);
 
-		// Unmap CSR base address
+		/* Unmap CSR base address */
 		iounmap((char *)(net_dev->base_addr));
 
-		// release memory region
+		/* release memory region */
 		release_mem_region(pci_resource_start(pci_dev, 0),
 				   pci_resource_len(pci_dev, 0));
 	}
 
-	// Free the root net_device
+	/* Free the root net_device */
 	RtmpOSNetDevFree(net_dev);
 
 }
@@ -475,7 +475,7 @@ static VOID RTMPInitPCIeDevice(IN struct pci_dev *pci_dev, IN PRTMP_ADAPTER pAd)
 		   (device_id == NIC3090_PCIe_DEVICE_ID) ||
 		   (device_id == NIC3091_PCIe_DEVICE_ID) ||
 		   (device_id == NIC3092_PCIe_DEVICE_ID) ||
-#endif // RT3090 //
+#endif /* RT3090 // */
 		   0) {
 		UINT32 MacCsr0 = 0, Index = 0;
 		do {
@@ -487,8 +487,8 @@ static VOID RTMPInitPCIeDevice(IN struct pci_dev *pci_dev, IN PRTMP_ADAPTER pAd)
 			RTMPusecDelay(10);
 		} while (Index++ < 100);
 
-		// Support advanced power save after 2892/2790.
-		// MAC version at offset 0x1000 is 0x2872XXXX/0x2870XXXX(PCIe, USB, SDIO).
+		/* Support advanced power save after 2892/2790. */
+		/* MAC version at offset 0x1000 is 0x2872XXXX/0x2870XXXX(PCIe, USB, SDIO). */
 		if ((MacCsr0 & 0xffff0000) != 0x28600000) {
 			OPSTATUS_SET_FLAG(pAd, fOP_STATUS_PCIE_DEVICE);
 		}
@@ -509,7 +509,7 @@ VOID RTMPInitPCIeLinkCtrlValue(IN PRTMP_ADAPTER pAd)
 		return;
 
 	DBGPRINT(RT_DEBUG_TRACE, ("%s.===>\n", __func__));
-	// Init EEPROM, and save settings
+	/* Init EEPROM, and save settings */
 	if (!(IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd))) {
 		RT28xx_EEPROM_READ16(pAd, 0x22, PCIePowerSaveLevel);
 		pAd->PCIePowerSaveLevel = PCIePowerSaveLevel & 0xff;
@@ -541,16 +541,16 @@ VOID RTMPInitPCIeLinkCtrlValue(IN PRTMP_ADAPTER pAd)
 			PCIePowerSaveLevel &= 0xff;
 			PCIePowerSaveLevel = PCIePowerSaveLevel >> 6;
 			switch (PCIePowerSaveLevel) {
-			case 0:	// Only support L0
+			case 0:	/* Only support L0 */
 				pAd->LnkCtrlBitMask = 0;
 				break;
-			case 1:	// Only enable L0s
+			case 1:	/* Only enable L0s */
 				pAd->LnkCtrlBitMask = 1;
 				break;
-			case 2:	// enable L1, L0s
+			case 2:	/* enable L1, L0s */
 				pAd->LnkCtrlBitMask = 3;
 				break;
-			case 3:	// sync with host clk and enable L1, L0s
+			case 3:	/* sync with host clk and enable L1, L0s */
 				pAd->LnkCtrlBitMask = 0x103;
 				break;
 			}
@@ -580,7 +580,7 @@ VOID RTMPInitPCIeLinkCtrlValue(IN PRTMP_ADAPTER pAd)
 	} else if (IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd)) {
 		UCHAR LinkCtrlSetting = 0;
 
-		// Check 3090E special setting chip.
+		/* Check 3090E special setting chip. */
 		RT28xx_EEPROM_READ16(pAd, 0x24, data2);
 		if ((data2 == 0x9280) && ((pAd->MACVersion & 0xffff) == 0x0211)) {
 			pAd->b3090ESpecialChip = TRUE;
@@ -588,37 +588,37 @@ VOID RTMPInitPCIeLinkCtrlValue(IN PRTMP_ADAPTER pAd)
 		}
 
 		RTMP_IO_READ32(pAd, AUX_CTRL, &MacValue);
-		//enable WAKE_PCIE function, which forces to enable PCIE clock when mpu interrupt asserting.
-		//Force PCIE 125MHz CLK to toggle
+		/*enable WAKE_PCIE function, which forces to enable PCIE clock when mpu interrupt asserting. */
+		/*Force PCIE 125MHz CLK to toggle */
 		MacValue |= 0x402;
 		RTMP_IO_WRITE32(pAd, AUX_CTRL, MacValue);
 		DBGPRINT_RAW(RT_DEBUG_ERROR,
 			     (" AUX_CTRL = 0x%32x\n", MacValue));
 
-		// for RT30xx F and after, PCIe infterface, and for power solution 3
+		/* for RT30xx F and after, PCIe infterface, and for power solution 3 */
 		if ((IS_VERSION_AFTER_F(pAd))
 		    && (pAd->StaCfg.PSControl.field.rt30xxPowerMode >= 2)
 		    && (pAd->StaCfg.PSControl.field.rt30xxPowerMode <= 3)) {
 			RTMP_IO_READ32(pAd, AUX_CTRL, &MacValue);
 			DBGPRINT_RAW(RT_DEBUG_ERROR,
 				     (" Read AUX_CTRL = 0x%x\n", MacValue));
-			// turn on bit 12.
-			//enable 32KHz clock mode for power saving
+			/* turn on bit 12. */
+			/*enable 32KHz clock mode for power saving */
 			MacValue |= 0x1000;
 			if (MacValue != 0xffffffff) {
 				RTMP_IO_WRITE32(pAd, AUX_CTRL, MacValue);
 				DBGPRINT_RAW(RT_DEBUG_ERROR,
 					     (" Write AUX_CTRL = 0x%x\n",
 					      MacValue));
-				// 1. if use PCIePowerSetting is 2 or 3, need to program OSC_CTRL to 0x3ff11.
+				/* 1. if use PCIePowerSetting is 2 or 3, need to program OSC_CTRL to 0x3ff11. */
 				MacValue = 0x3ff11;
 				RTMP_IO_WRITE32(pAd, OSC_CTRL, MacValue);
 				DBGPRINT_RAW(RT_DEBUG_ERROR,
 					     (" OSC_CTRL = 0x%x\n", MacValue));
-				// 2. Write PCI register Clk ref bit
+				/* 2. Write PCI register Clk ref bit */
 				RTMPrt3xSetPCIePowerLinkCtrl(pAd);
 			} else {
-				// Error read Aux_Ctrl value.  Force to use solution 1
+				/* Error read Aux_Ctrl value.  Force to use solution 1 */
 				DBGPRINT(RT_DEBUG_ERROR,
 					 (" Error Value in AUX_CTRL = 0x%x\n",
 					  MacValue));
@@ -627,20 +627,20 @@ VOID RTMPInitPCIeLinkCtrlValue(IN PRTMP_ADAPTER pAd)
 					 (" Force to use power solution1 \n"));
 			}
 		}
-		// 1. read setting from inf file.
+		/* 1. read setting from inf file. */
 
 		PCIePowerSaveLevel =
 		    (USHORT) pAd->StaCfg.PSControl.field.rt30xxPowerMode;
 		DBGPRINT(RT_DEBUG_ERROR,
 			 ("====> rt30xx Read PowerLevelMode =  0x%x.\n",
 			  PCIePowerSaveLevel));
-		// 2. Check EnableNewPS.
+		/* 2. Check EnableNewPS. */
 		if (pAd->StaCfg.PSControl.field.EnableNewPS == FALSE)
 			PCIePowerSaveLevel = 1;
 
 		if (IS_VERSION_BEFORE_F(pAd)
 		    && (pAd->b3090ESpecialChip == FALSE)) {
-			// Chip Version E only allow 1, So force set 1.
+			/* Chip Version E only allow 1, So force set 1. */
 			PCIePowerSaveLevel &= 0x1;
 			pAd->PCIePowerSaveLevel = (USHORT) PCIePowerSaveLevel;
 			DBGPRINT(RT_DEBUG_TRACE,
@@ -650,7 +650,7 @@ VOID RTMPInitPCIeLinkCtrlValue(IN PRTMP_ADAPTER pAd)
 			AsicSendCommandToMcu(pAd, 0x83, 0xff,
 					     (UCHAR) PCIePowerSaveLevel, 0x00);
 		} else {
-			// Chip Version F and after only allow 1 or 2 or 3. This might be modified after new chip version come out.
+			/* Chip Version F and after only allow 1 or 2 or 3. This might be modified after new chip version come out. */
 			if (!
 			    ((PCIePowerSaveLevel == 1)
 			     || (PCIePowerSaveLevel == 3)))
@@ -659,8 +659,8 @@ VOID RTMPInitPCIeLinkCtrlValue(IN PRTMP_ADAPTER pAd)
 				 ("====> rt30xx F Write 0x83 Command = 0x%x.\n",
 				  PCIePowerSaveLevel));
 			pAd->PCIePowerSaveLevel = (USHORT) PCIePowerSaveLevel;
-			// for 3090F , we need to add high-byte arg for 0x83 command to indicate the link control setting in
-			// PCI Configuration Space. Because firmware can't read PCI Configuration Space
+			/* for 3090F , we need to add high-byte arg for 0x83 command to indicate the link control setting in */
+			/* PCI Configuration Space. Because firmware can't read PCI Configuration Space */
 			if ((pAd->Rt3xxRalinkLinkCtrl & 0x2)
 			    && (pAd->Rt3xxHostLinkCtrl & 0x2)) {
 				LinkCtrlSetting = 1;
@@ -673,11 +673,11 @@ VOID RTMPInitPCIeLinkCtrlValue(IN PRTMP_ADAPTER pAd)
 					     LinkCtrlSetting);
 		}
 	}
-	// Find Ralink PCIe Device's Express Capability Offset
+	/* Find Ralink PCIe Device's Express Capability Offset */
 	pos = pci_find_capability(pObj->pci_dev, PCI_CAP_ID_EXP);
 
 	if (pos != 0) {
-		// Ralink PCIe Device's Link Control Register Offset
+		/* Ralink PCIe Device's Link Control Register Offset */
 		pAd->RLnkCtrlOffset = pos + PCI_EXP_LNKCTL;
 		pci_read_config_word(pObj->pci_dev, pAd->RLnkCtrlOffset,
 				     &reg16);
@@ -698,7 +698,7 @@ VOID RTMPInitPCIeLinkCtrlValue(IN PRTMP_ADAPTER pAd)
 				 ("Write (Ralink PCIe Link Control Register)  offset 0x%x = 0x%x\n",
 				  pos + PCI_EXP_LNKCTL, Configuration));
 		}
-#endif // RT2860 //
+#endif /* RT2860 // */
 
 		RTMPFindHostPCIDev(pAd);
 		if (pObj->parent_pci_dev) {
@@ -711,14 +711,14 @@ VOID RTMPInitPCIeLinkCtrlValue(IN PRTMP_ADAPTER pAd)
 				bFindIntel = TRUE;
 				RTMP_SET_PSFLAG(pAd, fRTMP_PS_TOGGLE_L1);
 			}
-			// Find PCI-to-PCI Bridge Express Capability Offset
+			/* Find PCI-to-PCI Bridge Express Capability Offset */
 			pos =
 			    pci_find_capability(pObj->parent_pci_dev,
 						PCI_CAP_ID_EXP);
 
 			if (pos != 0) {
 				BOOLEAN bChange = FALSE;
-				// PCI-to-PCI Bridge Link Control Register Offset
+				/* PCI-to-PCI Bridge Link Control Register Offset */
 				pAd->HostLnkCtrlOffset = pos + PCI_EXP_LNKCTL;
 				pci_read_config_word(pObj->parent_pci_dev,
 						     pAd->HostLnkCtrlOffset,
@@ -739,7 +739,7 @@ VOID RTMPInitPCIeLinkCtrlValue(IN PRTMP_ADAPTER pAd)
 				case NIC2790_PCIe_DEVICE_ID:
 					bChange = TRUE;
 					break;
-#endif // RT2860 //
+#endif /* RT2860 // */
 #ifdef RT3090
 				case NIC3090_PCIe_DEVICE_ID:
 				case NIC3091_PCIe_DEVICE_ID:
@@ -747,7 +747,7 @@ VOID RTMPInitPCIeLinkCtrlValue(IN PRTMP_ADAPTER pAd)
 					if (bFindIntel == FALSE)
 						bChange = TRUE;
 					break;
-#endif // RT3090 //
+#endif /* RT3090 // */
 				default:
 					break;
 				}
@@ -782,14 +782,14 @@ VOID RTMPInitPCIeLinkCtrlValue(IN PRTMP_ADAPTER pAd)
 	if (bFindIntel == FALSE) {
 		DBGPRINT(RT_DEBUG_TRACE,
 			 ("Doesn't find Intel PCI host controller. \n"));
-		// Doesn't switch L0, L1, So set PCIePowerSaveLevel to 0xff
+		/* Doesn't switch L0, L1, So set PCIePowerSaveLevel to 0xff */
 		pAd->PCIePowerSaveLevel = 0xff;
 		if ((pAd->RLnkCtrlOffset != 0)
 #ifdef RT3090
 		    && ((pObj->DeviceID == NIC3090_PCIe_DEVICE_ID)
 			|| (pObj->DeviceID == NIC3091_PCIe_DEVICE_ID)
 			|| (pObj->DeviceID == NIC3092_PCIe_DEVICE_ID))
-#endif // RT3090 //
+#endif /* RT3090 // */
 		    ) {
 			pci_read_config_word(pObj->pci_dev, pAd->RLnkCtrlOffset,
 					     &reg16);
@@ -871,20 +871,20 @@ VOID RTMPPCIeLinkCtrlValueRestore(IN PRTMP_ADAPTER pAd, IN UCHAR Level)
 	if (!((pObj->DeviceID == NIC2860_PCIe_DEVICE_ID)
 	      || (pObj->DeviceID == NIC2790_PCIe_DEVICE_ID)))
 		return;
-#endif // RT2860 //
-	// Check PSControl Configuration
+#endif /* RT2860 // */
+	/* Check PSControl Configuration */
 	if (pAd->StaCfg.PSControl.field.EnableNewPS == FALSE)
 		return;
 
-	//3090 will not execute the following codes.
-	// Check interface : If not PCIe interface, return.
+	/*3090 will not execute the following codes. */
+	/* Check interface : If not PCIe interface, return. */
 
 #ifdef RT3090
 	if ((pObj->DeviceID == NIC3090_PCIe_DEVICE_ID)
 	    || (pObj->DeviceID == NIC3091_PCIe_DEVICE_ID)
 	    || (pObj->DeviceID == NIC3092_PCIe_DEVICE_ID))
 		return;
-#endif // RT3090 //
+#endif /* RT3090 // */
 
 	DBGPRINT(RT_DEBUG_TRACE, ("%s.===>\n", __func__));
 	PCIePowerSaveLevel = pAd->PCIePowerSaveLevel;
@@ -898,7 +898,7 @@ VOID RTMPPCIeLinkCtrlValueRestore(IN PRTMP_ADAPTER pAd, IN UCHAR Level)
 				  Configuration);
 		if ((Configuration != 0) && (Configuration != 0xFFFF)) {
 			Configuration &= 0xfefc;
-			// If call from interface down, restore to orginial setting.
+			/* If call from interface down, restore to orginial setting. */
 			if (Level == RESTORE_CLOSE) {
 				Configuration |= pAd->HostLnkCtrlConfiguration;
 			} else
@@ -920,7 +920,7 @@ VOID RTMPPCIeLinkCtrlValueRestore(IN PRTMP_ADAPTER pAd, IN UCHAR Level)
 				  Configuration);
 		if ((Configuration != 0) && (Configuration != 0xFFFF)) {
 			Configuration &= 0xfefc;
-			// If call from interface down, restore to orginial setting.
+			/* If call from interface down, restore to orginial setting. */
 			if (Level == RESTORE_CLOSE)
 				Configuration |= pAd->RLnkCtrlConfiguration;
 			else
@@ -965,20 +965,20 @@ VOID RTMPPCIeLinkCtrlSetting(IN PRTMP_ADAPTER pAd, IN USHORT Max)
 	if (!((pObj->DeviceID == NIC2860_PCIe_DEVICE_ID)
 	      || (pObj->DeviceID == NIC2790_PCIe_DEVICE_ID)))
 		return;
-#endif // RT2860 //
-	// Check PSControl Configuration
+#endif /* RT2860 // */
+	/* Check PSControl Configuration */
 	if (pAd->StaCfg.PSControl.field.EnableNewPS == FALSE)
 		return;
 
-	// Check interface : If not PCIe interface, return.
-	//Block 3090 to enter the following function
+	/* Check interface : If not PCIe interface, return. */
+	/*Block 3090 to enter the following function */
 
 #ifdef RT3090
 	if ((pObj->DeviceID == NIC3090_PCIe_DEVICE_ID)
 	    || (pObj->DeviceID == NIC3091_PCIe_DEVICE_ID)
 	    || (pObj->DeviceID == NIC3092_PCIe_DEVICE_ID))
 		return;
-#endif // RT3090 //
+#endif /* RT3090 // */
 	if (!RTMP_TEST_PSFLAG(pAd, fRTMP_PS_CAN_GO_SLEEP)) {
 		DBGPRINT(RT_DEBUG_INFO,
 			 ("RTMPPCIePowerLinkCtrl return on fRTMP_PS_CAN_GO_SLEEP flag\n"));
@@ -993,27 +993,27 @@ VOID RTMPPCIeLinkCtrlSetting(IN PRTMP_ADAPTER pAd, IN USHORT Max)
 	}
 	PCIePowerSaveLevel = PCIePowerSaveLevel >> 6;
 
-	// Skip non-exist deice right away
+	/* Skip non-exist deice right away */
 	if (pObj->parent_pci_dev && (pAd->HostLnkCtrlOffset != 0)) {
 		PCI_REG_READ_WORD(pObj->parent_pci_dev, pAd->HostLnkCtrlOffset,
 				  Configuration);
 		switch (PCIePowerSaveLevel) {
 		case 0:
-			// Set b0 and b1 of LinkControl (both 2892 and PCIe bridge) to 00
+			/* Set b0 and b1 of LinkControl (both 2892 and PCIe bridge) to 00 */
 			Configuration &= 0xfefc;
 			break;
 		case 1:
-			// Set b0 and b1 of LinkControl (both 2892 and PCIe bridge) to 01
+			/* Set b0 and b1 of LinkControl (both 2892 and PCIe bridge) to 01 */
 			Configuration &= 0xfefc;
 			Configuration |= 0x1;
 			break;
 		case 2:
-			//  Set b0 and b1 of LinkControl (both 2892 and PCIe bridge) to 11
+			/*  Set b0 and b1 of LinkControl (both 2892 and PCIe bridge) to 11 */
 			Configuration &= 0xfefc;
 			Configuration |= 0x3;
 			break;
 		case 3:
-			// Set b0 and b1 of LinkControl (both 2892 and PCIe bridge) to 11 and bit 8 of LinkControl of 2892 to 1
+			/* Set b0 and b1 of LinkControl (both 2892 and PCIe bridge) to 11 and bit 8 of LinkControl of 2892 to 1 */
 			Configuration &= 0xfefc;
 			Configuration |= 0x103;
 			break;
@@ -1026,7 +1026,7 @@ VOID RTMPPCIeLinkCtrlSetting(IN PRTMP_ADAPTER pAd, IN USHORT Max)
 	}
 
 	if (pObj->pci_dev && (pAd->RLnkCtrlOffset != 0)) {
-		// first 2892 chip not allow to frequently set mode 3. will cause hang problem.
+		/* first 2892 chip not allow to frequently set mode 3. will cause hang problem. */
 		if (PCIePowerSaveLevel > Max)
 			PCIePowerSaveLevel = Max;
 
@@ -1034,25 +1034,25 @@ VOID RTMPPCIeLinkCtrlSetting(IN PRTMP_ADAPTER pAd, IN USHORT Max)
 				  Configuration);
 		switch (PCIePowerSaveLevel) {
 		case 0:
-			// No PCI power safe
-			// Set b0 and b1 of LinkControl (both 2892 and PCIe bridge) to 00 .
+			/* No PCI power safe */
+			/* Set b0 and b1 of LinkControl (both 2892 and PCIe bridge) to 00 . */
 			Configuration &= 0xfefc;
 			break;
 		case 1:
-			//  L0
-			// Set b0 and b1 of LinkControl (both 2892 and PCIe bridge) to 01 .
+			/*  L0 */
+			/* Set b0 and b1 of LinkControl (both 2892 and PCIe bridge) to 01 . */
 			Configuration &= 0xfefc;
 			Configuration |= 0x1;
 			break;
 		case 2:
-			// L0 and L1
-			//  Set b0 and b1 of LinkControl (both 2892 and PCIe bridge) to 11
+			/* L0 and L1 */
+			/*  Set b0 and b1 of LinkControl (both 2892 and PCIe bridge) to 11 */
 			Configuration &= 0xfefc;
 			Configuration |= 0x3;
 			break;
 		case 3:
-			// L0 , L1 and clock management.
-			// Set b0 and b1 of LinkControl (both 2892 and PCIe bridge) to 11 and bit 8 of LinkControl of 2892 to 1
+			/* L0 , L1 and clock management. */
+			/* Set b0 and b1 of LinkControl (both 2892 and PCIe bridge) to 11 and bit 8 of LinkControl of 2892 to 1 */
 			Configuration &= 0xfefc;
 			Configuration |= 0x103;
 			pAd->bPCIclkOff = TRUE;
@@ -1091,35 +1091,35 @@ VOID RTMPrt3xSetPCIePowerLinkCtrl(IN PRTMP_ADAPTER pAd)
 		 ("RTMPrt3xSetPCIePowerLinkCtrl.===> %lx\n",
 		  pAd->StaCfg.PSControl.word));
 
-	// Check PSControl Configuration
+	/* Check PSControl Configuration */
 	if (pAd->StaCfg.PSControl.field.EnableNewPS == FALSE)
 		return;
 	RTMPFindHostPCIDev(pAd);
 	if (pObj->parent_pci_dev) {
-		// Find PCI-to-PCI Bridge Express Capability Offset
+		/* Find PCI-to-PCI Bridge Express Capability Offset */
 		pos = pci_find_capability(pObj->parent_pci_dev, PCI_CAP_ID_EXP);
 
 		if (pos != 0) {
 			pAd->HostLnkCtrlOffset = pos + PCI_EXP_LNKCTL;
 		}
-		// If configurared to turn on L1.
+		/* If configurared to turn on L1. */
 		HostConfiguration = 0;
 		if (pAd->StaCfg.PSControl.field.rt30xxForceASPMTest == 1) {
 			DBGPRINT(RT_DEBUG_TRACE, ("Enter,PSM : Force ASPM \n"));
 
-			// Skip non-exist deice right away
+			/* Skip non-exist deice right away */
 			if ((pAd->HostLnkCtrlOffset != 0)) {
 				PCI_REG_READ_WORD(pObj->parent_pci_dev,
 						  pAd->HostLnkCtrlOffset,
 						  HostConfiguration);
-				// Prepare Configuration to write to Host
+				/* Prepare Configuration to write to Host */
 				HostConfiguration |= 0x3;
 				PCI_REG_WIRTE_WORD(pObj->parent_pci_dev,
 						   pAd->HostLnkCtrlOffset,
 						   HostConfiguration);
 				pAd->Rt3xxHostLinkCtrl = HostConfiguration;
-				// Because in rt30xxForceASPMTest Mode, Force turn on L0s, L1.
-				// Fix HostConfiguration bit0:1 = 0x3 for later use.
+				/* Because in rt30xxForceASPMTest Mode, Force turn on L0s, L1. */
+				/* Fix HostConfiguration bit0:1 = 0x3 for later use. */
 				HostConfiguration = 0x3;
 				DBGPRINT(RT_DEBUG_TRACE,
 					 ("PSM : Force ASPM : "
@@ -1129,7 +1129,7 @@ VOID RTMPrt3xSetPCIePowerLinkCtrl(IN PRTMP_ADAPTER pAd)
 		} else if (pAd->StaCfg.PSControl.field.rt30xxFollowHostASPM ==
 			   1) {
 
-			// Skip non-exist deice right away
+			/* Skip non-exist deice right away */
 			if ((pAd->HostLnkCtrlOffset != 0)) {
 				PCI_REG_READ_WORD(pObj->parent_pci_dev,
 						  pAd->HostLnkCtrlOffset,
@@ -1143,12 +1143,12 @@ VOID RTMPrt3xSetPCIePowerLinkCtrl(IN PRTMP_ADAPTER pAd)
 			}
 		}
 	}
-	// Prepare to write Ralink setting.
-	// Find Ralink PCIe Device's Express Capability Offset
+	/* Prepare to write Ralink setting. */
+	/* Find Ralink PCIe Device's Express Capability Offset */
 	pos = pci_find_capability(pObj->pci_dev, PCI_CAP_ID_EXP);
 
 	if (pos != 0) {
-		// Ralink PCIe Device's Link Control Register Offset
+		/* Ralink PCIe Device's Link Control Register Offset */
 		pAd->RLnkCtrlOffset = pos + PCI_EXP_LNKCTL;
 		pci_read_config_word(pObj->pci_dev, pAd->RLnkCtrlOffset,
 				     &reg16);