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| author | Francesco Dolcini <francesco.dolcini@toradex.com> | 2023-04-27 16:29:27 +0200 |
|---|---|---|
| committer | Robert Foss <rfoss@kernel.org> | 2023-05-05 20:11:25 +0200 |
| commit | 6a4020b4c63911977aaf8047f904a300d15de739 (patch) | |
| tree | 21ad8fb5581f4571137966be42bdce4460560d86 /drivers/thermal/k3_bandgap.c | |
| parent | 75a8aeac2573ab258c53676eba9b3796ea691988 (diff) | |
drm/bridge: tc358768: fix PLL parameters computation
According to Toshiba documentation the PLL input clock after the divider
should be not less than 4MHz, fix the PLL parameters computation
accordingly.
Fixes: ff1ca6397b1d ("drm/bridge: Add tc358768 driver")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Robert Foss <rfoss@kernel.org>
Signed-off-by: Robert Foss <rfoss@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20230427142934.55435-3-francesco@dolcini.it
Diffstat (limited to 'drivers/thermal/k3_bandgap.c')
0 files changed, 0 insertions, 0 deletions