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authorLinus Torvalds <torvalds@linux-foundation.org>2017-03-01 09:54:32 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2017-03-01 09:54:32 -0800
commit544a068f1f88da89254d2e334a7d4f0dc4ae9ab7 (patch)
tree8cefffc88c7e0f737ea76ff67125c5180abd1414 /drivers/thermal/ti-soc-thermal/dra752-bandgap.h
parent545b2820c4a48245412d97030134cc1d38918726 (diff)
parent6fefe19f583625ca4ea3ecc9128baa51c31c60a4 (diff)
Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux
Pull thermal management updates from Zhang Rui: - add thermal driver for R-Car Gen3 thermal sensors. - add thermal driver for ZTE' zx2967 family thermal sensors. - convert thermal ID allocation from IDR to IDA. - fix a possible NULL dereference in imx thermal driver. - fix a ti-soc-thermal driver dependency issue so that critical thermal control is still available when CPU_THERMAL is not defined. - update binding information for QorIQ thermal driver. - a couple of cleanups in thermal core, intel_powerclamp, exynos, dra752-thermal, mtk-thermal driver. * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux: powerpc/mpc85xx: Update TMU device tree node for T1023/T1024 powerpc/mpc85xx: Update TMU device tree node for T1040/T1042 dt-bindings: Update QorIQ TMU thermal bindings thermal: mtk_thermal: Staticise a number of data variables thermal: arm: dra752: Remove all TSHUT related definitions thermal: arm: dra752: Remove TSHUT configuration thermal: ti-soc-thermal: Remove CPU_THERMAL Dependency from TI_THERMAL thermal: imx: Fix possible NULL dereference. thermal: exynos: Remove parsing unused samsung,tmu_cal_mode property thermal: zx2967: add thermal driver for ZTE's zx2967 family thermal: use cpumask_var_t for on-stack cpu masks dt: bindings: add documentation for zx2967 family thermal sensor thermal/intel_powerclamp: Remove set-but-not-used variables thermal: rcar_gen3_thermal: Add R-Car Gen3 thermal driver thermal: rcar_gen3_thermal: Document the R-Car Gen3 thermal: convert devfreq_cooling to use an IDA thermal: convert cpu_cooling to use an IDA thermal: convert clock cooling to use an IDA thermal core: convert ID allocation to IDA
Diffstat (limited to 'drivers/thermal/ti-soc-thermal/dra752-bandgap.h')
-rw-r--r--drivers/thermal/ti-soc-thermal/dra752-bandgap.h19
1 files changed, 0 insertions, 19 deletions
diff --git a/drivers/thermal/ti-soc-thermal/dra752-bandgap.h b/drivers/thermal/ti-soc-thermal/dra752-bandgap.h
index 6b0f2b1160f7..a31e4b5e82cd 100644
--- a/drivers/thermal/ti-soc-thermal/dra752-bandgap.h
+++ b/drivers/thermal/ti-soc-thermal/dra752-bandgap.h
@@ -54,7 +54,6 @@
#define DRA752_STD_FUSE_OPP_BGAP_CORE_OFFSET 0x8
#define DRA752_TEMP_SENSOR_CORE_OFFSET 0x154
#define DRA752_BANDGAP_THRESHOLD_CORE_OFFSET 0x1ac
-#define DRA752_BANDGAP_TSHUT_CORE_OFFSET 0x1b8
#define DRA752_BANDGAP_CUMUL_DTEMP_CORE_OFFSET 0x1c4
#define DRA752_DTEMP_CORE_0_OFFSET 0x208
#define DRA752_DTEMP_CORE_1_OFFSET 0x20c
@@ -66,7 +65,6 @@
#define DRA752_STD_FUSE_OPP_BGAP_IVA_OFFSET 0x388
#define DRA752_TEMP_SENSOR_IVA_OFFSET 0x398
#define DRA752_BANDGAP_THRESHOLD_IVA_OFFSET 0x3a4
-#define DRA752_BANDGAP_TSHUT_IVA_OFFSET 0x3ac
#define DRA752_BANDGAP_CUMUL_DTEMP_IVA_OFFSET 0x3b4
#define DRA752_DTEMP_IVA_0_OFFSET 0x3d0
#define DRA752_DTEMP_IVA_1_OFFSET 0x3d4
@@ -78,7 +76,6 @@
#define DRA752_STD_FUSE_OPP_BGAP_MPU_OFFSET 0x4
#define DRA752_TEMP_SENSOR_MPU_OFFSET 0x14c
#define DRA752_BANDGAP_THRESHOLD_MPU_OFFSET 0x1a4
-#define DRA752_BANDGAP_TSHUT_MPU_OFFSET 0x1b0
#define DRA752_BANDGAP_CUMUL_DTEMP_MPU_OFFSET 0x1bc
#define DRA752_DTEMP_MPU_0_OFFSET 0x1e0
#define DRA752_DTEMP_MPU_1_OFFSET 0x1e4
@@ -90,7 +87,6 @@
#define DRA752_STD_FUSE_OPP_BGAP_DSPEVE_OFFSET 0x384
#define DRA752_TEMP_SENSOR_DSPEVE_OFFSET 0x394
#define DRA752_BANDGAP_THRESHOLD_DSPEVE_OFFSET 0x3a0
-#define DRA752_BANDGAP_TSHUT_DSPEVE_OFFSET 0x3a8
#define DRA752_BANDGAP_CUMUL_DTEMP_DSPEVE_OFFSET 0x3b0
#define DRA752_DTEMP_DSPEVE_0_OFFSET 0x3bc
#define DRA752_DTEMP_DSPEVE_1_OFFSET 0x3c0
@@ -102,7 +98,6 @@
#define DRA752_STD_FUSE_OPP_BGAP_GPU_OFFSET 0x0
#define DRA752_TEMP_SENSOR_GPU_OFFSET 0x150
#define DRA752_BANDGAP_THRESHOLD_GPU_OFFSET 0x1a8
-#define DRA752_BANDGAP_TSHUT_GPU_OFFSET 0x1b4
#define DRA752_BANDGAP_CUMUL_DTEMP_GPU_OFFSET 0x1c0
#define DRA752_DTEMP_GPU_0_OFFSET 0x1f4
#define DRA752_DTEMP_GPU_1_OFFSET 0x1f8
@@ -173,10 +168,6 @@
#define DRA752_BANDGAP_THRESHOLD_HOT_MASK (0x3ff << 16)
#define DRA752_BANDGAP_THRESHOLD_COLD_MASK (0x3ff << 0)
-/* DRA752.TSHUT_THRESHOLD */
-#define DRA752_TSHUT_THRESHOLD_MUXCTRL_MASK BIT(31)
-#define DRA752_TSHUT_THRESHOLD_HOT_MASK (0x3ff << 16)
-#define DRA752_TSHUT_THRESHOLD_COLD_MASK (0x3ff << 0)
/* DRA752.BANDGAP_CUMUL_DTEMP_CORE */
#define DRA752_BANDGAP_CUMUL_DTEMP_CORE_MASK (0xffffffff << 0)
@@ -216,8 +207,6 @@
#define DRA752_GPU_MAX_TEMP 125000
#define DRA752_GPU_HYST_VAL 5000
/* interrupts thresholds */
-#define DRA752_GPU_TSHUT_HOT 915
-#define DRA752_GPU_TSHUT_COLD 900
#define DRA752_GPU_T_HOT 800
#define DRA752_GPU_T_COLD 795
@@ -230,8 +219,6 @@
#define DRA752_MPU_MAX_TEMP 125000
#define DRA752_MPU_HYST_VAL 5000
/* interrupts thresholds */
-#define DRA752_MPU_TSHUT_HOT 915
-#define DRA752_MPU_TSHUT_COLD 900
#define DRA752_MPU_T_HOT 800
#define DRA752_MPU_T_COLD 795
@@ -244,8 +231,6 @@
#define DRA752_CORE_MAX_TEMP 125000
#define DRA752_CORE_HYST_VAL 5000
/* interrupts thresholds */
-#define DRA752_CORE_TSHUT_HOT 915
-#define DRA752_CORE_TSHUT_COLD 900
#define DRA752_CORE_T_HOT 800
#define DRA752_CORE_T_COLD 795
@@ -258,8 +243,6 @@
#define DRA752_DSPEVE_MAX_TEMP 125000
#define DRA752_DSPEVE_HYST_VAL 5000
/* interrupts thresholds */
-#define DRA752_DSPEVE_TSHUT_HOT 915
-#define DRA752_DSPEVE_TSHUT_COLD 900
#define DRA752_DSPEVE_T_HOT 800
#define DRA752_DSPEVE_T_COLD 795
@@ -272,8 +255,6 @@
#define DRA752_IVA_MAX_TEMP 125000
#define DRA752_IVA_HYST_VAL 5000
/* interrupts thresholds */
-#define DRA752_IVA_TSHUT_HOT 915
-#define DRA752_IVA_TSHUT_COLD 900
#define DRA752_IVA_T_HOT 800
#define DRA752_IVA_T_COLD 795