diff options
author | R Kannappan <r.kannappan@intel.com> | 2024-07-19 21:37:20 +0300 |
---|---|---|
committer | Mika Westerberg <mika.westerberg@linux.intel.com> | 2024-08-22 07:32:06 +0300 |
commit | 10904df3f20cf36e418e78ab73c2fbcecda512b8 (patch) | |
tree | 3e36f79b75e9bb891b6bc157856b2bbf893d5dcf /drivers/thunderbolt/tb.h | |
parent | 9fafd46b39d140b7359b77e5fcc4c3130788df42 (diff) |
thunderbolt: Improve software receiver lane margining
USB4 specification defines the metadata needed to perform software
margining, as well as the necessary steps which include waiting for
dwell time.
- Add dwell_time attribute to set the wait time while performing
margining and checking for link errors.
- Add error_counter attribute to configure error counter prior to
margining test.
- Add voltage_time_offset attribute to set the voltage or time offset
steps before performing the software margining test.
- Perform software margining test for dwell duration, break if there are
link errors, stop the clocks and provide results.
Below is a minimalistic example how this can be used. Note these values
are just examples. The exact values in practice depend on host specific
capabilities and the type of measurement to be performed.
# cd /sys/kernel/debug/thunderbolt/ROUTER/portX/margining/
# echo software > mode
# echo 400 > dwell_time
# echo 1 > run
As usual the results attribute contains the results of a succesfull run.
Signed-off-by: R Kannappan <r.kannappan@intel.com>
Co-developed-by: Rene Sapiens <rene.sapiens@intel.com>
Signed-off-by: Rene Sapiens <rene.sapiens@intel.com>
Co-developed-by: Aapo Vienamo <aapo.vienamo@linux.intel.com>
Signed-off-by: Aapo Vienamo <aapo.vienamo@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Diffstat (limited to 'drivers/thunderbolt/tb.h')
-rw-r--r-- | drivers/thunderbolt/tb.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/thunderbolt/tb.h b/drivers/thunderbolt/tb.h index 262c333924b8..6737188f2581 100644 --- a/drivers/thunderbolt/tb.h +++ b/drivers/thunderbolt/tb.h @@ -1372,6 +1372,7 @@ enum usb4_margin_sw_error_counter { * @error_counter: Error counter operation for software margining * @ber_level: Current BER level contour value * @lanes: %0, %1 or %7 (all) + * @voltage_time_offset: Offset for voltage / time for software margining * @optional_voltage_offset_range: Enable optional extended voltage range * @right_high: %false if left/low margin test is performed, %true if right/high * @time: %true if time margining is used instead of voltage @@ -1380,6 +1381,7 @@ struct usb4_port_margining_params { enum usb4_margin_sw_error_counter error_counter; u32 ber_level; u32 lanes; + u32 voltage_time_offset; bool optional_voltage_offset_range; bool right_high; bool time; |