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authorSherry Sun <sherry.sun@nxp.com>2023-01-30 14:44:45 +0800
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2023-01-31 10:53:39 +0100
commit7c0105901778500f6d11ddfd99f6efa1987c37a6 (patch)
tree22df28364472361656d4e9bce079a980554c073e /drivers/tty/serial/fsl_lpuart.c
parent34ebb26f12a84b744f43c5c4869516f122a2dfaa (diff)
tty: serial: fsl_lpuart: set receive watermark for imx8qxp platform
Since imx8qxp RX FIFO depth is 64 datawords, it will be better to set the rx watermark as 31, which means when the number of datawords in the receive FIFO(>= 32) is greater than the watermark, an interrupt or a DMA request is generated. Also keep the console rx watermark as 1 to make sure it responsive. Signed-off-by: Sherry Sun <sherry.sun@nxp.com> Link: https://lore.kernel.org/r/20230130064449.9564-3-sherry.sun@nxp.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty/serial/fsl_lpuart.c')
-rw-r--r--drivers/tty/serial/fsl_lpuart.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c
index e4aa161e61bf..868c2783d2c7 100644
--- a/drivers/tty/serial/fsl_lpuart.c
+++ b/drivers/tty/serial/fsl_lpuart.c
@@ -321,7 +321,7 @@ static struct lpuart_soc_data imx8qxp_data = {
.devtype = IMX8QXP_LPUART,
.iotype = UPIO_MEM32,
.reg_off = IMX_REG_OFF,
- .rx_watermark = 1,
+ .rx_watermark = 31,
};
static struct lpuart_soc_data imxrt1050_data = {
.devtype = IMXRT1050_LPUART,
@@ -1527,6 +1527,8 @@ static void lpuart_setup_watermark(struct lpuart_port *sport)
writeb(UARTSFIFO_RXUF, sport->port.membase + UARTSFIFO);
}
+ if (uart_console(&sport->port))
+ sport->rx_watermark = 1;
writeb(0, sport->port.membase + UARTTWFIFO);
writeb(sport->rx_watermark, sport->port.membase + UARTRWFIFO);
@@ -1563,6 +1565,8 @@ static void lpuart32_setup_watermark(struct lpuart_port *sport)
lpuart32_write(&sport->port, val, UARTFIFO);
/* set the watermark */
+ if (uart_console(&sport->port))
+ sport->rx_watermark = 1;
val = (sport->rx_watermark << UARTWATER_RXWATER_OFF) |
(0x0 << UARTWATER_TXWATER_OFF);
lpuart32_write(&sport->port, val, UARTWATER);