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authorPawel Laszczak <pawell@cadence.com>2020-12-07 11:32:24 +0100
committerPeter Chen <peter.chen@nxp.com>2020-12-29 12:36:13 +0800
commit3d82904559f4f5a2622db1b21de3edf2eded7664 (patch)
treea06f42704976fa6b5fed6178416fcea7cf9eee6e /drivers/usb/cdns3/core.h
parente93e58d2740282d32c0278fab283eb0ae158bb59 (diff)
usb: cdnsp: cdns3 Add main part of Cadence USBSSP DRD Driver
This patch introduces the main part of Cadence USBSSP DRD driver to Linux kernel. To reduce the patch size a little bit, the header file gadget.h was intentionally added as separate patch. The Cadence USBSSP DRD Controller is a highly configurable IP Core which can be instantiated as Dual-Role Device (DRD), Peripheral Only and Host Only (XHCI)configurations. The current driver has been validated with FPGA platform. We have support for PCIe bus, which is used on FPGA prototyping. The host side of USBSS DRD controller is compliant with XHCI. The architecture for device side is almost the same as for host side, and most of the XHCI specification can be used to understand how this controller operates. Signed-off-by: Pawel Laszczak <pawell@cadence.com> Signed-off-by: Peter Chen <peter.chen@nxp.com>
Diffstat (limited to 'drivers/usb/cdns3/core.h')
-rw-r--r--drivers/usb/cdns3/core.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/usb/cdns3/core.h b/drivers/usb/cdns3/core.h
index cbd2e1cc8eb1..56b568678980 100644
--- a/drivers/usb/cdns3/core.h
+++ b/drivers/usb/cdns3/core.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
- * Cadence USBSS DRD Header File.
+ * Cadence USBSS and USBSSP DRD Header File.
*
* Copyright (C) 2017-2018 NXP
* Copyright (C) 2018-2019 Cadence.