summaryrefslogtreecommitdiff
path: root/drivers/usb/chipidea/Kconfig
diff options
context:
space:
mode:
authorStephen Boyd <stephen.boyd@linaro.org>2016-12-28 14:57:05 -0800
committerPeter Chen <peter.chen@nxp.com>2017-01-20 15:26:47 +0800
commit1b8fc5a5253d593daff68378444f8fc4bc50af1a (patch)
tree935000d6c79d3aaa041c0ef1430297c169c16288 /drivers/usb/chipidea/Kconfig
parent26f8e3a8cb81b4b8495e8e75596bc60cddf5af1e (diff)
usb: chipidea: msm: Add reset controller for PHY POR bit
The MSM chipidea wrapper has two bits that are used to reset the first or second phy. Add support for these bits via the reset controller framework, so that phy drivers can reset their hardware at the right time during initialization. Acked-by: Peter Chen <peter.chen@nxp.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Peter Chen <peter.chen@nxp.com>
Diffstat (limited to 'drivers/usb/chipidea/Kconfig')
-rw-r--r--drivers/usb/chipidea/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/usb/chipidea/Kconfig b/drivers/usb/chipidea/Kconfig
index 19c20eaa23f2..fc96f5cdcb5c 100644
--- a/drivers/usb/chipidea/Kconfig
+++ b/drivers/usb/chipidea/Kconfig
@@ -2,6 +2,7 @@ config USB_CHIPIDEA
tristate "ChipIdea Highspeed Dual Role Controller"
depends on ((USB_EHCI_HCD && USB_GADGET) || (USB_EHCI_HCD && !USB_GADGET) || (!USB_EHCI_HCD && USB_GADGET)) && HAS_DMA
select EXTCON
+ select RESET_CONTROLLER
help
Say Y here if your system has a dual role high speed USB
controller based on ChipIdea silicon IP. It supports: