diff options
| author | Douglas Anderson <dianders@chromium.org> | 2019-04-16 14:53:49 -0700 |
|---|---|---|
| committer | Felipe Balbi <felipe.balbi@linux.intel.com> | 2019-05-03 09:13:47 +0300 |
| commit | c40cf7705e13d288d900e044c0a2f756e9e4909a (patch) | |
| tree | 31ab9133f03c69cda3587744766a8ce59a72eddb /drivers/usb/dwc2/core.h | |
| parent | cc389eaabd7082a14e46aaa5a02f87c9eef37d7f (diff) | |
usb: dwc2: optionally assert phy reset when waking up
On the rk3288 USB host-only port (the one that's not the OTG-enabled
port) the PHY can get into a bad state when a wakeup is asserted (not
just a wakeup from full system suspend but also a wakeup from
autosuspend).
We can get the PHY out of its bad state by asserting its "port reset",
but unfortunately that seems to assert a reset onto the USB bus so it
could confuse things if we don't actually deenumerate / reenumerate the
device.
We can also get the PHY out of its bad state by fully resetting it using
the reset from the CRU (clock reset unit), which does a more full
reset. The CRU-based reset appears to actually cause devices on the bus
to be removed and reinserted, which fixes the problem (albeit in a hacky
way).
It's unfortunate that we need to do a full re-enumeration of devices at
wakeup time, but this is better than alternative of letting the bus get
wedged.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Diffstat (limited to 'drivers/usb/dwc2/core.h')
| -rw-r--r-- | drivers/usb/dwc2/core.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h index 30bab8463c96..764c78ebee28 100644 --- a/drivers/usb/dwc2/core.h +++ b/drivers/usb/dwc2/core.h @@ -859,6 +859,8 @@ struct dwc2_hregs_backup { * @gadget_enabled: Peripheral mode sub-driver initialization indicator. * @ll_hw_enabled: Status of low-level hardware resources. * @hibernated: True if core is hibernated + * @reset_phy_on_wake: Quirk saying that we should assert PHY reset on a + * remote wakeup. * @frame_number: Frame number read from the core. For both device * and host modes. The value ranges are from 0 * to HFNUM_MAX_FRNUM. @@ -972,6 +974,7 @@ struct dwc2_hregs_backup { * @status_buf_dma: DMA address for status_buf * @start_work: Delayed work for handling host A-cable connection * @reset_work: Delayed work for handling a port reset + * @phy_reset_work: Work structure for doing a PHY reset * @otg_port: OTG port number * @frame_list: Frame list * @frame_list_dma: Frame list DMA address @@ -1045,6 +1048,7 @@ struct dwc2_hsotg { unsigned int gadget_enabled:1; unsigned int ll_hw_enabled:1; unsigned int hibernated:1; + unsigned int reset_phy_on_wake:1; u16 frame_number; struct phy *phy; @@ -1147,6 +1151,7 @@ struct dwc2_hsotg { struct delayed_work start_work; struct delayed_work reset_work; + struct work_struct phy_reset_work; u8 otg_port; u32 *frame_list; dma_addr_t frame_list_dma; @@ -1431,6 +1436,8 @@ int dwc2_restore_host_registers(struct dwc2_hsotg *hsotg); int dwc2_host_enter_hibernation(struct dwc2_hsotg *hsotg); int dwc2_host_exit_hibernation(struct dwc2_hsotg *hsotg, int rem_wakeup, int reset); +static inline void dwc2_host_schedule_phy_reset(struct dwc2_hsotg *hsotg) +{ schedule_work(&hsotg->phy_reset_work); } #else static inline int dwc2_hcd_get_frame_number(struct dwc2_hsotg *hsotg) { return 0; } @@ -1454,6 +1461,7 @@ static inline int dwc2_host_enter_hibernation(struct dwc2_hsotg *hsotg) static inline int dwc2_host_exit_hibernation(struct dwc2_hsotg *hsotg, int rem_wakeup, int reset) { return 0; } +static inline void dwc2_host_schedule_phy_reset(struct dwc2_hsotg *hsotg) {} #endif |