diff options
| author | Gregory Herrero <gregory.herrero@intel.com> | 2015-11-20 11:49:29 +0100 |
|---|---|---|
| committer | Felipe Balbi <balbi@ti.com> | 2015-12-15 09:12:41 -0600 |
| commit | 95105a998dff0747327f11708ea24480ee0eca54 (patch) | |
| tree | c634437396d62b1672f56b6a1f884374a4980271 /drivers/usb/dwc2/hcd.h | |
| parent | fbb9e22b15ad3c9a98c66bad801b4d1366e8bf20 (diff) | |
usb: dwc2: host: avoid usage of dma_alloc_coherent with irqs disabled
Use Streaming DMA mappings to handle cache coherency of frame list and
descriptor list. Cache are always flushed before controller access it
or before cpu access it.
Acked-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Gregory Herrero <gregory.herrero@intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'drivers/usb/dwc2/hcd.h')
| -rw-r--r-- | drivers/usb/dwc2/hcd.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/usb/dwc2/hcd.h b/drivers/usb/dwc2/hcd.h index 2e5e9d9a0016..6e822661a69e 100644 --- a/drivers/usb/dwc2/hcd.h +++ b/drivers/usb/dwc2/hcd.h @@ -107,6 +107,7 @@ struct dwc2_qh; * @qh: QH for the transfer being processed by this channel * @hc_list_entry: For linking to list of host channels * @desc_list_addr: Current QH's descriptor list DMA address + * @desc_list_sz: Current QH's descriptor list size * * This structure represents the state of a single host channel when acting in * host mode. It contains the data items needed to transfer packets to an @@ -159,6 +160,7 @@ struct dwc2_host_chan { struct dwc2_qh *qh; struct list_head hc_list_entry; dma_addr_t desc_list_addr; + u32 desc_list_sz; }; struct dwc2_hcd_pipe_info { @@ -251,6 +253,7 @@ enum dwc2_transaction_type { * schedule * @desc_list: List of transfer descriptors * @desc_list_dma: Physical address of desc_list + * @desc_list_sz: Size of descriptors list * @n_bytes: Xfer Bytes array. Each element corresponds to a transfer * descriptor and indicates original XferSize value for the * descriptor @@ -284,6 +287,7 @@ struct dwc2_qh { struct list_head qh_list_entry; struct dwc2_hcd_dma_desc *desc_list; dma_addr_t desc_list_dma; + u32 desc_list_sz; u32 *n_bytes; unsigned tt_buffer_dirty:1; }; |