diff options
author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-07-30 10:08:09 +0200 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-07-30 10:08:09 +0200 |
commit | d2fc88a61b4ea99f574bde16e92718e22f312136 (patch) | |
tree | f256841ebcbc3b90fc29d7fa751610ba9aac5a2b /drivers/usb/gadget/udc/aspeed-vhub/vhub.h | |
parent | e16f4f3e0b7daecd48d4f944ab4147c1a6cb16a8 (diff) | |
parent | acb1872577b346bd15ab3a3f8dff780d6cca4b70 (diff) |
Merge 4.18-rc7 into driver-core-next
We need the driver core changes in here as well for testing.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/usb/gadget/udc/aspeed-vhub/vhub.h')
-rw-r--r-- | drivers/usb/gadget/udc/aspeed-vhub/vhub.h | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/drivers/usb/gadget/udc/aspeed-vhub/vhub.h b/drivers/usb/gadget/udc/aspeed-vhub/vhub.h index 2b040257bc1f..4ed03d33a5a9 100644 --- a/drivers/usb/gadget/udc/aspeed-vhub/vhub.h +++ b/drivers/usb/gadget/udc/aspeed-vhub/vhub.h @@ -462,6 +462,39 @@ enum std_req_rc { #define DDBG(d, fmt, ...) do { } while(0) #endif +static inline void vhub_dma_workaround(void *addr) +{ + /* + * This works around a confirmed HW issue with the Aspeed chip. + * + * The core uses a different bus to memory than the AHB going to + * the USB device controller. Due to the latter having a higher + * priority than the core for arbitration on that bus, it's + * possible for an MMIO to the device, followed by a DMA by the + * device from memory to all be performed and services before + * a previous store to memory gets completed. + * + * This the following scenario can happen: + * + * - Driver writes to a DMA descriptor (Mbus) + * - Driver writes to the MMIO register to start the DMA (AHB) + * - The gadget sees the second write and sends a read of the + * descriptor to the memory controller (Mbus) + * - The gadget hits memory before the descriptor write + * causing it to read an obsolete value. + * + * Thankfully the problem is limited to the USB gadget device, other + * masters in the SoC all have a lower priority than the core, thus + * ensuring that the store by the core arrives first. + * + * The workaround consists of using a dummy read of the memory before + * doing the MMIO writes. This will ensure that the previous writes + * have been "pushed out". + */ + mb(); + (void)__raw_readl((void __iomem *)addr); +} + /* core.c */ void ast_vhub_done(struct ast_vhub_ep *ep, struct ast_vhub_req *req, int status); |