summaryrefslogtreecommitdiff
path: root/drivers/video
diff options
context:
space:
mode:
authorMaarten Lankhorst <maarten.lankhorst@linux.intel.com>2018-05-11 18:08:10 +0200
committerMaarten Lankhorst <maarten.lankhorst@linux.intel.com>2018-05-11 18:08:10 +0200
commit94cc2fde365fb4484080ea6675bb1e0c933f8002 (patch)
treea249c6f6b12ff2dbe39d78bfb050e9c28619bee9 /drivers/video
parent900aa8ad21587e909603f471b6cd81fd5338ec45 (diff)
parent8eb008c80841e3410ef2c043093478ea36bb5ff1 (diff)
Merge remote-tracking branch 'drm/drm-next' into drm-misc-next
drm-misc-next is still based on v4.16-rc7, and was getting a bit stale. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Diffstat (limited to 'drivers/video')
-rw-r--r--drivers/video/Kconfig8
-rw-r--r--drivers/video/console/Kconfig9
-rw-r--r--drivers/video/console/dummycon.c69
-rw-r--r--drivers/video/console/newport_con.c8
-rw-r--r--drivers/video/console/sticore.c4
-rw-r--r--drivers/video/console/vgacon.c20
-rw-r--r--drivers/video/fbdev/Kconfig111
-rw-r--r--drivers/video/fbdev/Makefile5
-rw-r--r--drivers/video/fbdev/amba-clcd.c3
-rw-r--r--drivers/video/fbdev/atmel_lcdfb.c31
-rw-r--r--drivers/video/fbdev/aty/aty128fb.c2
-rw-r--r--drivers/video/fbdev/aty/mach64_ct.c2
-rw-r--r--drivers/video/fbdev/aty/radeon_base.c21
-rw-r--r--drivers/video/fbdev/au1100fb.c9
-rw-r--r--drivers/video/fbdev/bf537-lq035.c891
-rw-r--r--drivers/video/fbdev/bf54x-lq043fb.c764
-rw-r--r--drivers/video/fbdev/bfin-lq035q1-fb.c864
-rw-r--r--drivers/video/fbdev/bfin-t350mcqb-fb.c669
-rw-r--r--drivers/video/fbdev/bfin_adv7393fb.c828
-rw-r--r--drivers/video/fbdev/bfin_adv7393fb.h319
-rw-r--r--drivers/video/fbdev/core/fbcon.c3
-rw-r--r--drivers/video/fbdev/fsl-diu-fb.c6
-rw-r--r--drivers/video/fbdev/matrox/matroxfb_crtc2.c5
-rw-r--r--drivers/video/fbdev/offb.c2
-rw-r--r--drivers/video/fbdev/s1d13xxxfb.c10
-rw-r--r--drivers/video/fbdev/s3c-fb.c168
-rw-r--r--drivers/video/fbdev/sis/init.h76
-rw-r--r--drivers/video/fbdev/sis/init301.c326
-rw-r--r--drivers/video/fbdev/sis/init301.h320
-rw-r--r--drivers/video/fbdev/sis/sis.h131
-rw-r--r--drivers/video/fbdev/sis/sis_main.c51
-rw-r--r--drivers/video/fbdev/sis/sis_main.h117
-rw-r--r--drivers/video/fbdev/smscufx.c59
-rw-r--r--drivers/video/fbdev/ssd1307fb.c3
-rw-r--r--drivers/video/fbdev/stifb.c8
-rw-r--r--drivers/video/fbdev/udlfb.c39
-rw-r--r--drivers/video/fbdev/vermilion/vermilion.c2
-rw-r--r--drivers/video/fbdev/via/via_aux_sii164.c2
-rw-r--r--drivers/video/fbdev/via/via_aux_vt1631.c2
-rw-r--r--drivers/video/fbdev/via/via_aux_vt1632.c2
-rw-r--r--drivers/video/fbdev/via/via_aux_vt1636.c2
-rw-r--r--drivers/video/logo/Kconfig15
-rw-r--r--drivers/video/logo/Makefile3
-rw-r--r--drivers/video/logo/logo.c12
-rw-r--r--drivers/video/logo/logo_blackfin_clut224.ppm1127
-rw-r--r--drivers/video/logo/logo_blackfin_vga16.ppm1127
-rw-r--r--drivers/video/logo/logo_m32r_clut224.ppm1292
-rw-r--r--drivers/video/of_display_timing.c20
48 files changed, 686 insertions, 8881 deletions
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 3c20af999893..83d3d271ca15 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -3,12 +3,10 @@
#
menu "Graphics support"
- depends on HAS_IOMEM
-config HAVE_FB_ATMEL
- bool
+if HAS_IOMEM
-config SH_LCD_MIPI_DSI
+config HAVE_FB_ATMEL
bool
source "drivers/char/agp/Kconfig"
@@ -36,6 +34,8 @@ config VIDEOMODE_HELPERS
config HDMI
bool
+endif # HAS_IOMEM
+
if VT
source "drivers/video/console/Kconfig"
endif
diff --git a/drivers/video/console/Kconfig b/drivers/video/console/Kconfig
index 7f1f1fbcef9e..4110ba7d7ca9 100644
--- a/drivers/video/console/Kconfig
+++ b/drivers/video/console/Kconfig
@@ -6,10 +6,9 @@ menu "Console display driver support"
config VGA_CONSOLE
bool "VGA text console" if EXPERT || !X86
- depends on !4xx && !PPC_8xx && !SPARC && !M68K && !PARISC && !FRV && \
- !SUPERH && !BLACKFIN && !AVR32 && !MN10300 && !CRIS && \
+ depends on !4xx && !PPC_8xx && !SPARC && !M68K && !PARISC && !SUPERH && \
(!ARM || ARCH_FOOTBRIDGE || ARCH_INTEGRATOR || ARCH_NETWINDER) && \
- !ARM64 && !ARC && !MICROBLAZE && !OPENRISC
+ !ARM64 && !ARC && !MICROBLAZE && !OPENRISC && !NDS32 && !S390
default y
help
Saying Y here will allow you to use Linux in text mode through a
@@ -85,7 +84,7 @@ config MDA_CONSOLE
config SGI_NEWPORT_CONSOLE
tristate "SGI Newport Console support"
- depends on SGI_IP22
+ depends on SGI_IP22 && HAS_IOMEM
select FONT_SUPPORT
help
Say Y here if you want the console on the Newport aka XL graphics
@@ -153,7 +152,7 @@ config FRAMEBUFFER_CONSOLE_ROTATION
config STI_CONSOLE
bool "STI text console"
- depends on PARISC
+ depends on PARISC && HAS_IOMEM
select FONT_SUPPORT
default y
help
diff --git a/drivers/video/console/dummycon.c b/drivers/video/console/dummycon.c
index b90ef96e43d6..f2eafe2ed980 100644
--- a/drivers/video/console/dummycon.c
+++ b/drivers/video/console/dummycon.c
@@ -41,12 +41,47 @@ static void dummycon_init(struct vc_data *vc, int init)
vc_resize(vc, DUMMY_COLUMNS, DUMMY_ROWS);
}
-static int dummycon_dummy(void)
+static void dummycon_deinit(struct vc_data *vc) { }
+static void dummycon_clear(struct vc_data *vc, int sy, int sx, int height,
+ int width) { }
+static void dummycon_putc(struct vc_data *vc, int c, int ypos, int xpos) { }
+static void dummycon_putcs(struct vc_data *vc, const unsigned short *s,
+ int count, int ypos, int xpos) { }
+static void dummycon_cursor(struct vc_data *vc, int mode) { }
+
+static bool dummycon_scroll(struct vc_data *vc, unsigned int top,
+ unsigned int bottom, enum con_scroll dir,
+ unsigned int lines)
+{
+ return false;
+}
+
+static int dummycon_switch(struct vc_data *vc)
{
- return 0;
+ return 0;
}
-#define DUMMY (void *)dummycon_dummy
+static int dummycon_blank(struct vc_data *vc, int blank, int mode_switch)
+{
+ return 0;
+}
+
+static int dummycon_font_set(struct vc_data *vc, struct console_font *font,
+ unsigned int flags)
+{
+ return 0;
+}
+
+static int dummycon_font_default(struct vc_data *vc,
+ struct console_font *font, char *name)
+{
+ return 0;
+}
+
+static int dummycon_font_copy(struct vc_data *vc, int con)
+{
+ return 0;
+}
/*
* The console `switch' structure for the dummy console
@@ -55,19 +90,19 @@ static int dummycon_dummy(void)
*/
const struct consw dummy_con = {
- .owner = THIS_MODULE,
- .con_startup = dummycon_startup,
- .con_init = dummycon_init,
- .con_deinit = DUMMY,
- .con_clear = DUMMY,
- .con_putc = DUMMY,
- .con_putcs = DUMMY,
- .con_cursor = DUMMY,
- .con_scroll = DUMMY,
- .con_switch = DUMMY,
- .con_blank = DUMMY,
- .con_font_set = DUMMY,
- .con_font_default = DUMMY,
- .con_font_copy = DUMMY,
+ .owner = THIS_MODULE,
+ .con_startup = dummycon_startup,
+ .con_init = dummycon_init,
+ .con_deinit = dummycon_deinit,
+ .con_clear = dummycon_clear,
+ .con_putc = dummycon_putc,
+ .con_putcs = dummycon_putcs,
+ .con_cursor = dummycon_cursor,
+ .con_scroll = dummycon_scroll,
+ .con_switch = dummycon_switch,
+ .con_blank = dummycon_blank,
+ .con_font_set = dummycon_font_set,
+ .con_font_default = dummycon_font_default,
+ .con_font_copy = dummycon_font_copy,
};
EXPORT_SYMBOL_GPL(dummy_con);
diff --git a/drivers/video/console/newport_con.c b/drivers/video/console/newport_con.c
index 42d02a206059..7f2526b43b33 100644
--- a/drivers/video/console/newport_con.c
+++ b/drivers/video/console/newport_con.c
@@ -673,12 +673,12 @@ static bool newport_scroll(struct vc_data *vc, unsigned int t, unsigned int b,
return true;
}
-static int newport_dummy(struct vc_data *c)
+static int newport_set_origin(struct vc_data *vc)
{
return 0;
}
-#define DUMMY (void *) newport_dummy
+static void newport_save_screen(struct vc_data *vc) { }
const struct consw newport_con = {
.owner = THIS_MODULE,
@@ -694,8 +694,8 @@ const struct consw newport_con = {
.con_blank = newport_blank,
.con_font_set = newport_font_set,
.con_font_default = newport_font_default,
- .con_set_origin = DUMMY,
- .con_save_screen = DUMMY
+ .con_set_origin = newport_set_origin,
+ .con_save_screen = newport_save_screen
};
static int newport_probe(struct gio_device *dev,
diff --git a/drivers/video/console/sticore.c b/drivers/video/console/sticore.c
index d1d3796773aa..08b822656846 100644
--- a/drivers/video/console/sticore.c
+++ b/drivers/video/console/sticore.c
@@ -827,10 +827,8 @@ static struct sti_struct *sti_try_rom_generic(unsigned long address,
}
sti = kzalloc(sizeof(*sti), GFP_KERNEL);
- if (!sti) {
- printk(KERN_ERR "Not enough memory !\n");
+ if (!sti)
return NULL;
- }
spin_lock_init(&sti->lock);
diff --git a/drivers/video/console/vgacon.c b/drivers/video/console/vgacon.c
index a17ba1465815..f09e17b60e45 100644
--- a/drivers/video/console/vgacon.c
+++ b/drivers/video/console/vgacon.c
@@ -1272,7 +1272,8 @@ static int vgacon_adjust_height(struct vc_data *vc, unsigned fontheight)
return 0;
}
-static int vgacon_font_set(struct vc_data *c, struct console_font *font, unsigned flags)
+static int vgacon_font_set(struct vc_data *c, struct console_font *font,
+ unsigned int flags)
{
unsigned charcount = font->charcount;
int rc;
@@ -1407,21 +1408,20 @@ static bool vgacon_scroll(struct vc_data *c, unsigned int t, unsigned int b,
* The console `switch' structure for the VGA based console
*/
-static int vgacon_dummy(struct vc_data *c)
-{
- return 0;
-}
-
-#define DUMMY (void *) vgacon_dummy
+static void vgacon_clear(struct vc_data *vc, int sy, int sx, int height,
+ int width) { }
+static void vgacon_putc(struct vc_data *vc, int c, int ypos, int xpos) { }
+static void vgacon_putcs(struct vc_data *vc, const unsigned short *s,
+ int count, int ypos, int xpos) { }
const struct consw vga_con = {
.owner = THIS_MODULE,
.con_startup = vgacon_startup,
.con_init = vgacon_init,
.con_deinit = vgacon_deinit,
- .con_clear = DUMMY,
- .con_putc = DUMMY,
- .con_putcs = DUMMY,
+ .con_clear = vgacon_clear,
+ .con_putc = vgacon_putc,
+ .con_putcs = vgacon_putcs,
.con_cursor = vgacon_cursor,
.con_scroll = vgacon_scroll,
.con_switch = vgacon_switch,
diff --git a/drivers/video/fbdev/Kconfig b/drivers/video/fbdev/Kconfig
index 11e699f1062b..d94254263ea5 100644
--- a/drivers/video/fbdev/Kconfig
+++ b/drivers/video/fbdev/Kconfig
@@ -580,109 +580,6 @@ config FB_VGA16
To compile this driver as a module, choose M here: the
module will be called vga16fb.
-config FB_BF54X_LQ043
- tristate "SHARP LQ043 TFT LCD (BF548 EZKIT)"
- depends on FB && (BF54x) && !BF542
- select FB_CFB_FILLRECT
- select FB_CFB_COPYAREA
- select FB_CFB_IMAGEBLIT
- help
- This is the framebuffer device driver for a SHARP LQ043T1DG01 TFT LCD
-
-config FB_BFIN_T350MCQB
- tristate "Varitronix COG-T350MCQB TFT LCD display (BF527 EZKIT)"
- depends on FB && BLACKFIN
- select BFIN_GPTIMERS
- select FB_CFB_FILLRECT
- select FB_CFB_COPYAREA
- select FB_CFB_IMAGEBLIT
- help
- This is the framebuffer device driver for a Varitronix VL-PS-COG-T350MCQB-01 display TFT LCD
- This display is a QVGA 320x240 24-bit RGB display interfaced by an 8-bit wide PPI
- It uses PPI[0..7] PPI_FS1, PPI_FS2 and PPI_CLK.
-
-config FB_BFIN_LQ035Q1
- tristate "SHARP LQ035Q1DH02 TFT LCD"
- depends on FB && BLACKFIN && SPI
- select FB_CFB_FILLRECT
- select FB_CFB_COPYAREA
- select FB_CFB_IMAGEBLIT
- select BFIN_GPTIMERS
- help
- This is the framebuffer device driver for a SHARP LQ035Q1DH02 TFT display found on
- the Blackfin Landscape LCD EZ-Extender Card.
- This display is a QVGA 320x240 18-bit RGB display interfaced by an 16-bit wide PPI
- It uses PPI[0..15] PPI_FS1, PPI_FS2 and PPI_CLK.
-
- To compile this driver as a module, choose M here: the
- module will be called bfin-lq035q1-fb.
-
-config FB_BF537_LQ035
- tristate "SHARP LQ035 TFT LCD (BF537 STAMP)"
- depends on FB && (BF534 || BF536 || BF537) && I2C_BLACKFIN_TWI
- select FB_CFB_FILLRECT
- select FB_CFB_COPYAREA
- select FB_CFB_IMAGEBLIT
- select BFIN_GPTIMERS
- help
- This is the framebuffer device for a SHARP LQ035Q7DB03 TFT LCD
- attached to a BF537.
-
- To compile this driver as a module, choose M here: the
- module will be called bf537-lq035.
-
-config FB_BFIN_7393
- tristate "Blackfin ADV7393 Video encoder"
- depends on FB && BLACKFIN
- select I2C
- select FB_CFB_FILLRECT
- select FB_CFB_COPYAREA
- select FB_CFB_IMAGEBLIT
- help
- This is the framebuffer device for a ADV7393 video encoder
- attached to a Blackfin on the PPI port.
- If your Blackfin board has a ADV7393 select Y.
-
- To compile this driver as a module, choose M here: the
- module will be called bfin_adv7393fb.
-
-choice
- prompt "Video mode support"
- depends on FB_BFIN_7393
- default NTSC
-
-config NTSC
- bool 'NTSC 720x480'
-
-config PAL
- bool 'PAL 720x576'
-
-config NTSC_640x480
- bool 'NTSC 640x480 (Experimental)'
-
-config PAL_640x480
- bool 'PAL 640x480 (Experimental)'
-
-config NTSC_YCBCR
- bool 'NTSC 720x480 YCbCR input'
-
-config PAL_YCBCR
- bool 'PAL 720x576 YCbCR input'
-
-endchoice
-
-choice
- prompt "Size of ADV7393 frame buffer memory Single/Double Size"
- depends on (FB_BFIN_7393)
- default ADV7393_1XMEM
-
-config ADV7393_1XMEM
- bool 'Single'
-
-config ADV7393_2XMEM
- bool 'Double'
-endchoice
-
config FB_STI
tristate "HP STI frame buffer device support"
depends on FB && PARISC
@@ -1156,6 +1053,11 @@ config FB_I810_I2C
bool "Enable DDC Support"
depends on FB_I810 && FB_I810_GTF
select FB_DDC
+ help
+ Add DDC/I2C support for i810fb. This will allow the driver to get
+ display information, especially for monitors with fickle timings.
+
+ If unsure, say Y.
config FB_LE80578
tristate "Intel LE80578 (Vermilion) support"
@@ -2020,8 +1922,7 @@ config FB_TMIO_ACCELL
config FB_S3C
tristate "Samsung S3C framebuffer support"
- depends on FB && (CPU_S3C2416 || ARCH_S3C64XX || \
- ARCH_S5PV210 || ARCH_EXYNOS)
+ depends on FB && (CPU_S3C2416 || ARCH_S3C64XX)
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
diff --git a/drivers/video/fbdev/Makefile b/drivers/video/fbdev/Makefile
index 115961e0721b..55282a21b500 100644
--- a/drivers/video/fbdev/Makefile
+++ b/drivers/video/fbdev/Makefile
@@ -136,11 +136,6 @@ obj-$(CONFIG_FB_VESA) += vesafb.o
obj-$(CONFIG_FB_EFI) += efifb.o
obj-$(CONFIG_FB_VGA16) += vga16fb.o
obj-$(CONFIG_FB_OF) += offb.o
-obj-$(CONFIG_FB_BF537_LQ035) += bf537-lq035.o
-obj-$(CONFIG_FB_BF54X_LQ043) += bf54x-lq043fb.o
-obj-$(CONFIG_FB_BFIN_LQ035Q1) += bfin-lq035q1-fb.o
-obj-$(CONFIG_FB_BFIN_T350MCQB) += bfin-t350mcqb-fb.o
-obj-$(CONFIG_FB_BFIN_7393) += bfin_adv7393fb.o
obj-$(CONFIG_FB_MX3) += mx3fb.o
obj-$(CONFIG_FB_DA8XX) += da8xx-fb.o
obj-$(CONFIG_FB_MXS) += mxsfb.o
diff --git a/drivers/video/fbdev/amba-clcd.c b/drivers/video/fbdev/amba-clcd.c
index 36d25190b48c..38c1f324ce15 100644
--- a/drivers/video/fbdev/amba-clcd.c
+++ b/drivers/video/fbdev/amba-clcd.c
@@ -967,9 +967,8 @@ static int clcdfb_probe(struct amba_device *dev, const struct amba_id *id)
goto out;
}
- fb = kzalloc(sizeof(struct clcd_fb), GFP_KERNEL);
+ fb = kzalloc(sizeof(*fb), GFP_KERNEL);
if (!fb) {
- printk(KERN_INFO "CLCD: could not allocate new clcd_fb struct\n");
ret = -ENOMEM;
goto free_region;
}
diff --git a/drivers/video/fbdev/atmel_lcdfb.c b/drivers/video/fbdev/atmel_lcdfb.c
index 3dee267d7c75..076d24afbd72 100644
--- a/drivers/video/fbdev/atmel_lcdfb.c
+++ b/drivers/video/fbdev/atmel_lcdfb.c
@@ -18,10 +18,10 @@
#include <linux/delay.h>
#include <linux/backlight.h>
#include <linux/gfp.h>
+#include <linux/gpio/consumer.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_device.h>
-#include <linux/of_gpio.h>
#include <video/of_display_timing.h>
#include <linux/regulator/consumer.h>
#include <video/videomode.h>
@@ -61,8 +61,7 @@ struct atmel_lcdfb_info {
};
struct atmel_lcdfb_power_ctrl_gpio {
- int gpio;
- int active_low;
+ struct gpio_desc *gpiod;
struct list_head list;
};
@@ -1018,7 +1017,7 @@ static void atmel_lcdfb_power_control_gpio(struct atmel_lcdfb_pdata *pdata, int
struct atmel_lcdfb_power_ctrl_gpio *og;
list_for_each_entry(og, &pdata->pwr_gpios, list)
- gpio_set_value(og->gpio, on);
+ gpiod_set_value(og->gpiod, on);
}
static int atmel_lcdfb_of_init(struct atmel_lcdfb_info *sinfo)
@@ -1031,11 +1030,11 @@ static int atmel_lcdfb_of_init(struct atmel_lcdfb_info *sinfo)
struct device_node *display_np;
struct device_node *timings_np;
struct display_timings *timings;
- enum of_gpio_flags flags;
struct atmel_lcdfb_power_ctrl_gpio *og;
bool is_gpio_power = false;
+ struct gpio_desc *gpiod;
int ret = -ENOENT;
- int i, gpio;
+ int i;
sinfo->config = (struct atmel_lcdfb_config*)
of_match_device(atmel_lcdfb_dt_ids, dev)->data;
@@ -1072,28 +1071,22 @@ static int atmel_lcdfb_of_init(struct atmel_lcdfb_info *sinfo)
INIT_LIST_HEAD(&pdata->pwr_gpios);
ret = -ENOMEM;
- for (i = 0; i < of_gpio_named_count(display_np, "atmel,power-control-gpio"); i++) {
- gpio = of_get_named_gpio_flags(display_np, "atmel,power-control-gpio",
- i, &flags);
- if (gpio < 0)
+ for (i = 0; i < gpiod_count(dev, "atmel,power-control"); i++) {
+ gpiod = devm_gpiod_get_index(dev, "atmel,power-control",
+ i, GPIOD_ASIS);
+ if (IS_ERR(gpiod))
continue;
og = devm_kzalloc(dev, sizeof(*og), GFP_KERNEL);
if (!og)
goto put_display_node;
- og->gpio = gpio;
- og->active_low = flags & OF_GPIO_ACTIVE_LOW;
+ og->gpiod = gpiod;
is_gpio_power = true;
- ret = devm_gpio_request(dev, gpio, "lcd-power-control-gpio");
- if (ret) {
- dev_err(dev, "request gpio %d failed\n", gpio);
- goto put_display_node;
- }
- ret = gpio_direction_output(gpio, og->active_low);
+ ret = gpiod_direction_output(gpiod, gpiod_is_active_low(gpiod));
if (ret) {
- dev_err(dev, "set direction output gpio %d failed\n", gpio);
+ dev_err(dev, "set direction output gpio atmel,power-control[%d] failed\n", i);
goto put_display_node;
}
list_add(&og->list, &pdata->pwr_gpios);
diff --git a/drivers/video/fbdev/aty/aty128fb.c b/drivers/video/fbdev/aty/aty128fb.c
index db18474607c9..09b0e558dce8 100644
--- a/drivers/video/fbdev/aty/aty128fb.c
+++ b/drivers/video/fbdev/aty/aty128fb.c
@@ -1716,7 +1716,7 @@ static int aty128fb_setup(char *options)
continue;
}
if(!strncmp(this_opt, "nomtrr", 6)) {
- mtrr = 0;
+ mtrr = false;
continue;
}
#ifdef CONFIG_PPC_PMAC
diff --git a/drivers/video/fbdev/aty/mach64_ct.c b/drivers/video/fbdev/aty/mach64_ct.c
index 7d3bd723d3d5..74a62aa193c0 100644
--- a/drivers/video/fbdev/aty/mach64_ct.c
+++ b/drivers/video/fbdev/aty/mach64_ct.c
@@ -180,7 +180,7 @@ static int aty_dsp_gt(const struct fb_info *info, u32 bpp, struct pll_ct *pll)
dsp_on = ((multiplier << vshift) + divider) / divider;
tmp = ((ras_multiplier << xshift) + ras_divider) / ras_divider;
if (dsp_on < tmp)
- dsp_on = tmp;
+ dsp_on = tmp;
dsp_on = dsp_on + (tmp * 2) + (pll->xclkpagefaultdelay << xshift);
}
diff --git a/drivers/video/fbdev/aty/radeon_base.c b/drivers/video/fbdev/aty/radeon_base.c
index 87608c0b2351..e8594bbaea60 100644
--- a/drivers/video/fbdev/aty/radeon_base.c
+++ b/drivers/video/fbdev/aty/radeon_base.c
@@ -2255,6 +2255,23 @@ static const struct bin_attribute edid2_attr = {
.read = radeon_show_edid2,
};
+static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
+{
+ struct apertures_struct *ap;
+
+ ap = alloc_apertures(1);
+ if (!ap)
+ return -ENOMEM;
+
+ ap->ranges[0].base = pci_resource_start(pdev, 0);
+ ap->ranges[0].size = pci_resource_len(pdev, 0);
+
+ remove_conflicting_framebuffers(ap, KBUILD_MODNAME, false);
+
+ kfree(ap);
+
+ return 0;
+}
static int radeonfb_pci_register(struct pci_dev *pdev,
const struct pci_device_id *ent)
@@ -2308,6 +2325,10 @@ static int radeonfb_pci_register(struct pci_dev *pdev,
rinfo->fb_base_phys = pci_resource_start (pdev, 0);
rinfo->mmio_base_phys = pci_resource_start (pdev, 2);
+ ret = radeon_kick_out_firmware_fb(pdev);
+ if (ret)
+ return ret;
+
/* request the mem regions */
ret = pci_request_region(pdev, 0, "radeonfb framebuffer");
if (ret < 0) {
diff --git a/drivers/video/fbdev/au1100fb.c b/drivers/video/fbdev/au1100fb.c
index 8de42f617d16..7c9a672e9811 100644
--- a/drivers/video/fbdev/au1100fb.c
+++ b/drivers/video/fbdev/au1100fb.c
@@ -410,18 +410,15 @@ static int au1100fb_setup(struct au1100fb_device *fbdev)
static int au1100fb_drv_probe(struct platform_device *dev)
{
- struct au1100fb_device *fbdev = NULL;
+ struct au1100fb_device *fbdev;
struct resource *regs_res;
unsigned long page;
struct clk *c;
/* Allocate new device private */
- fbdev = devm_kzalloc(&dev->dev, sizeof(struct au1100fb_device),
- GFP_KERNEL);
- if (!fbdev) {
- print_err("fail to allocate device private record");
+ fbdev = devm_kzalloc(&dev->dev, sizeof(*fbdev), GFP_KERNEL);
+ if (!fbdev)
return -ENOMEM;
- }
if (au1100fb_setup(fbdev))
goto failed;
diff --git a/drivers/video/fbdev/bf537-lq035.c b/drivers/video/fbdev/bf537-lq035.c
deleted file mode 100644
index ef29fb425122..000000000000
--- a/drivers/video/fbdev/bf537-lq035.c
+++ /dev/null
@@ -1,891 +0,0 @@
-/*
- * Analog Devices Blackfin(BF537 STAMP) + SHARP TFT LCD.
- * http://docs.blackfin.uclinux.org/doku.php?id=hw:cards:tft-lcd
- *
- * Copyright 2006-2010 Analog Devices Inc.
- * Licensed under the GPL-2.
- */
-
-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/delay.h>
-#include <linux/fb.h>
-#include <linux/ioport.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/gpio.h>
-#include <linux/interrupt.h>
-#include <linux/sched.h>
-#include <linux/timer.h>
-#include <linux/device.h>
-#include <linux/backlight.h>
-#include <linux/lcd.h>
-#include <linux/i2c.h>
-#include <linux/spinlock.h>
-#include <linux/dma-mapping.h>
-#include <linux/slab.h>
-#include <linux/platform_device.h>
-
-#include <asm/blackfin.h>
-#include <asm/irq.h>
-#include <asm/dpmc.h>
-#include <asm/dma.h>
-#include <asm/portmux.h>
-
-#define NO_BL 1
-
-#define MAX_BRIGHENESS 95
-#define MIN_BRIGHENESS 5
-#define NBR_PALETTE 256
-
-static const unsigned short ppi_pins[] = {
- P_PPI0_CLK, P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3,
- P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7,
- P_PPI0_D8, P_PPI0_D9, P_PPI0_D10, P_PPI0_D11,
- P_PPI0_D12, P_PPI0_D13, P_PPI0_D14, P_PPI0_D15, 0
-};
-
-static unsigned char *fb_buffer; /* RGB Buffer */
-static unsigned long *dma_desc_table;
-static int t_conf_done, lq035_open_cnt;
-static DEFINE_SPINLOCK(bfin_lq035_lock);
-
-static int landscape;
-module_param(landscape, int, 0);
-MODULE_PARM_DESC(landscape,
- "LANDSCAPE use 320x240 instead of Native 240x320 Resolution");
-
-static int bgr;
-module_param(bgr, int, 0);
-MODULE_PARM_DESC(bgr,
- "BGR use 16-bit BGR-565 instead of RGB-565");
-
-static int nocursor = 1;
-module_param(nocursor, int, 0644);
-MODULE_PARM_DESC(nocursor, "cursor enable/disable");
-
-static unsigned long current_brightness; /* backlight */
-
-/* AD5280 vcomm */
-static unsigned char vcomm_value = 150;
-static struct i2c_client *ad5280_client;
-
-static void set_vcomm(void)
-{
- int nr;
-
- if (!ad5280_client)
- return;
-
- nr = i2c_smbus_write_byte_data(ad5280_client, 0x00, vcomm_value);
- if (nr)
- pr_err("i2c_smbus_write_byte_data fail: %d\n", nr);
-}
-
-static int ad5280_probe(struct i2c_client *client,
- const struct i2c_device_id *id)
-{
- int ret;
- if (!i2c_check_functionality(client->adapter,
- I2C_FUNC_SMBUS_BYTE_DATA)) {
- dev_err(&client->dev, "SMBUS Byte Data not Supported\n");
- return -EIO;
- }
-
- ret = i2c_smbus_write_byte_data(client, 0x00, vcomm_value);
- if (ret) {
- dev_err(&client->dev, "write fail: %d\n", ret);
- return ret;
- }
-
- ad5280_client = client;
-
- return 0;
-}
-
-static int ad5280_remove(struct i2c_client *client)
-{
- ad5280_client = NULL;
- return 0;
-}
-
-static const struct i2c_device_id ad5280_id[] = {
- {"bf537-lq035-ad5280", 0},
- {}
-};
-
-MODULE_DEVICE_TABLE(i2c, ad5280_id);
-
-static struct i2c_driver ad5280_driver = {
- .driver = {
- .name = "bf537-lq035-ad5280",
- },
- .probe = ad5280_probe,
- .remove = ad5280_remove,
- .id_table = ad5280_id,
-};
-
-#ifdef CONFIG_PNAV10
-#define MOD GPIO_PH13
-
-#define bfin_write_TIMER_LP_CONFIG bfin_write_TIMER0_CONFIG
-#define bfin_write_TIMER_LP_WIDTH bfin_write_TIMER0_WIDTH
-#define bfin_write_TIMER_LP_PERIOD bfin_write_TIMER0_PERIOD
-#define bfin_read_TIMER_LP_COUNTER bfin_read_TIMER0_COUNTER
-#define TIMDIS_LP TIMDIS0
-#define TIMEN_LP TIMEN0
-
-#define bfin_write_TIMER_SPS_CONFIG bfin_write_TIMER1_CONFIG
-#define bfin_write_TIMER_SPS_WIDTH bfin_write_TIMER1_WIDTH
-#define bfin_write_TIMER_SPS_PERIOD bfin_write_TIMER1_PERIOD
-#define TIMDIS_SPS TIMDIS1
-#define TIMEN_SPS TIMEN1
-
-#define bfin_write_TIMER_SP_CONFIG bfin_write_TIMER5_CONFIG
-#define bfin_write_TIMER_SP_WIDTH bfin_write_TIMER5_WIDTH
-#define bfin_write_TIMER_SP_PERIOD bfin_write_TIMER5_PERIOD
-#define TIMDIS_SP TIMDIS5
-#define TIMEN_SP TIMEN5
-
-#define bfin_write_TIMER_PS_CLS_CONFIG bfin_write_TIMER2_CONFIG
-#define bfin_write_TIMER_PS_CLS_WIDTH bfin_write_TIMER2_WIDTH
-#define bfin_write_TIMER_PS_CLS_PERIOD bfin_write_TIMER2_PERIOD
-#define TIMDIS_PS_CLS TIMDIS2
-#define TIMEN_PS_CLS TIMEN2
-
-#define bfin_write_TIMER_REV_CONFIG bfin_write_TIMER3_CONFIG
-#define bfin_write_TIMER_REV_WIDTH bfin_write_TIMER3_WIDTH
-#define bfin_write_TIMER_REV_PERIOD bfin_write_TIMER3_PERIOD
-#define TIMDIS_REV TIMDIS3
-#define TIMEN_REV TIMEN3
-#define bfin_read_TIMER_REV_COUNTER bfin_read_TIMER3_COUNTER
-
-#define FREQ_PPI_CLK (5*1024*1024) /* PPI_CLK 5MHz */
-
-#define TIMERS {P_TMR0, P_TMR1, P_TMR2, P_TMR3, P_TMR5, 0}
-
-#else
-
-#define UD GPIO_PF13 /* Up / Down */
-#define MOD GPIO_PF10
-#define LBR GPIO_PF14 /* Left Right */
-
-#define bfin_write_TIMER_LP_CONFIG bfin_write_TIMER6_CONFIG
-#define bfin_write_TIMER_LP_WIDTH bfin_write_TIMER6_WIDTH
-#define bfin_write_TIMER_LP_PERIOD bfin_write_TIMER6_PERIOD
-#define bfin_read_TIMER_LP_COUNTER bfin_read_TIMER6_COUNTER
-#define TIMDIS_LP TIMDIS6
-#define TIMEN_LP TIMEN6
-
-#define bfin_write_TIMER_SPS_CONFIG bfin_write_TIMER1_CONFIG
-#define bfin_write_TIMER_SPS_WIDTH bfin_write_TIMER1_WIDTH
-#define bfin_write_TIMER_SPS_PERIOD bfin_write_TIMER1_PERIOD
-#define TIMDIS_SPS TIMDIS1
-#define TIMEN_SPS TIMEN1
-
-#define bfin_write_TIMER_SP_CONFIG bfin_write_TIMER0_CONFIG
-#define bfin_write_TIMER_SP_WIDTH bfin_write_TIMER0_WIDTH
-#define bfin_write_TIMER_SP_PERIOD bfin_write_TIMER0_PERIOD
-#define TIMDIS_SP TIMDIS0
-#define TIMEN_SP TIMEN0
-
-#define bfin_write_TIMER_PS_CLS_CONFIG bfin_write_TIMER7_CONFIG
-#define bfin_write_TIMER_PS_CLS_WIDTH bfin_write_TIMER7_WIDTH
-#define bfin_write_TIMER_PS_CLS_PERIOD bfin_write_TIMER7_PERIOD
-#define TIMDIS_PS_CLS TIMDIS7
-#define TIMEN_PS_CLS TIMEN7
-
-#define bfin_write_TIMER_REV_CONFIG bfin_write_TIMER5_CONFIG
-#define bfin_write_TIMER_REV_WIDTH bfin_write_TIMER5_WIDTH
-#define bfin_write_TIMER_REV_PERIOD bfin_write_TIMER5_PERIOD
-#define TIMDIS_REV TIMDIS5
-#define TIMEN_REV TIMEN5
-#define bfin_read_TIMER_REV_COUNTER bfin_read_TIMER5_COUNTER
-
-#define FREQ_PPI_CLK (6*1000*1000) /* PPI_CLK 6MHz */
-#define TIMERS {P_TMR0, P_TMR1, P_TMR5, P_TMR6, P_TMR7, 0}
-
-#endif
-
-#define LCD_X_RES 240 /* Horizontal Resolution */
-#define LCD_Y_RES 320 /* Vertical Resolution */
-
-#define LCD_BBP 16 /* Bit Per Pixel */
-
-/* the LCD and the DMA start counting differently;
- * since one starts at 0 and the other starts at 1,
- * we have a difference of 1 between START_LINES
- * and U_LINES.
- */
-#define START_LINES 8 /* lines for field flyback or field blanking signal */
-#define U_LINES 9 /* number of undisplayed blanking lines */
-
-#define FRAMES_PER_SEC (60)
-
-#define DCLKS_PER_FRAME (FREQ_PPI_CLK/FRAMES_PER_SEC)
-#define DCLKS_PER_LINE (DCLKS_PER_FRAME/(LCD_Y_RES+U_LINES))
-
-#define PPI_CONFIG_VALUE (PORT_DIR|XFR_TYPE|DLEN_16|POLS)
-#define PPI_DELAY_VALUE (0)
-#define TIMER_CONFIG (PWM_OUT|PERIOD_CNT|TIN_SEL|CLK_SEL)
-
-#define ACTIVE_VIDEO_MEM_OFFSET (LCD_X_RES*START_LINES*(LCD_BBP/8))
-#define ACTIVE_VIDEO_MEM_SIZE (LCD_Y_RES*LCD_X_RES*(LCD_BBP/8))
-#define TOTAL_VIDEO_MEM_SIZE ((LCD_Y_RES+U_LINES)*LCD_X_RES*(LCD_BBP/8))
-#define TOTAL_DMA_DESC_SIZE (2 * sizeof(u32) * (LCD_Y_RES + U_LINES))
-
-static void start_timers(void) /* CHECK with HW */
-{
- unsigned long flags;
-
- local_irq_save(flags);
-
- bfin_write_TIMER_ENABLE(TIMEN_REV);
- SSYNC();
-
- while (bfin_read_TIMER_REV_COUNTER() <= 11)
- continue;
- bfin_write_TIMER_ENABLE(TIMEN_LP);
- SSYNC();
-
- while (bfin_read_TIMER_LP_COUNTER() < 3)
- continue;
- bfin_write_TIMER_ENABLE(TIMEN_SP|TIMEN_SPS|TIMEN_PS_CLS);
- SSYNC();
- t_conf_done = 1;
- local_irq_restore(flags);
-}
-
-static void config_timers(void)
-{
- /* Stop timers */
- bfin_write_TIMER_DISABLE(TIMDIS_SP|TIMDIS_SPS|TIMDIS_REV|
- TIMDIS_LP|TIMDIS_PS_CLS);
- SSYNC();
-
- /* LP, timer 6 */
- bfin_write_TIMER_LP_CONFIG(TIMER_CONFIG|PULSE_HI);
- bfin_write_TIMER_LP_WIDTH(1);
-
- bfin_write_TIMER_LP_PERIOD(DCLKS_PER_LINE);
- SSYNC();
-
- /* SPS, timer 1 */
- bfin_write_TIMER_SPS_CONFIG(TIMER_CONFIG|PULSE_HI);
- bfin_write_TIMER_SPS_WIDTH(DCLKS_PER_LINE*2);
- bfin_write_TIMER_SPS_PERIOD((DCLKS_PER_LINE * (LCD_Y_RES+U_LINES)));
- SSYNC();
-
- /* SP, timer 0 */
- bfin_write_TIMER_SP_CONFIG(TIMER_CONFIG|PULSE_HI);
- bfin_write_TIMER_SP_WIDTH(1);
- bfin_write_TIMER_SP_PERIOD(DCLKS_PER_LINE);
- SSYNC();
-
- /* PS & CLS, timer 7 */
- bfin_write_TIMER_PS_CLS_CONFIG(TIMER_CONFIG);
- bfin_write_TIMER_PS_CLS_WIDTH(LCD_X_RES + START_LINES);
- bfin_write_TIMER_PS_CLS_PERIOD(DCLKS_PER_LINE);
-
- SSYNC();
-
-#ifdef NO_BL
- /* REV, timer 5 */
- bfin_write_TIMER_REV_CONFIG(TIMER_CONFIG|PULSE_HI);
-
- bfin_write_TIMER_REV_WIDTH(DCLKS_PER_LINE);
- bfin_write_TIMER_REV_PERIOD(DCLKS_PER_LINE*2);
-
- SSYNC();
-#endif
-}
-
-static void config_ppi(void)
-{
- bfin_write_PPI_DELAY(PPI_DELAY_VALUE);
- bfin_write_PPI_COUNT(LCD_X_RES-1);
- /* 0x10 -> PORT_CFG -> 2 or 3 frame syncs */
- bfin_write_PPI_CONTROL((PPI_CONFIG_VALUE|0x10) & (~POLS));
-}
-
-static int config_dma(void)
-{
- u32 i;
-
- if (landscape) {
-
- for (i = 0; i < U_LINES; ++i) {
- /* blanking lines point to first line of fb_buffer */
- dma_desc_table[2*i] = (unsigned long)&dma_desc_table[2*i+2];
- dma_desc_table[2*i+1] = (unsigned long)fb_buffer;
- }
-
- for (i = U_LINES; i < U_LINES + LCD_Y_RES; ++i) {
- /* visible lines */
- dma_desc_table[2*i] = (unsigned long)&dma_desc_table[2*i+2];
- dma_desc_table[2*i+1] = (unsigned long)fb_buffer +
- (LCD_Y_RES+U_LINES-1-i)*2;
- }
-
- /* last descriptor points to first */
- dma_desc_table[2*(LCD_Y_RES+U_LINES-1)] = (unsigned long)&dma_desc_table[0];
-
- set_dma_x_count(CH_PPI, LCD_X_RES);
- set_dma_x_modify(CH_PPI, LCD_Y_RES * (LCD_BBP / 8));
- set_dma_y_count(CH_PPI, 0);
- set_dma_y_modify(CH_PPI, 0);
- set_dma_next_desc_addr(CH_PPI, (void *)dma_desc_table[0]);
- set_dma_config(CH_PPI, DMAFLOW_LARGE | NDSIZE_4 | WDSIZE_16);
-
- } else {
-
- set_dma_config(CH_PPI, set_bfin_dma_config(DIR_READ,
- DMA_FLOW_AUTO,
- INTR_DISABLE,
- DIMENSION_2D,
- DATA_SIZE_16,
- DMA_NOSYNC_KEEP_DMA_BUF));
- set_dma_x_count(CH_PPI, LCD_X_RES);
- set_dma_x_modify(CH_PPI, LCD_BBP / 8);
- set_dma_y_count(CH_PPI, LCD_Y_RES+U_LINES);
- set_dma_y_modify(CH_PPI, LCD_BBP / 8);
- set_dma_start_addr(CH_PPI, (unsigned long) fb_buffer);
- }
-
- return 0;
-}
-
-static int request_ports(void)
-{
- u16 tmr_req[] = TIMERS;
-
- /*
- UD: PF13
- MOD: PF10
- LBR: PF14
- PPI_CLK: PF15
- */
-
- if (peripheral_request_list(ppi_pins, KBUILD_MODNAME)) {
- pr_err("requesting PPI peripheral failed\n");
- return -EBUSY;
- }
-
- if (peripheral_request_list(tmr_req, KBUILD_MODNAME)) {
- peripheral_free_list(ppi_pins);
- pr_err("requesting timer peripheral failed\n");
- return -EBUSY;
- }
-
-#if (defined(UD) && defined(LBR))
- if (gpio_request_one(UD, GPIOF_OUT_INIT_LOW, KBUILD_MODNAME)) {
- pr_err("requesting GPIO %d failed\n", UD);
- return -EBUSY;
- }
-
- if (gpio_request_one(LBR, GPIOF_OUT_INIT_HIGH, KBUILD_MODNAME)) {
- pr_err("requesting GPIO %d failed\n", LBR);
- gpio_free(UD);
- return -EBUSY;
- }
-#endif
-
- if (gpio_request_one(MOD, GPIOF_OUT_INIT_HIGH, KBUILD_MODNAME)) {
- pr_err("requesting GPIO %d failed\n", MOD);
-#if (defined(UD) && defined(LBR))
- gpio_free(LBR);
- gpio_free(UD);
-#endif
- return -EBUSY;
- }
-
- SSYNC();
- return 0;
-}
-
-static void free_ports(void)
-{
- u16 tmr_req[] = TIMERS;
-
- peripheral_free_list(ppi_pins);
- peripheral_free_list(tmr_req);
-
-#if defined(UD) && defined(LBR)
- gpio_free(LBR);
- gpio_free(UD);
-#endif
- gpio_free(MOD);
-}
-
-static struct fb_info bfin_lq035_fb;
-
-static struct fb_var_screeninfo bfin_lq035_fb_defined = {
- .bits_per_pixel = LCD_BBP,
- .activate = FB_ACTIVATE_TEST,
- .xres = LCD_X_RES, /*default portrait mode RGB*/
- .yres = LCD_Y_RES,
- .xres_virtual = LCD_X_RES,
- .yres_virtual = LCD_Y_RES,
- .height = -1,
- .width = -1,
- .left_margin = 0,
- .right_margin = 0,
- .upper_margin = 0,
- .lower_margin = 0,
- .red = {11, 5, 0},
- .green = {5, 6, 0},
- .blue = {0, 5, 0},
- .transp = {0, 0, 0},
-};
-
-static struct fb_fix_screeninfo bfin_lq035_fb_fix = {
- .id = KBUILD_MODNAME,
- .smem_len = ACTIVE_VIDEO_MEM_SIZE,
- .type = FB_TYPE_PACKED_PIXELS,
- .visual = FB_VISUAL_TRUECOLOR,
- .xpanstep = 0,
- .ypanstep = 0,
- .line_length = LCD_X_RES*(LCD_BBP/8),
- .accel = FB_ACCEL_NONE,
-};
-
-
-static int bfin_lq035_fb_open(struct fb_info *info, int user)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&bfin_lq035_lock, flags);
- lq035_open_cnt++;
- spin_unlock_irqrestore(&bfin_lq035_lock, flags);
-
- if (lq035_open_cnt <= 1) {
- bfin_write_PPI_CONTROL(0);
- SSYNC();
-
- set_vcomm();
- config_dma();
- config_ppi();
-
- /* start dma */
- enable_dma(CH_PPI);
- SSYNC();
- bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() | PORT_EN);
- SSYNC();
-
- if (!t_conf_done) {
- config_timers();
- start_timers();
- }
- /* gpio_set_value(MOD,1); */
- }
-
- return 0;
-}
-
-static int bfin_lq035_fb_release(struct fb_info *info, int user)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&bfin_lq035_lock, flags);
- lq035_open_cnt--;
- spin_unlock_irqrestore(&bfin_lq035_lock, flags);
-
-
- if (lq035_open_cnt <= 0) {
-
- bfin_write_PPI_CONTROL(0);
- SSYNC();
-
- disable_dma(CH_PPI);
- }
-
- return 0;
-}
-
-
-static int bfin_lq035_fb_check_var(struct fb_var_screeninfo *var,
- struct fb_info *info)
-{
- switch (var->bits_per_pixel) {
- case 16:/* DIRECTCOLOUR, 64k */
- var->red.offset = info->var.red.offset;
- var->green.offset = info->var.green.offset;
- var->blue.offset = info->var.blue.offset;
- var->red.length = info->var.red.length;
- var->green.length = info->var.green.length;
- var->blue.length = info->var.blue.length;
- var->transp.offset = 0;
- var->transp.length = 0;
- var->transp.msb_right = 0;
- var->red.msb_right = 0;
- var->green.msb_right = 0;
- var->blue.msb_right = 0;
- break;
- default:
- pr_debug("%s: depth not supported: %u BPP\n", __func__,
- var->bits_per_pixel);
- return -EINVAL;
- }
-
- if (info->var.xres != var->xres ||
- info->var.yres != var->yres ||
- info->var.xres_virtual != var->xres_virtual ||
- info->var.yres_virtual != var->yres_virtual) {
- pr_debug("%s: Resolution not supported: X%u x Y%u\n",
- __func__, var->xres, var->yres);
- return -EINVAL;
- }
-
- /*
- * Memory limit
- */
-
- if ((info->fix.line_length * var->yres_virtual) > info->fix.smem_len) {
- pr_debug("%s: Memory Limit requested yres_virtual = %u\n",
- __func__, var->yres_virtual);
- return -ENOMEM;
- }
-
- return 0;
-}
-
-static int bfin_lq035_fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
-{
- if (nocursor)
- return 0;
- else
- return -EINVAL; /* just to force soft_cursor() call */
-}
-
-static int bfin_lq035_fb_setcolreg(u_int regno, u_int red, u_int green,
- u_int blue, u_int transp,
- struct fb_info *info)
-{
- if (regno >= NBR_PALETTE)
- return -EINVAL;
-
- if (info->var.grayscale)
- /* grayscale = 0.30*R + 0.59*G + 0.11*B */
- red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
-
- if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
-
- u32 value;
- /* Place color in the pseudopalette */
- if (regno > 16)
- return -EINVAL;
-
- red >>= (16 - info->var.red.length);
- green >>= (16 - info->var.green.length);
- blue >>= (16 - info->var.blue.length);
-
- value = (red << info->var.red.offset) |
- (green << info->var.green.offset)|
- (blue << info->var.blue.offset);
- value &= 0xFFFF;
-
- ((u32 *) (info->pseudo_palette))[regno] = value;
-
- }
-
- return 0;
-}
-
-static struct fb_ops bfin_lq035_fb_ops = {
- .owner = THIS_MODULE,
- .fb_open = bfin_lq035_fb_open,
- .fb_release = bfin_lq035_fb_release,
- .fb_check_var = bfin_lq035_fb_check_var,
- .fb_fillrect = cfb_fillrect,
- .fb_copyarea = cfb_copyarea,
- .fb_imageblit = cfb_imageblit,
- .fb_cursor = bfin_lq035_fb_cursor,
- .fb_setcolreg = bfin_lq035_fb_setcolreg,
-};
-
-static int bl_get_brightness(struct backlight_device *bd)
-{
- return current_brightness;
-}
-
-static const struct backlight_ops bfin_lq035fb_bl_ops = {
- .get_brightness = bl_get_brightness,
-};
-
-static struct backlight_device *bl_dev;
-
-static int bfin_lcd_get_power(struct lcd_device *dev)
-{
- return 0;
-}
-
-static int bfin_lcd_set_power(struct lcd_device *dev, int power)
-{
- return 0;
-}
-
-static int bfin_lcd_get_contrast(struct lcd_device *dev)
-{
- return (int)vcomm_value;
-}
-
-static int bfin_lcd_set_contrast(struct lcd_device *dev, int contrast)
-{
- if (contrast > 255)
- contrast = 255;
- if (contrast < 0)
- contrast = 0;
-
- vcomm_value = (unsigned char)contrast;
- set_vcomm();
- return 0;
-}
-
-static int bfin_lcd_check_fb(struct lcd_device *lcd, struct fb_info *fi)
-{
- if (!fi || (fi == &bfin_lq035_fb))
- return 1;
- return 0;
-}
-
-static struct lcd_ops bfin_lcd_ops = {
- .get_power = bfin_lcd_get_power,
- .set_power = bfin_lcd_set_power,
- .get_contrast = bfin_lcd_get_contrast,
- .set_contrast = bfin_lcd_set_contrast,
- .check_fb = bfin_lcd_check_fb,
-};
-
-static struct lcd_device *lcd_dev;
-
-static int bfin_lq035_probe(struct platform_device *pdev)
-{
- struct backlight_properties props;
- dma_addr_t dma_handle;
- int ret;
-
- if (request_dma(CH_PPI, KBUILD_MODNAME)) {
- pr_err("couldn't request PPI DMA\n");
- return -EFAULT;
- }
-
- if (request_ports()) {
- pr_err("couldn't request gpio port\n");
- ret = -EFAULT;
- goto out_ports;
- }
-
- fb_buffer = dma_alloc_coherent(NULL, TOTAL_VIDEO_MEM_SIZE,
- &dma_handle, GFP_KERNEL);
- if (fb_buffer == NULL) {
- pr_err("couldn't allocate dma buffer\n");
- ret = -ENOMEM;
- goto out_dma_coherent;
- }
-
- if (L1_DATA_A_LENGTH)
- dma_desc_table = l1_data_sram_zalloc(TOTAL_DMA_DESC_SIZE);
- else
- dma_desc_table = dma_alloc_coherent(NULL, TOTAL_DMA_DESC_SIZE,
- &dma_handle, 0);
-
- if (dma_desc_table == NULL) {
- pr_err("couldn't allocate dma descriptor\n");
- ret = -ENOMEM;
- goto out_table;
- }
-
- bfin_lq035_fb.screen_base = (void *)fb_buffer;
- bfin_lq035_fb_fix.smem_start = (int)fb_buffer;
- if (landscape) {
- bfin_lq035_fb_defined.xres = LCD_Y_RES;
- bfin_lq035_fb_defined.yres = LCD_X_RES;
- bfin_lq035_fb_defined.xres_virtual = LCD_Y_RES;
- bfin_lq035_fb_defined.yres_virtual = LCD_X_RES;
-
- bfin_lq035_fb_fix.line_length = LCD_Y_RES*(LCD_BBP/8);
- } else {
- bfin_lq035_fb.screen_base += ACTIVE_VIDEO_MEM_OFFSET;
- bfin_lq035_fb_fix.smem_start += ACTIVE_VIDEO_MEM_OFFSET;
- }
-
- bfin_lq035_fb_defined.green.msb_right = 0;
- bfin_lq035_fb_defined.red.msb_right = 0;
- bfin_lq035_fb_defined.blue.msb_right = 0;
- bfin_lq035_fb_defined.green.offset = 5;
- bfin_lq035_fb_defined.green.length = 6;
- bfin_lq035_fb_defined.red.length = 5;
- bfin_lq035_fb_defined.blue.length = 5;
-
- if (bgr) {
- bfin_lq035_fb_defined.red.offset = 0;
- bfin_lq035_fb_defined.blue.offset = 11;
- } else {
- bfin_lq035_fb_defined.red.offset = 11;
- bfin_lq035_fb_defined.blue.offset = 0;
- }
-
- bfin_lq035_fb.fbops = &bfin_lq035_fb_ops;
- bfin_lq035_fb.var = bfin_lq035_fb_defined;
-
- bfin_lq035_fb.fix = bfin_lq035_fb_fix;
- bfin_lq035_fb.flags = FBINFO_DEFAULT;
-
-
- bfin_lq035_fb.pseudo_palette = devm_kzalloc(&pdev->dev,
- sizeof(u32) * 16,
- GFP_KERNEL);
- if (bfin_lq035_fb.pseudo_palette == NULL) {
- pr_err("failed to allocate pseudo_palette\n");
- ret = -ENOMEM;
- goto out_table;
- }
-
- if (fb_alloc_cmap(&bfin_lq035_fb.cmap, NBR_PALETTE, 0) < 0) {
- pr_err("failed to allocate colormap (%d entries)\n",
- NBR_PALETTE);
- ret = -EFAULT;
- goto out_table;
- }
-
- if (register_framebuffer(&bfin_lq035_fb) < 0) {
- pr_err("unable to register framebuffer\n");
- ret = -EINVAL;
- goto out_reg;
- }
-
- i2c_add_driver(&ad5280_driver);
-
- memset(&props, 0, sizeof(props));
- props.type = BACKLIGHT_RAW;
- props.max_brightness = MAX_BRIGHENESS;
- bl_dev = backlight_device_register("bf537-bl", NULL, NULL,
- &bfin_lq035fb_bl_ops, &props);
-
- lcd_dev = lcd_device_register(KBUILD_MODNAME, &pdev->dev, NULL,
- &bfin_lcd_ops);
- if (IS_ERR(lcd_dev)) {
- pr_err("unable to register lcd\n");
- ret = PTR_ERR(lcd_dev);
- goto out_lcd;
- }
- lcd_dev->props.max_contrast = 255,
-
- pr_info("initialized");
-
- return 0;
-out_lcd:
- unregister_framebuffer(&bfin_lq035_fb);
-out_reg:
- fb_dealloc_cmap(&bfin_lq035_fb.cmap);
-out_table:
- dma_free_coherent(NULL, TOTAL_VIDEO_MEM_SIZE, fb_buffer, 0);
- fb_buffer = NULL;
-out_dma_coherent:
- free_ports();
-out_ports:
- free_dma(CH_PPI);
- return ret;
-}
-
-static int bfin_lq035_remove(struct platform_device *pdev)
-{
- if (fb_buffer != NULL)
- dma_free_coherent(NULL, TOTAL_VIDEO_MEM_SIZE, fb_buffer, 0);
-
- if (L1_DATA_A_LENGTH)
- l1_data_sram_free(dma_desc_table);
- else
- dma_free_coherent(NULL, TOTAL_DMA_DESC_SIZE, NULL, 0);
-
- bfin_write_TIMER_DISABLE(TIMEN_SP|TIMEN_SPS|TIMEN_PS_CLS|
- TIMEN_LP|TIMEN_REV);
- t_conf_done = 0;
-
- free_dma(CH_PPI);
-
-
- fb_dealloc_cmap(&bfin_lq035_fb.cmap);
-
-
- lcd_device_unregister(lcd_dev);
- backlight_device_unregister(bl_dev);
-
- unregister_framebuffer(&bfin_lq035_fb);
- i2c_del_driver(&ad5280_driver);
-
- free_ports();
-
- pr_info("unregistered LCD driver\n");
-
- return 0;
-}
-
-#ifdef CONFIG_PM
-static int bfin_lq035_suspend(struct platform_device *pdev, pm_message_t state)
-{
- if (lq035_open_cnt > 0) {
- bfin_write_PPI_CONTROL(0);
- SSYNC();
- disable_dma(CH_PPI);
- }
-
- return 0;
-}
-
-static int bfin_lq035_resume(struct platform_device *pdev)
-{
- if (lq035_open_cnt > 0) {
- bfin_write_PPI_CONTROL(0);
- SSYNC();
-
- config_dma();
- config_ppi();
-
- enable_dma(CH_PPI);
- bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() | PORT_EN);
- SSYNC();
-
- config_timers();
- start_timers();
- } else {
- t_conf_done = 0;
- }
-
- return 0;
-}
-#else
-# define bfin_lq035_suspend NULL
-# define bfin_lq035_resume NULL
-#endif
-
-static struct platform_driver bfin_lq035_driver = {
- .probe = bfin_lq035_probe,
- .remove = bfin_lq035_remove,
- .suspend = bfin_lq035_suspend,
- .resume = bfin_lq035_resume,
- .driver = {
- .name = KBUILD_MODNAME,
- },
-};
-
-static int __init bfin_lq035_driver_init(void)
-{
- request_module("i2c-bfin-twi");
- return platform_driver_register(&bfin_lq035_driver);
-}
-module_init(bfin_lq035_driver_init);
-
-static void __exit bfin_lq035_driver_cleanup(void)
-{
- platform_driver_unregister(&bfin_lq035_driver);
-}
-module_exit(bfin_lq035_driver_cleanup);
-
-MODULE_DESCRIPTION("SHARP LQ035Q7DB03 TFT LCD Driver");
-MODULE_LICENSE("GPL");
diff --git a/drivers/video/fbdev/bf54x-lq043fb.c b/drivers/video/fbdev/bf54x-lq043fb.c
deleted file mode 100644
index 8f1f97c75619..000000000000
--- a/drivers/video/fbdev/bf54x-lq043fb.c
+++ /dev/null
@@ -1,764 +0,0 @@
-/*
- * File: drivers/video/bf54x-lq043.c
- * Based on:
- * Author: Michael Hennerich <hennerich@blackfin.uclinux.org>
- *
- * Created:
- * Description: ADSP-BF54x Framebuffer driver
- *
- *
- * Modified:
- * Copyright 2007-2008 Analog Devices Inc.
- *
- * Bugs: Enter bugs at http://blackfin.uclinux.org/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, see the file COPYING, or write
- * to the Free Software Foundation, Inc.,
- * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/tty.h>
-#include <linux/slab.h>
-#include <linux/delay.h>
-#include <linux/fb.h>
-#include <linux/ioport.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/sched.h>
-#include <linux/timer.h>
-#include <linux/device.h>
-#include <linux/backlight.h>
-#include <linux/lcd.h>
-#include <linux/spinlock.h>
-#include <linux/dma-mapping.h>
-#include <linux/platform_device.h>
-#include <linux/gpio.h>
-
-#include <asm/blackfin.h>
-#include <asm/irq.h>
-#include <asm/dpmc.h>
-#include <asm/dma-mapping.h>
-#include <asm/dma.h>
-#include <asm/portmux.h>
-
-#include <mach/bf54x-lq043.h>
-
-#define NO_BL_SUPPORT
-
-#define DRIVER_NAME "bf54x-lq043"
-static char driver_name[] = DRIVER_NAME;
-
-#define BFIN_LCD_NBR_PALETTE_ENTRIES 256
-
-#define EPPI0_18 {P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2, P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3, \
- P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7, P_PPI0_D8, P_PPI0_D9, P_PPI0_D10, \
- P_PPI0_D11, P_PPI0_D12, P_PPI0_D13, P_PPI0_D14, P_PPI0_D15, P_PPI0_D16, P_PPI0_D17, 0}
-
-#define EPPI0_24 {P_PPI0_D18, P_PPI0_D19, P_PPI0_D20, P_PPI0_D21, P_PPI0_D22, P_PPI0_D23, 0}
-
-struct bfin_bf54xfb_info {
- struct fb_info *fb;
- struct device *dev;
-
- struct bfin_bf54xfb_mach_info *mach_info;
-
- unsigned char *fb_buffer; /* RGB Buffer */
-
- dma_addr_t dma_handle;
- int lq043_open_cnt;
- int irq;
- spinlock_t lock; /* lock */
-};
-
-static int nocursor;
-module_param(nocursor, int, 0644);
-MODULE_PARM_DESC(nocursor, "cursor enable/disable");
-
-static int outp_rgb666;
-module_param(outp_rgb666, int, 0);
-MODULE_PARM_DESC(outp_rgb666, "Output 18-bit RGB666");
-
-#define LCD_X_RES 480 /*Horizontal Resolution */
-#define LCD_Y_RES 272 /* Vertical Resolution */
-
-#define LCD_BPP 24 /* Bit Per Pixel */
-#define DMA_BUS_SIZE 32
-
-/* -- Horizontal synchronizing --
- *
- * Timing characteristics taken from the SHARP LQ043T1DG01 datasheet
- * (LCY-W-06602A Page 9 of 22)
- *
- * Clock Frequency 1/Tc Min 7.83 Typ 9.00 Max 9.26 MHz
- *
- * Period TH - 525 - Clock
- * Pulse width THp - 41 - Clock
- * Horizontal period THd - 480 - Clock
- * Back porch THb - 2 - Clock
- * Front porch THf - 2 - Clock
- *
- * -- Vertical synchronizing --
- * Period TV - 286 - Line
- * Pulse width TVp - 10 - Line
- * Vertical period TVd - 272 - Line
- * Back porch TVb - 2 - Line
- * Front porch TVf - 2 - Line
- */
-
-#define LCD_CLK (8*1000*1000) /* 8MHz */
-
-/* # active data to transfer after Horizontal Delay clock */
-#define EPPI_HCOUNT LCD_X_RES
-
-/* # active lines to transfer after Vertical Delay clock */
-#define EPPI_VCOUNT LCD_Y_RES
-
-/* Samples per Line = 480 (active data) + 45 (padding) */
-#define EPPI_LINE 525
-
-/* Lines per Frame = 272 (active data) + 14 (padding) */
-#define EPPI_FRAME 286
-
-/* FS1 (Hsync) Width (Typical)*/
-#define EPPI_FS1W_HBL 41
-
-/* FS1 (Hsync) Period (Typical) */
-#define EPPI_FS1P_AVPL EPPI_LINE
-
-/* Horizontal Delay clock after assertion of Hsync (Typical) */
-#define EPPI_HDELAY 43
-
-/* FS2 (Vsync) Width = FS1 (Hsync) Period * 10 */
-#define EPPI_FS2W_LVB (EPPI_LINE * 10)
-
- /* FS2 (Vsync) Period = FS1 (Hsync) Period * Lines per Frame */
-#define EPPI_FS2P_LAVF (EPPI_LINE * EPPI_FRAME)
-
-/* Vertical Delay after assertion of Vsync (2 Lines) */
-#define EPPI_VDELAY 12
-
-#define EPPI_CLIP 0xFF00FF00
-
-/* EPPI Control register configuration value for RGB out
- * - EPPI as Output
- * GP 2 frame sync mode,
- * Internal Clock generation disabled, Internal FS generation enabled,
- * Receives samples on EPPI_CLK raising edge, Transmits samples on EPPI_CLK falling edge,
- * FS1 & FS2 are active high,
- * DLEN = 6 (24 bits for RGB888 out) or 5 (18 bits for RGB666 out)
- * DMA Unpacking disabled when RGB Formating is enabled, otherwise DMA unpacking enabled
- * Swapping Enabled,
- * One (DMA) Channel Mode,
- * RGB Formatting Enabled for RGB666 output, disabled for RGB888 output
- * Regular watermark - when FIFO is 100% full,
- * Urgent watermark - when FIFO is 75% full
- */
-
-#define EPPI_CONTROL (0x20136E2E | SWAPEN)
-
-static inline u16 get_eppi_clkdiv(u32 target_ppi_clk)
-{
- u32 sclk = get_sclk();
-
- /* EPPI_CLK = (SCLK) / (2 * (EPPI_CLKDIV[15:0] + 1)) */
-
- return (((sclk / target_ppi_clk) / 2) - 1);
-}
-
-static void config_ppi(struct bfin_bf54xfb_info *fbi)
-{
-
- u16 eppi_clkdiv = get_eppi_clkdiv(LCD_CLK);
-
- bfin_write_EPPI0_FS1W_HBL(EPPI_FS1W_HBL);
- bfin_write_EPPI0_FS1P_AVPL(EPPI_FS1P_AVPL);
- bfin_write_EPPI0_FS2W_LVB(EPPI_FS2W_LVB);
- bfin_write_EPPI0_FS2P_LAVF(EPPI_FS2P_LAVF);
- bfin_write_EPPI0_CLIP(EPPI_CLIP);
-
- bfin_write_EPPI0_FRAME(EPPI_FRAME);
- bfin_write_EPPI0_LINE(EPPI_LINE);
-
- bfin_write_EPPI0_HCOUNT(EPPI_HCOUNT);
- bfin_write_EPPI0_HDELAY(EPPI_HDELAY);
- bfin_write_EPPI0_VCOUNT(EPPI_VCOUNT);
- bfin_write_EPPI0_VDELAY(EPPI_VDELAY);
-
- bfin_write_EPPI0_CLKDIV(eppi_clkdiv);
-
-/*
- * DLEN = 6 (24 bits for RGB888 out) or 5 (18 bits for RGB666 out)
- * RGB Formatting Enabled for RGB666 output, disabled for RGB888 output
- */
- if (outp_rgb666)
- bfin_write_EPPI0_CONTROL((EPPI_CONTROL & ~DLENGTH) | DLEN_18 |
- RGB_FMT_EN);
- else
- bfin_write_EPPI0_CONTROL(((EPPI_CONTROL & ~DLENGTH) | DLEN_24) &
- ~RGB_FMT_EN);
-
-
-}
-
-static int config_dma(struct bfin_bf54xfb_info *fbi)
-{
-
- set_dma_config(CH_EPPI0,
- set_bfin_dma_config(DIR_READ, DMA_FLOW_AUTO,
- INTR_DISABLE, DIMENSION_2D,
- DATA_SIZE_32,
- DMA_NOSYNC_KEEP_DMA_BUF));
- set_dma_x_count(CH_EPPI0, (LCD_X_RES * LCD_BPP) / DMA_BUS_SIZE);
- set_dma_x_modify(CH_EPPI0, DMA_BUS_SIZE / 8);
- set_dma_y_count(CH_EPPI0, LCD_Y_RES);
- set_dma_y_modify(CH_EPPI0, DMA_BUS_SIZE / 8);
- set_dma_start_addr(CH_EPPI0, (unsigned long)fbi->fb_buffer);
-
- return 0;
-}
-
-static int request_ports(struct bfin_bf54xfb_info *fbi)
-{
-
- u16 eppi_req_18[] = EPPI0_18;
- u16 disp = fbi->mach_info->disp;
-
- if (gpio_request_one(disp, GPIOF_OUT_INIT_HIGH, DRIVER_NAME)) {
- printk(KERN_ERR "Requesting GPIO %d failed\n", disp);
- return -EFAULT;
- }
-
- if (peripheral_request_list(eppi_req_18, DRIVER_NAME)) {
- printk(KERN_ERR "Requesting Peripherals failed\n");
- gpio_free(disp);
- return -EFAULT;
- }
-
- if (!outp_rgb666) {
-
- u16 eppi_req_24[] = EPPI0_24;
-
- if (peripheral_request_list(eppi_req_24, DRIVER_NAME)) {
- printk(KERN_ERR "Requesting Peripherals failed\n");
- peripheral_free_list(eppi_req_18);
- gpio_free(disp);
- return -EFAULT;
- }
- }
-
- return 0;
-}
-
-static void free_ports(struct bfin_bf54xfb_info *fbi)
-{
-
- u16 eppi_req_18[] = EPPI0_18;
-
- gpio_free(fbi->mach_info->disp);
-
- peripheral_free_list(eppi_req_18);
-
- if (!outp_rgb666) {
- u16 eppi_req_24[] = EPPI0_24;
- peripheral_free_list(eppi_req_24);
- }
-}
-
-static int bfin_bf54x_fb_open(struct fb_info *info, int user)
-{
- struct bfin_bf54xfb_info *fbi = info->par;
-
- spin_lock(&fbi->lock);
- fbi->lq043_open_cnt++;
-
- if (fbi->lq043_open_cnt <= 1) {
-
- bfin_write_EPPI0_CONTROL(0);
- SSYNC();
-
- config_dma(fbi);
- config_ppi(fbi);
-
- /* start dma */
- enable_dma(CH_EPPI0);
- bfin_write_EPPI0_CONTROL(bfin_read_EPPI0_CONTROL() | EPPI_EN);
- }
-
- spin_unlock(&fbi->lock);
-
- return 0;
-}
-
-static int bfin_bf54x_fb_release(struct fb_info *info, int user)
-{
- struct bfin_bf54xfb_info *fbi = info->par;
-
- spin_lock(&fbi->lock);
-
- fbi->lq043_open_cnt--;
-
- if (fbi->lq043_open_cnt <= 0) {
-
- bfin_write_EPPI0_CONTROL(0);
- SSYNC();
- disable_dma(CH_EPPI0);
- }
-
- spin_unlock(&fbi->lock);
-
- return 0;
-}
-
-static int bfin_bf54x_fb_check_var(struct fb_var_screeninfo *var,
- struct fb_info *info)
-{
-
- switch (var->bits_per_pixel) {
- case 24:/* TRUECOLOUR, 16m */
- var->red.offset = 16;
- var->green.offset = 8;
- var->blue.offset = 0;
- var->red.length = var->green.length = var->blue.length = 8;
- var->transp.offset = 0;
- var->transp.length = 0;
- var->transp.msb_right = 0;
- var->red.msb_right = 0;
- var->green.msb_right = 0;
- var->blue.msb_right = 0;
- break;
- default:
- pr_debug("%s: depth not supported: %u BPP\n", __func__,
- var->bits_per_pixel);
- return -EINVAL;
- }
-
- if (info->var.xres != var->xres || info->var.yres != var->yres ||
- info->var.xres_virtual != var->xres_virtual ||
- info->var.yres_virtual != var->yres_virtual) {
- pr_debug("%s: Resolution not supported: X%u x Y%u \n",
- __func__, var->xres, var->yres);
- return -EINVAL;
- }
-
- /*
- * Memory limit
- */
-
- if ((info->fix.line_length * var->yres_virtual) > info->fix.smem_len) {
- pr_debug("%s: Memory Limit requested yres_virtual = %u\n",
- __func__, var->yres_virtual);
- return -ENOMEM;
- }
-
- return 0;
-}
-
-int bfin_bf54x_fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
-{
- if (nocursor)
- return 0;
- else
- return -EINVAL; /* just to force soft_cursor() call */
-}
-
-static int bfin_bf54x_fb_setcolreg(u_int regno, u_int red, u_int green,
- u_int blue, u_int transp,
- struct fb_info *info)
-{
- if (regno >= BFIN_LCD_NBR_PALETTE_ENTRIES)
- return -EINVAL;
-
- if (info->var.grayscale) {
- /* grayscale = 0.30*R + 0.59*G + 0.11*B */
- red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
- }
-
- if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
-
- u32 value;
- /* Place color in the pseudopalette */
- if (regno > 16)
- return -EINVAL;
-
- red >>= (16 - info->var.red.length);
- green >>= (16 - info->var.green.length);
- blue >>= (16 - info->var.blue.length);
-
- value = (red << info->var.red.offset) |
- (green << info->var.green.offset) |
- (blue << info->var.blue.offset);
- value &= 0xFFFFFF;
-
- ((u32 *) (info->pseudo_palette))[regno] = value;
-
- }
-
- return 0;
-}
-
-static struct fb_ops bfin_bf54x_fb_ops = {
- .owner = THIS_MODULE,
- .fb_open = bfin_bf54x_fb_open,
- .fb_release = bfin_bf54x_fb_release,
- .fb_check_var = bfin_bf54x_fb_check_var,
- .fb_fillrect = cfb_fillrect,
- .fb_copyarea = cfb_copyarea,
- .fb_imageblit = cfb_imageblit,
- .fb_cursor = bfin_bf54x_fb_cursor,
- .fb_setcolreg = bfin_bf54x_fb_setcolreg,
-};
-
-#ifndef NO_BL_SUPPORT
-static int bl_get_brightness(struct backlight_device *bd)
-{
- return 0;
-}
-
-static const struct backlight_ops bfin_lq043fb_bl_ops = {
- .get_brightness = bl_get_brightness,
-};
-
-static struct backlight_device *bl_dev;
-
-static int bfin_lcd_get_power(struct lcd_device *dev)
-{
- return 0;
-}
-
-static int bfin_lcd_set_power(struct lcd_device *dev, int power)
-{
- return 0;
-}
-
-static int bfin_lcd_get_contrast(struct lcd_device *dev)
-{
- return 0;
-}
-
-static int bfin_lcd_set_contrast(struct lcd_device *dev, int contrast)
-{
-
- return 0;
-}
-
-static int bfin_lcd_check_fb(struct lcd_device *dev, struct fb_info *fi)
-{
- if (!fi || (fi == &bfin_bf54x_fb))
- return 1;
- return 0;
-}
-
-static struct lcd_ops bfin_lcd_ops = {
- .get_power = bfin_lcd_get_power,
- .set_power = bfin_lcd_set_power,
- .get_contrast = bfin_lcd_get_contrast,
- .set_contrast = bfin_lcd_set_contrast,
- .check_fb = bfin_lcd_check_fb,
-};
-
-static struct lcd_device *lcd_dev;
-#endif
-
-static irqreturn_t bfin_bf54x_irq_error(int irq, void *dev_id)
-{
- /*struct bfin_bf54xfb_info *info = dev_id;*/
-
- u16 status = bfin_read_EPPI0_STATUS();
-
- bfin_write_EPPI0_STATUS(0xFFFF);
-
- if (status) {
- bfin_write_EPPI0_CONTROL(bfin_read_EPPI0_CONTROL() & ~EPPI_EN);
- disable_dma(CH_EPPI0);
-
- /* start dma */
- enable_dma(CH_EPPI0);
- bfin_write_EPPI0_CONTROL(bfin_read_EPPI0_CONTROL() | EPPI_EN);
- bfin_write_EPPI0_STATUS(0xFFFF);
- }
-
- return IRQ_HANDLED;
-}
-
-static int bfin_bf54x_probe(struct platform_device *pdev)
-{
-#ifndef NO_BL_SUPPORT
- struct backlight_properties props;
-#endif
- struct bfin_bf54xfb_info *info;
- struct fb_info *fbinfo;
- int ret;
-
- printk(KERN_INFO DRIVER_NAME ": FrameBuffer initializing...\n");
-
- if (request_dma(CH_EPPI0, "CH_EPPI0") < 0) {
- printk(KERN_ERR DRIVER_NAME
- ": couldn't request CH_EPPI0 DMA\n");
- ret = -EFAULT;
- goto out1;
- }
-
- fbinfo =
- framebuffer_alloc(sizeof(struct bfin_bf54xfb_info), &pdev->dev);
- if (!fbinfo) {
- ret = -ENOMEM;
- goto out2;
- }
-
- info = fbinfo->par;
- info->fb = fbinfo;
- info->dev = &pdev->dev;
- spin_lock_init(&info->lock);
-
- platform_set_drvdata(pdev, fbinfo);
-
- strcpy(fbinfo->fix.id, driver_name);
-
- info->mach_info = pdev->dev.platform_data;
-
- if (info->mach_info == NULL) {
- dev_err(&pdev->dev,
- "no platform data for lcd, cannot attach\n");
- ret = -EINVAL;
- goto out3;
- }
-
- fbinfo->fix.type = FB_TYPE_PACKED_PIXELS;
- fbinfo->fix.type_aux = 0;
- fbinfo->fix.xpanstep = 0;
- fbinfo->fix.ypanstep = 0;
- fbinfo->fix.ywrapstep = 0;
- fbinfo->fix.accel = FB_ACCEL_NONE;
- fbinfo->fix.visual = FB_VISUAL_TRUECOLOR;
-
- fbinfo->var.nonstd = 0;
- fbinfo->var.activate = FB_ACTIVATE_NOW;
- fbinfo->var.height = info->mach_info->height;
- fbinfo->var.width = info->mach_info->width;
- fbinfo->var.accel_flags = 0;
- fbinfo->var.vmode = FB_VMODE_NONINTERLACED;
-
- fbinfo->fbops = &bfin_bf54x_fb_ops;
- fbinfo->flags = FBINFO_FLAG_DEFAULT;
-
- fbinfo->var.xres = info->mach_info->xres.defval;
- fbinfo->var.xres_virtual = info->mach_info->xres.defval;
- fbinfo->var.yres = info->mach_info->yres.defval;
- fbinfo->var.yres_virtual = info->mach_info->yres.defval;
- fbinfo->var.bits_per_pixel = info->mach_info->bpp.defval;
-
- fbinfo->var.upper_margin = 0;
- fbinfo->var.lower_margin = 0;
- fbinfo->var.vsync_len = 0;
-
- fbinfo->var.left_margin = 0;
- fbinfo->var.right_margin = 0;
- fbinfo->var.hsync_len = 0;
-
- fbinfo->var.red.offset = 16;
- fbinfo->var.green.offset = 8;
- fbinfo->var.blue.offset = 0;
- fbinfo->var.transp.offset = 0;
- fbinfo->var.red.length = 8;
- fbinfo->var.green.length = 8;
- fbinfo->var.blue.length = 8;
- fbinfo->var.transp.length = 0;
- fbinfo->fix.smem_len = info->mach_info->xres.max *
- info->mach_info->yres.max * info->mach_info->bpp.max / 8;
-
- fbinfo->fix.line_length = fbinfo->var.xres_virtual *
- fbinfo->var.bits_per_pixel / 8;
-
- info->fb_buffer =
- dma_alloc_coherent(NULL, fbinfo->fix.smem_len, &info->dma_handle,
- GFP_KERNEL);
-
- if (NULL == info->fb_buffer) {
- printk(KERN_ERR DRIVER_NAME
- ": couldn't allocate dma buffer.\n");
- ret = -ENOMEM;
- goto out3;
- }
-
- fbinfo->screen_base = (void *)info->fb_buffer;
- fbinfo->fix.smem_start = (int)info->fb_buffer;
-
- fbinfo->fbops = &bfin_bf54x_fb_ops;
-
- fbinfo->pseudo_palette = devm_kzalloc(&pdev->dev, sizeof(u32) * 16,
- GFP_KERNEL);
- if (!fbinfo->pseudo_palette) {
- printk(KERN_ERR DRIVER_NAME
- "Fail to allocate pseudo_palette\n");
-
- ret = -ENOMEM;
- goto out4;
- }
-
- if (fb_alloc_cmap(&fbinfo->cmap, BFIN_LCD_NBR_PALETTE_ENTRIES, 0)
- < 0) {
- printk(KERN_ERR DRIVER_NAME
- "Fail to allocate colormap (%d entries)\n",
- BFIN_LCD_NBR_PALETTE_ENTRIES);
- ret = -EFAULT;
- goto out4;
- }
-
- if (request_ports(info)) {
- printk(KERN_ERR DRIVER_NAME ": couldn't request gpio port.\n");
- ret = -EFAULT;
- goto out6;
- }
-
- info->irq = platform_get_irq(pdev, 0);
- if (info->irq < 0) {
- ret = -EINVAL;
- goto out7;
- }
-
- if (request_irq(info->irq, bfin_bf54x_irq_error, 0,
- "PPI ERROR", info) < 0) {
- printk(KERN_ERR DRIVER_NAME
- ": unable to request PPI ERROR IRQ\n");
- ret = -EFAULT;
- goto out7;
- }
-
- if (register_framebuffer(fbinfo) < 0) {
- printk(KERN_ERR DRIVER_NAME
- ": unable to register framebuffer.\n");
- ret = -EINVAL;
- goto out8;
- }
-#ifndef NO_BL_SUPPORT
- memset(&props, 0, sizeof(struct backlight_properties));
- props.type = BACKLIGHT_RAW;
- props.max_brightness = 255;
- bl_dev = backlight_device_register("bf54x-bl", NULL, NULL,
- &bfin_lq043fb_bl_ops, &props);
- if (IS_ERR(bl_dev)) {
- printk(KERN_ERR DRIVER_NAME
- ": unable to register backlight.\n");
- ret = -EINVAL;
- unregister_framebuffer(fbinfo);
- goto out8;
- }
-
- lcd_dev = lcd_device_register(DRIVER_NAME, &pdev->dev, NULL, &bfin_lcd_ops);
- lcd_dev->props.max_contrast = 255, printk(KERN_INFO "Done.\n");
-#endif
-
- return 0;
-
-out8:
- free_irq(info->irq, info);
-out7:
- free_ports(info);
-out6:
- fb_dealloc_cmap(&fbinfo->cmap);
-out4:
- dma_free_coherent(NULL, fbinfo->fix.smem_len, info->fb_buffer,
- info->dma_handle);
-out3:
- framebuffer_release(fbinfo);
-out2:
- free_dma(CH_EPPI0);
-out1:
-
- return ret;
-}
-
-static int bfin_bf54x_remove(struct platform_device *pdev)
-{
-
- struct fb_info *fbinfo = platform_get_drvdata(pdev);
- struct bfin_bf54xfb_info *info = fbinfo->par;
-
- free_dma(CH_EPPI0);
- free_irq(info->irq, info);
-
- if (info->fb_buffer != NULL)
- dma_free_coherent(NULL, fbinfo->fix.smem_len, info->fb_buffer,
- info->dma_handle);
-
- fb_dealloc_cmap(&fbinfo->cmap);
-
-#ifndef NO_BL_SUPPORT
- lcd_device_unregister(lcd_dev);
- backlight_device_unregister(bl_dev);
-#endif
-
- unregister_framebuffer(fbinfo);
-
- free_ports(info);
-
- printk(KERN_INFO DRIVER_NAME ": Unregister LCD driver.\n");
-
- return 0;
-}
-
-#ifdef CONFIG_PM
-static int bfin_bf54x_suspend(struct platform_device *pdev, pm_message_t state)
-{
- bfin_write_EPPI0_CONTROL(bfin_read_EPPI0_CONTROL() & ~EPPI_EN);
- disable_dma(CH_EPPI0);
- bfin_write_EPPI0_STATUS(0xFFFF);
-
- return 0;
-}
-
-static int bfin_bf54x_resume(struct platform_device *pdev)
-{
- struct fb_info *fbinfo = platform_get_drvdata(pdev);
- struct bfin_bf54xfb_info *info = fbinfo->par;
-
- if (info->lq043_open_cnt) {
-
- bfin_write_EPPI0_CONTROL(0);
- SSYNC();
-
- config_dma(info);
- config_ppi(info);
-
- /* start dma */
- enable_dma(CH_EPPI0);
- bfin_write_EPPI0_CONTROL(bfin_read_EPPI0_CONTROL() | EPPI_EN);
- }
-
- return 0;
-}
-#else
-#define bfin_bf54x_suspend NULL
-#define bfin_bf54x_resume NULL
-#endif
-
-static struct platform_driver bfin_bf54x_driver = {
- .probe = bfin_bf54x_probe,
- .remove = bfin_bf54x_remove,
- .suspend = bfin_bf54x_suspend,
- .resume = bfin_bf54x_resume,
- .driver = {
- .name = DRIVER_NAME,
- },
-};
-module_platform_driver(bfin_bf54x_driver);
-
-MODULE_DESCRIPTION("Blackfin BF54x TFT LCD Driver");
-MODULE_LICENSE("GPL");
diff --git a/drivers/video/fbdev/bfin-lq035q1-fb.c b/drivers/video/fbdev/bfin-lq035q1-fb.c
deleted file mode 100644
index b459354ad940..000000000000
--- a/drivers/video/fbdev/bfin-lq035q1-fb.c
+++ /dev/null
@@ -1,864 +0,0 @@
-/*
- * Blackfin LCD Framebuffer driver SHARP LQ035Q1DH02
- *
- * Copyright 2008-2009 Analog Devices Inc.
- * Licensed under the GPL-2 or later.
- */
-
-#define DRIVER_NAME "bfin-lq035q1"
-#define pr_fmt(fmt) DRIVER_NAME ": " fmt
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/fb.h>
-#include <linux/gpio.h>
-#include <linux/slab.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/device.h>
-#include <linux/backlight.h>
-#include <linux/lcd.h>
-#include <linux/dma-mapping.h>
-#include <linux/platform_device.h>
-#include <linux/spi/spi.h>
-
-#include <asm/blackfin.h>
-#include <asm/irq.h>
-#include <asm/dma.h>
-#include <asm/portmux.h>
-#include <asm/gptimers.h>
-
-#include <asm/bfin-lq035q1.h>
-
-#if defined(BF533_FAMILY) || defined(BF538_FAMILY)
-#define TIMER_HSYNC_id TIMER1_id
-#define TIMER_HSYNCbit TIMER1bit
-#define TIMER_HSYNC_STATUS_TRUN TIMER_STATUS_TRUN1
-#define TIMER_HSYNC_STATUS_TIMIL TIMER_STATUS_TIMIL1
-#define TIMER_HSYNC_STATUS_TOVF TIMER_STATUS_TOVF1
-
-#define TIMER_VSYNC_id TIMER2_id
-#define TIMER_VSYNCbit TIMER2bit
-#define TIMER_VSYNC_STATUS_TRUN TIMER_STATUS_TRUN2
-#define TIMER_VSYNC_STATUS_TIMIL TIMER_STATUS_TIMIL2
-#define TIMER_VSYNC_STATUS_TOVF TIMER_STATUS_TOVF2
-#else
-#define TIMER_HSYNC_id TIMER0_id
-#define TIMER_HSYNCbit TIMER0bit
-#define TIMER_HSYNC_STATUS_TRUN TIMER_STATUS_TRUN0
-#define TIMER_HSYNC_STATUS_TIMIL TIMER_STATUS_TIMIL0
-#define TIMER_HSYNC_STATUS_TOVF TIMER_STATUS_TOVF0
-
-#define TIMER_VSYNC_id TIMER1_id
-#define TIMER_VSYNCbit TIMER1bit
-#define TIMER_VSYNC_STATUS_TRUN TIMER_STATUS_TRUN1
-#define TIMER_VSYNC_STATUS_TIMIL TIMER_STATUS_TIMIL1
-#define TIMER_VSYNC_STATUS_TOVF TIMER_STATUS_TOVF1
-#endif
-
-#define LCD_X_RES 320 /* Horizontal Resolution */
-#define LCD_Y_RES 240 /* Vertical Resolution */
-#define DMA_BUS_SIZE 16
-#define U_LINE 4 /* Blanking Lines */
-
-
-/* Interface 16/18-bit TFT over an 8-bit wide PPI using a small Programmable Logic Device (CPLD)
- * http://blackfin.uclinux.org/gf/project/stamp/frs/?action=FrsReleaseBrowse&frs_package_id=165
- */
-
-
-#define BFIN_LCD_NBR_PALETTE_ENTRIES 256
-
-#define PPI_TX_MODE 0x2
-#define PPI_XFER_TYPE_11 0xC
-#define PPI_PORT_CFG_01 0x10
-#define PPI_POLS_1 0x8000
-
-#define LQ035_INDEX 0x74
-#define LQ035_DATA 0x76
-
-#define LQ035_DRIVER_OUTPUT_CTL 0x1
-#define LQ035_SHUT_CTL 0x11
-
-#define LQ035_DRIVER_OUTPUT_MASK (LQ035_LR | LQ035_TB | LQ035_BGR | LQ035_REV)
-#define LQ035_DRIVER_OUTPUT_DEFAULT (0x2AEF & ~LQ035_DRIVER_OUTPUT_MASK)
-
-#define LQ035_SHUT (1 << 0) /* Shutdown */
-#define LQ035_ON (0 << 0) /* Shutdown */
-
-struct bfin_lq035q1fb_info {
- struct fb_info *fb;
- struct device *dev;
- struct spi_driver spidrv;
- struct bfin_lq035q1fb_disp_info *disp_info;
- unsigned char *fb_buffer; /* RGB Buffer */
- dma_addr_t dma_handle;
- int lq035_open_cnt;
- int irq;
- spinlock_t lock; /* lock */
- u32 pseudo_pal[16];
-
- u32 lcd_bpp;
- u32 h_actpix;
- u32 h_period;
- u32 h_pulse;
- u32 h_start;
- u32 v_lines;
- u32 v_pulse;
- u32 v_period;
-};
-
-static int nocursor;
-module_param(nocursor, int, 0644);
-MODULE_PARM_DESC(nocursor, "cursor enable/disable");
-
-struct spi_control {
- unsigned short mode;
-};
-
-static int lq035q1_control(struct spi_device *spi, unsigned char reg, unsigned short value)
-{
- int ret;
- u8 regs[3] = { LQ035_INDEX, 0, 0 };
- u8 dat[3] = { LQ035_DATA, 0, 0 };
-
- if (!spi)
- return -ENODEV;
-
- regs[2] = reg;
- dat[1] = value >> 8;
- dat[2] = value & 0xFF;
-
- ret = spi_write(spi, regs, ARRAY_SIZE(regs));
- ret |= spi_write(spi, dat, ARRAY_SIZE(dat));
- return ret;
-}
-
-static int lq035q1_spidev_probe(struct spi_device *spi)
-{
- int ret;
- struct spi_control *ctl;
- struct bfin_lq035q1fb_info *info = container_of(spi->dev.driver,
- struct bfin_lq035q1fb_info,
- spidrv.driver);
-
- ctl = kzalloc(sizeof(*ctl), GFP_KERNEL);
-
- if (!ctl)
- return -ENOMEM;
-
- ctl->mode = (info->disp_info->mode &
- LQ035_DRIVER_OUTPUT_MASK) | LQ035_DRIVER_OUTPUT_DEFAULT;
-
- ret = lq035q1_control(spi, LQ035_SHUT_CTL, LQ035_ON);
- ret |= lq035q1_control(spi, LQ035_DRIVER_OUTPUT_CTL, ctl->mode);
- if (ret) {
- kfree(ctl);
- return ret;
- }
-
- spi_set_drvdata(spi, ctl);
-
- return 0;
-}
-
-static int lq035q1_spidev_remove(struct spi_device *spi)
-{
- return lq035q1_control(spi, LQ035_SHUT_CTL, LQ035_SHUT);
-}
-
-#ifdef CONFIG_PM_SLEEP
-static int lq035q1_spidev_suspend(struct device *dev)
-{
- struct spi_device *spi = to_spi_device(dev);
-
- return lq035q1_control(spi, LQ035_SHUT_CTL, LQ035_SHUT);
-}
-
-static int lq035q1_spidev_resume(struct device *dev)
-{
- struct spi_device *spi = to_spi_device(dev);
- struct spi_control *ctl = spi_get_drvdata(spi);
- int ret;
-
- ret = lq035q1_control(spi, LQ035_DRIVER_OUTPUT_CTL, ctl->mode);
- if (ret)
- return ret;
-
- return lq035q1_control(spi, LQ035_SHUT_CTL, LQ035_ON);
-}
-
-static SIMPLE_DEV_PM_OPS(lq035q1_spidev_pm_ops, lq035q1_spidev_suspend,
- lq035q1_spidev_resume);
-#define LQ035Q1_SPIDEV_PM_OPS (&lq035q1_spidev_pm_ops)
-
-#else
-#define LQ035Q1_SPIDEV_PM_OPS NULL
-#endif
-
-/* Power down all displays on reboot, poweroff or halt */
-static void lq035q1_spidev_shutdown(struct spi_device *spi)
-{
- lq035q1_control(spi, LQ035_SHUT_CTL, LQ035_SHUT);
-}
-
-static int lq035q1_backlight(struct bfin_lq035q1fb_info *info, unsigned arg)
-{
- if (info->disp_info->use_bl)
- gpio_set_value(info->disp_info->gpio_bl, arg);
-
- return 0;
-}
-
-static int bfin_lq035q1_calc_timing(struct bfin_lq035q1fb_info *fbi)
-{
- unsigned long clocks_per_pix, cpld_pipeline_delay_cor;
-
- /*
- * Interface 16/18-bit TFT over an 8-bit wide PPI using a small
- * Programmable Logic Device (CPLD)
- * http://blackfin.uclinux.org/gf/project/stamp/frs/?action=FrsReleaseBrowse&frs_package_id=165
- */
-
- switch (fbi->disp_info->ppi_mode) {
- case USE_RGB565_16_BIT_PPI:
- fbi->lcd_bpp = 16;
- clocks_per_pix = 1;
- cpld_pipeline_delay_cor = 0;
- break;
- case USE_RGB565_8_BIT_PPI:
- fbi->lcd_bpp = 16;
- clocks_per_pix = 2;
- cpld_pipeline_delay_cor = 3;
- break;
- case USE_RGB888_8_BIT_PPI:
- fbi->lcd_bpp = 24;
- clocks_per_pix = 3;
- cpld_pipeline_delay_cor = 5;
- break;
- default:
- return -EINVAL;
- }
-
- /*
- * HS and VS timing parameters (all in number of PPI clk ticks)
- */
-
- fbi->h_actpix = (LCD_X_RES * clocks_per_pix); /* active horizontal pixel */
- fbi->h_period = (336 * clocks_per_pix); /* HS period */
- fbi->h_pulse = (2 * clocks_per_pix); /* HS pulse width */
- fbi->h_start = (7 * clocks_per_pix + cpld_pipeline_delay_cor); /* first valid pixel */
-
- fbi->v_lines = (LCD_Y_RES + U_LINE); /* total vertical lines */
- fbi->v_pulse = (2 * clocks_per_pix); /* VS pulse width (1-5 H_PERIODs) */
- fbi->v_period = (fbi->h_period * fbi->v_lines); /* VS period */
-
- return 0;
-}
-
-static void bfin_lq035q1_config_ppi(struct bfin_lq035q1fb_info *fbi)
-{
- unsigned ppi_pmode;
-
- if (fbi->disp_info->ppi_mode == USE_RGB565_16_BIT_PPI)
- ppi_pmode = DLEN_16;
- else
- ppi_pmode = (DLEN_8 | PACK_EN);
-
- bfin_write_PPI_DELAY(fbi->h_start);
- bfin_write_PPI_COUNT(fbi->h_actpix - 1);
- bfin_write_PPI_FRAME(fbi->v_lines);
-
- bfin_write_PPI_CONTROL(PPI_TX_MODE | /* output mode , PORT_DIR */
- PPI_XFER_TYPE_11 | /* sync mode XFR_TYPE */
- PPI_PORT_CFG_01 | /* two frame sync PORT_CFG */
- ppi_pmode | /* 8/16 bit data length / PACK_EN? */
- PPI_POLS_1); /* faling edge syncs POLS */
-}
-
-static inline void bfin_lq035q1_disable_ppi(void)
-{
- bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() & ~PORT_EN);
-}
-
-static inline void bfin_lq035q1_enable_ppi(void)
-{
- bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() | PORT_EN);
-}
-
-static void bfin_lq035q1_start_timers(void)
-{
- enable_gptimers(TIMER_VSYNCbit | TIMER_HSYNCbit);
-}
-
-static void bfin_lq035q1_stop_timers(void)
-{
- disable_gptimers(TIMER_HSYNCbit | TIMER_VSYNCbit);
-
- set_gptimer_status(0, TIMER_HSYNC_STATUS_TRUN | TIMER_VSYNC_STATUS_TRUN |
- TIMER_HSYNC_STATUS_TIMIL | TIMER_VSYNC_STATUS_TIMIL |
- TIMER_HSYNC_STATUS_TOVF | TIMER_VSYNC_STATUS_TOVF);
-
-}
-
-static void bfin_lq035q1_init_timers(struct bfin_lq035q1fb_info *fbi)
-{
-
- bfin_lq035q1_stop_timers();
-
- set_gptimer_period(TIMER_HSYNC_id, fbi->h_period);
- set_gptimer_pwidth(TIMER_HSYNC_id, fbi->h_pulse);
- set_gptimer_config(TIMER_HSYNC_id, TIMER_MODE_PWM | TIMER_PERIOD_CNT |
- TIMER_TIN_SEL | TIMER_CLK_SEL|
- TIMER_EMU_RUN);
-
- set_gptimer_period(TIMER_VSYNC_id, fbi->v_period);
- set_gptimer_pwidth(TIMER_VSYNC_id, fbi->v_pulse);
- set_gptimer_config(TIMER_VSYNC_id, TIMER_MODE_PWM | TIMER_PERIOD_CNT |
- TIMER_TIN_SEL | TIMER_CLK_SEL |
- TIMER_EMU_RUN);
-
-}
-
-static void bfin_lq035q1_config_dma(struct bfin_lq035q1fb_info *fbi)
-{
-
-
- set_dma_config(CH_PPI,
- set_bfin_dma_config(DIR_READ, DMA_FLOW_AUTO,
- INTR_DISABLE, DIMENSION_2D,
- DATA_SIZE_16,
- DMA_NOSYNC_KEEP_DMA_BUF));
- set_dma_x_count(CH_PPI, (LCD_X_RES * fbi->lcd_bpp) / DMA_BUS_SIZE);
- set_dma_x_modify(CH_PPI, DMA_BUS_SIZE / 8);
- set_dma_y_count(CH_PPI, fbi->v_lines);
-
- set_dma_y_modify(CH_PPI, DMA_BUS_SIZE / 8);
- set_dma_start_addr(CH_PPI, (unsigned long)fbi->fb_buffer);
-
-}
-
-static const u16 ppi0_req_16[] = {P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
- P_PPI0_D0, P_PPI0_D1, P_PPI0_D2,
- P_PPI0_D3, P_PPI0_D4, P_PPI0_D5,
- P_PPI0_D6, P_PPI0_D7, P_PPI0_D8,
- P_PPI0_D9, P_PPI0_D10, P_PPI0_D11,
- P_PPI0_D12, P_PPI0_D13, P_PPI0_D14,
- P_PPI0_D15, 0};
-
-static const u16 ppi0_req_8[] = {P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
- P_PPI0_D0, P_PPI0_D1, P_PPI0_D2,
- P_PPI0_D3, P_PPI0_D4, P_PPI0_D5,
- P_PPI0_D6, P_PPI0_D7, 0};
-
-static inline void bfin_lq035q1_free_ports(unsigned ppi16)
-{
- if (ppi16)
- peripheral_free_list(ppi0_req_16);
- else
- peripheral_free_list(ppi0_req_8);
-
- if (ANOMALY_05000400)
- gpio_free(P_IDENT(P_PPI0_FS3));
-}
-
-static int bfin_lq035q1_request_ports(struct platform_device *pdev,
- unsigned ppi16)
-{
- int ret;
- /* ANOMALY_05000400 - PPI Does Not Start Properly In Specific Mode:
- * Drive PPI_FS3 Low
- */
- if (ANOMALY_05000400) {
- int ret = gpio_request_one(P_IDENT(P_PPI0_FS3),
- GPIOF_OUT_INIT_LOW, "PPI_FS3");
- if (ret)
- return ret;
- }
-
- if (ppi16)
- ret = peripheral_request_list(ppi0_req_16, DRIVER_NAME);
- else
- ret = peripheral_request_list(ppi0_req_8, DRIVER_NAME);
-
- if (ret) {
- dev_err(&pdev->dev, "requesting peripherals failed\n");
- return -EFAULT;
- }
-
- return 0;
-}
-
-static int bfin_lq035q1_fb_open(struct fb_info *info, int user)
-{
- struct bfin_lq035q1fb_info *fbi = info->par;
-
- spin_lock(&fbi->lock);
- fbi->lq035_open_cnt++;
-
- if (fbi->lq035_open_cnt <= 1) {
-
- bfin_lq035q1_disable_ppi();
- SSYNC();
-
- bfin_lq035q1_config_dma(fbi);
- bfin_lq035q1_config_ppi(fbi);
- bfin_lq035q1_init_timers(fbi);
-
- /* start dma */
- enable_dma(CH_PPI);
- bfin_lq035q1_enable_ppi();
- bfin_lq035q1_start_timers();
- lq035q1_backlight(fbi, 1);
- }
-
- spin_unlock(&fbi->lock);
-
- return 0;
-}
-
-static int bfin_lq035q1_fb_release(struct fb_info *info, int user)
-{
- struct bfin_lq035q1fb_info *fbi = info->par;
-
- spin_lock(&fbi->lock);
-
- fbi->lq035_open_cnt--;
-
- if (fbi->lq035_open_cnt <= 0) {
- lq035q1_backlight(fbi, 0);
- bfin_lq035q1_disable_ppi();
- SSYNC();
- disable_dma(CH_PPI);
- bfin_lq035q1_stop_timers();
- }
-
- spin_unlock(&fbi->lock);
-
- return 0;
-}
-
-static int bfin_lq035q1_fb_check_var(struct fb_var_screeninfo *var,
- struct fb_info *info)
-{
- struct bfin_lq035q1fb_info *fbi = info->par;
-
- if (var->bits_per_pixel == fbi->lcd_bpp) {
- var->red.offset = info->var.red.offset;
- var->green.offset = info->var.green.offset;
- var->blue.offset = info->var.blue.offset;
- var->red.length = info->var.red.length;
- var->green.length = info->var.green.length;
- var->blue.length = info->var.blue.length;
- var->transp.offset = 0;
- var->transp.length = 0;
- var->transp.msb_right = 0;
- var->red.msb_right = 0;
- var->green.msb_right = 0;
- var->blue.msb_right = 0;
- } else {
- pr_debug("%s: depth not supported: %u BPP\n", __func__,
- var->bits_per_pixel);
- return -EINVAL;
- }
-
- if (info->var.xres != var->xres || info->var.yres != var->yres ||
- info->var.xres_virtual != var->xres_virtual ||
- info->var.yres_virtual != var->yres_virtual) {
- pr_debug("%s: Resolution not supported: X%u x Y%u \n",
- __func__, var->xres, var->yres);
- return -EINVAL;
- }
-
- /*
- * Memory limit
- */
-
- if ((info->fix.line_length * var->yres_virtual) > info->fix.smem_len) {
- pr_debug("%s: Memory Limit requested yres_virtual = %u\n",
- __func__, var->yres_virtual);
- return -ENOMEM;
- }
-
-
- return 0;
-}
-
-int bfin_lq035q1_fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
-{
- if (nocursor)
- return 0;
- else
- return -EINVAL; /* just to force soft_cursor() call */
-}
-
-static int bfin_lq035q1_fb_setcolreg(u_int regno, u_int red, u_int green,
- u_int blue, u_int transp,
- struct fb_info *info)
-{
- if (regno >= BFIN_LCD_NBR_PALETTE_ENTRIES)
- return -EINVAL;
-
- if (info->var.grayscale) {
- /* grayscale = 0.30*R + 0.59*G + 0.11*B */
- red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
- }
-
- if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
-
- u32 value;
- /* Place color in the pseudopalette */
- if (regno > 16)
- return -EINVAL;
-
- red >>= (16 - info->var.red.length);
- green >>= (16 - info->var.green.length);
- blue >>= (16 - info->var.blue.length);
-
- value = (red << info->var.red.offset) |
- (green << info->var.green.offset) |
- (blue << info->var.blue.offset);
- value &= 0xFFFFFF;
-
- ((u32 *) (info->pseudo_palette))[regno] = value;
-
- }
-
- return 0;
-}
-
-static struct fb_ops bfin_lq035q1_fb_ops = {
- .owner = THIS_MODULE,
- .fb_open = bfin_lq035q1_fb_open,
- .fb_release = bfin_lq035q1_fb_release,
- .fb_check_var = bfin_lq035q1_fb_check_var,
- .fb_fillrect = cfb_fillrect,
- .fb_copyarea = cfb_copyarea,
- .fb_imageblit = cfb_imageblit,
- .fb_cursor = bfin_lq035q1_fb_cursor,
- .fb_setcolreg = bfin_lq035q1_fb_setcolreg,
-};
-
-static irqreturn_t bfin_lq035q1_irq_error(int irq, void *dev_id)
-{
- /*struct bfin_lq035q1fb_info *info = (struct bfin_lq035q1fb_info *)dev_id;*/
-
- u16 status = bfin_read_PPI_STATUS();
- bfin_write_PPI_STATUS(-1);
-
- if (status) {
- bfin_lq035q1_disable_ppi();
- disable_dma(CH_PPI);
-
- /* start dma */
- enable_dma(CH_PPI);
- bfin_lq035q1_enable_ppi();
- bfin_write_PPI_STATUS(-1);
- }
-
- return IRQ_HANDLED;
-}
-
-static int bfin_lq035q1_probe(struct platform_device *pdev)
-{
- struct bfin_lq035q1fb_info *info;
- struct fb_info *fbinfo;
- u32 active_video_mem_offset;
- int ret;
-
- ret = request_dma(CH_PPI, DRIVER_NAME"_CH_PPI");
- if (ret < 0) {
- dev_err(&pdev->dev, "PPI DMA unavailable\n");
- goto out1;
- }
-
- fbinfo = framebuffer_alloc(sizeof(*info), &pdev->dev);
- if (!fbinfo) {
- ret = -ENOMEM;
- goto out2;
- }
-
- info = fbinfo->par;
- info->fb = fbinfo;
- info->dev = &pdev->dev;
- spin_lock_init(&info->lock);
-
- info->disp_info = pdev->dev.platform_data;
-
- platform_set_drvdata(pdev, fbinfo);
-
- ret = bfin_lq035q1_calc_timing(info);
- if (ret < 0) {
- dev_err(&pdev->dev, "Failed PPI Mode\n");
- goto out3;
- }
-
- strcpy(fbinfo->fix.id, DRIVER_NAME);
-
- fbinfo->fix.type = FB_TYPE_PACKED_PIXELS;
- fbinfo->fix.type_aux = 0;
- fbinfo->fix.xpanstep = 0;
- fbinfo->fix.ypanstep = 0;
- fbinfo->fix.ywrapstep = 0;
- fbinfo->fix.accel = FB_ACCEL_NONE;
- fbinfo->fix.visual = FB_VISUAL_TRUECOLOR;
-
- fbinfo->var.nonstd = 0;
- fbinfo->var.activate = FB_ACTIVATE_NOW;
- fbinfo->var.height = -1;
- fbinfo->var.width = -1;
- fbinfo->var.accel_flags = 0;
- fbinfo->var.vmode = FB_VMODE_NONINTERLACED;
-
- fbinfo->var.xres = LCD_X_RES;
- fbinfo->var.xres_virtual = LCD_X_RES;
- fbinfo->var.yres = LCD_Y_RES;
- fbinfo->var.yres_virtual = LCD_Y_RES;
- fbinfo->var.bits_per_pixel = info->lcd_bpp;
-
- if (info->disp_info->mode & LQ035_BGR) {
- if (info->lcd_bpp == 24) {
- fbinfo->var.red.offset = 0;
- fbinfo->var.green.offset = 8;
- fbinfo->var.blue.offset = 16;
- } else {
- fbinfo->var.red.offset = 0;
- fbinfo->var.green.offset = 5;
- fbinfo->var.blue.offset = 11;
- }
- } else {
- if (info->lcd_bpp == 24) {
- fbinfo->var.red.offset = 16;
- fbinfo->var.green.offset = 8;
- fbinfo->var.blue.offset = 0;
- } else {
- fbinfo->var.red.offset = 11;
- fbinfo->var.green.offset = 5;
- fbinfo->var.blue.offset = 0;
- }
- }
-
- fbinfo->var.transp.offset = 0;
-
- if (info->lcd_bpp == 24) {
- fbinfo->var.red.length = 8;
- fbinfo->var.green.length = 8;
- fbinfo->var.blue.length = 8;
- } else {
- fbinfo->var.red.length = 5;
- fbinfo->var.green.length = 6;
- fbinfo->var.blue.length = 5;
- }
-
- fbinfo->var.transp.length = 0;
-
- active_video_mem_offset = ((U_LINE / 2) * LCD_X_RES * (info->lcd_bpp / 8));
-
- fbinfo->fix.smem_len = LCD_X_RES * LCD_Y_RES * info->lcd_bpp / 8
- + active_video_mem_offset;
-
- fbinfo->fix.line_length = fbinfo->var.xres_virtual *
- fbinfo->var.bits_per_pixel / 8;
-
-
- fbinfo->fbops = &bfin_lq035q1_fb_ops;
- fbinfo->flags = FBINFO_FLAG_DEFAULT;
-
- info->fb_buffer =
- dma_alloc_coherent(NULL, fbinfo->fix.smem_len, &info->dma_handle,
- GFP_KERNEL);
-
- if (NULL == info->fb_buffer) {
- dev_err(&pdev->dev, "couldn't allocate dma buffer\n");
- ret = -ENOMEM;
- goto out3;
- }
-
- fbinfo->screen_base = (void *)info->fb_buffer + active_video_mem_offset;
- fbinfo->fix.smem_start = (int)info->fb_buffer + active_video_mem_offset;
-
- fbinfo->fbops = &bfin_lq035q1_fb_ops;
-
- fbinfo->pseudo_palette = &info->pseudo_pal;
-
- ret = fb_alloc_cmap(&fbinfo->cmap, BFIN_LCD_NBR_PALETTE_ENTRIES, 0);
- if (ret < 0) {
- dev_err(&pdev->dev, "failed to allocate colormap (%d entries)\n",
- BFIN_LCD_NBR_PALETTE_ENTRIES);
- goto out4;
- }
-
- ret = bfin_lq035q1_request_ports(pdev,
- info->disp_info->ppi_mode == USE_RGB565_16_BIT_PPI);
- if (ret) {
- dev_err(&pdev->dev, "couldn't request gpio port\n");
- goto out6;
- }
-
- info->irq = platform_get_irq(pdev, 0);
- if (info->irq < 0) {
- ret = -EINVAL;
- goto out7;
- }
-
- ret = request_irq(info->irq, bfin_lq035q1_irq_error, 0,
- DRIVER_NAME" PPI ERROR", info);
- if (ret < 0) {
- dev_err(&pdev->dev, "unable to request PPI ERROR IRQ\n");
- goto out7;
- }
-
- info->spidrv.driver.name = DRIVER_NAME"-spi";
- info->spidrv.probe = lq035q1_spidev_probe;
- info->spidrv.remove = lq035q1_spidev_remove;
- info->spidrv.shutdown = lq035q1_spidev_shutdown;
- info->spidrv.driver.pm = LQ035Q1_SPIDEV_PM_OPS;
-
- ret = spi_register_driver(&info->spidrv);
- if (ret < 0) {
- dev_err(&pdev->dev, "couldn't register SPI Interface\n");
- goto out8;
- }
-
- if (info->disp_info->use_bl) {
- ret = gpio_request_one(info->disp_info->gpio_bl,
- GPIOF_OUT_INIT_LOW, "LQ035 Backlight");
-
- if (ret) {
- dev_err(&pdev->dev, "failed to request GPIO %d\n",
- info->disp_info->gpio_bl);
- goto out9;
- }
- }
-
- ret = register_framebuffer(fbinfo);
- if (ret < 0) {
- dev_err(&pdev->dev, "unable to register framebuffer\n");
- goto out10;
- }
-
- dev_info(&pdev->dev, "%dx%d %d-bit RGB FrameBuffer initialized\n",
- LCD_X_RES, LCD_Y_RES, info->lcd_bpp);
-
- return 0;
-
- out10:
- if (info->disp_info->use_bl)
- gpio_free(info->disp_info->gpio_bl);
- out9:
- spi_unregister_driver(&info->spidrv);
- out8:
- free_irq(info->irq, info);
- out7:
- bfin_lq035q1_free_ports(info->disp_info->ppi_mode ==
- USE_RGB565_16_BIT_PPI);
- out6:
- fb_dealloc_cmap(&fbinfo->cmap);
- out4:
- dma_free_coherent(NULL, fbinfo->fix.smem_len, info->fb_buffer,
- info->dma_handle);
- out3:
- framebuffer_release(fbinfo);
- out2:
- free_dma(CH_PPI);
- out1:
-
- return ret;
-}
-
-static int bfin_lq035q1_remove(struct platform_device *pdev)
-{
- struct fb_info *fbinfo = platform_get_drvdata(pdev);
- struct bfin_lq035q1fb_info *info = fbinfo->par;
-
- if (info->disp_info->use_bl)
- gpio_free(info->disp_info->gpio_bl);
-
- spi_unregister_driver(&info->spidrv);
-
- unregister_framebuffer(fbinfo);
-
- free_dma(CH_PPI);
- free_irq(info->irq, info);
-
- if (info->fb_buffer != NULL)
- dma_free_coherent(NULL, fbinfo->fix.smem_len, info->fb_buffer,
- info->dma_handle);
-
- fb_dealloc_cmap(&fbinfo->cmap);
-
- bfin_lq035q1_free_ports(info->disp_info->ppi_mode ==
- USE_RGB565_16_BIT_PPI);
-
- framebuffer_release(fbinfo);
-
- dev_info(&pdev->dev, "unregistered LCD driver\n");
-
- return 0;
-}
-
-#ifdef CONFIG_PM
-static int bfin_lq035q1_suspend(struct device *dev)
-{
- struct fb_info *fbinfo = dev_get_drvdata(dev);
- struct bfin_lq035q1fb_info *info = fbinfo->par;
-
- if (info->lq035_open_cnt) {
- lq035q1_backlight(info, 0);
- bfin_lq035q1_disable_ppi();
- SSYNC();
- disable_dma(CH_PPI);
- bfin_lq035q1_stop_timers();
- bfin_write_PPI_STATUS(-1);
- }
-
- return 0;
-}
-
-static int bfin_lq035q1_resume(struct device *dev)
-{
- struct fb_info *fbinfo = dev_get_drvdata(dev);
- struct bfin_lq035q1fb_info *info = fbinfo->par;
-
- if (info->lq035_open_cnt) {
- bfin_lq035q1_disable_ppi();
- SSYNC();
-
- bfin_lq035q1_config_dma(info);
- bfin_lq035q1_config_ppi(info);
- bfin_lq035q1_init_timers(info);
-
- /* start dma */
- enable_dma(CH_PPI);
- bfin_lq035q1_enable_ppi();
- bfin_lq035q1_start_timers();
- lq035q1_backlight(info, 1);
- }
-
- return 0;
-}
-
-static const struct dev_pm_ops bfin_lq035q1_dev_pm_ops = {
- .suspend = bfin_lq035q1_suspend,
- .resume = bfin_lq035q1_resume,
-};
-#endif
-
-static struct platform_driver bfin_lq035q1_driver = {
- .probe = bfin_lq035q1_probe,
- .remove = bfin_lq035q1_remove,
- .driver = {
- .name = DRIVER_NAME,
-#ifdef CONFIG_PM
- .pm = &bfin_lq035q1_dev_pm_ops,
-#endif
- },
-};
-
-module_platform_driver(bfin_lq035q1_driver);
-
-MODULE_DESCRIPTION("Blackfin TFT LCD Driver");
-MODULE_LICENSE("GPL");
diff --git a/drivers/video/fbdev/bfin-t350mcqb-fb.c b/drivers/video/fbdev/bfin-t350mcqb-fb.c
deleted file mode 100644
index e5ee4d9677f7..000000000000
--- a/drivers/video/fbdev/bfin-t350mcqb-fb.c
+++ /dev/null
@@ -1,669 +0,0 @@
-/*
- * File: drivers/video/bfin-t350mcqb-fb.c
- * Based on:
- * Author: Michael Hennerich <hennerich@blackfin.uclinux.org>
- *
- * Created:
- * Description: Blackfin LCD Framebuffer driver
- *
- *
- * Modified:
- * Copyright 2004-2007 Analog Devices Inc.
- *
- * Bugs: Enter bugs at http://blackfin.uclinux.org/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, see the file COPYING, or write
- * to the Free Software Foundation, Inc.,
- * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/gfp.h>
-#include <linux/fb.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/device.h>
-#include <linux/backlight.h>
-#include <linux/lcd.h>
-#include <linux/dma-mapping.h>
-#include <linux/platform_device.h>
-
-#include <asm/blackfin.h>
-#include <asm/irq.h>
-#include <asm/dma-mapping.h>
-#include <asm/dma.h>
-#include <asm/portmux.h>
-#include <asm/gptimers.h>
-
-#define NO_BL_SUPPORT
-
-#define LCD_X_RES 320 /* Horizontal Resolution */
-#define LCD_Y_RES 240 /* Vertical Resolution */
-#define LCD_BPP 24 /* Bit Per Pixel */
-
-#define DMA_BUS_SIZE 16
-#define LCD_CLK (12*1000*1000) /* 12MHz */
-
-#define CLOCKS_PER_PIX 3
-
- /*
- * HS and VS timing parameters (all in number of PPI clk ticks)
- */
-
-#define U_LINE 1 /* Blanking Lines */
-
-#define H_ACTPIX (LCD_X_RES * CLOCKS_PER_PIX) /* active horizontal pixel */
-#define H_PERIOD (408 * CLOCKS_PER_PIX) /* HS period */
-#define H_PULSE 90 /* HS pulse width */
-#define H_START 204 /* first valid pixel */
-
-#define V_LINES (LCD_Y_RES + U_LINE) /* total vertical lines */
-#define V_PULSE (3 * H_PERIOD) /* VS pulse width (1-5 H_PERIODs) */
-#define V_PERIOD (H_PERIOD * V_LINES) /* VS period */
-
-#define ACTIVE_VIDEO_MEM_OFFSET (U_LINE * H_ACTPIX)
-
-#define BFIN_LCD_NBR_PALETTE_ENTRIES 256
-
-#define DRIVER_NAME "bfin-t350mcqb"
-static char driver_name[] = DRIVER_NAME;
-
-struct bfin_t350mcqbfb_info {
- struct fb_info *fb;
- struct device *dev;
- unsigned char *fb_buffer; /* RGB Buffer */
- dma_addr_t dma_handle;
- int lq043_open_cnt;
- int irq;
- spinlock_t lock; /* lock */
- u32 pseudo_pal[16];
-};
-
-static int nocursor;
-module_param(nocursor, int, 0644);
-MODULE_PARM_DESC(nocursor, "cursor enable/disable");
-
-#define PPI_TX_MODE 0x2
-#define PPI_XFER_TYPE_11 0xC
-#define PPI_PORT_CFG_01 0x10
-#define PPI_PACK_EN 0x80
-#define PPI_POLS_1 0x8000
-
-static void bfin_t350mcqb_config_ppi(struct bfin_t350mcqbfb_info *fbi)
-{
- bfin_write_PPI_DELAY(H_START);
- bfin_write_PPI_COUNT(H_ACTPIX-1);
- bfin_write_PPI_FRAME(V_LINES);
-
- bfin_write_PPI_CONTROL(PPI_TX_MODE | /* output mode , PORT_DIR */
- PPI_XFER_TYPE_11 | /* sync mode XFR_TYPE */
- PPI_PORT_CFG_01 | /* two frame sync PORT_CFG */
- PPI_PACK_EN | /* packing enabled PACK_EN */
- PPI_POLS_1); /* faling edge syncs POLS */
-}
-
-static inline void bfin_t350mcqb_disable_ppi(void)
-{
- bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() & ~PORT_EN);
-}
-
-static inline void bfin_t350mcqb_enable_ppi(void)
-{
- bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() | PORT_EN);
-}
-
-static void bfin_t350mcqb_start_timers(void)
-{
- unsigned long flags;
-
- local_irq_save(flags);
- enable_gptimers(TIMER1bit);
- enable_gptimers(TIMER0bit);
- local_irq_restore(flags);
-}
-
-static void bfin_t350mcqb_stop_timers(void)
-{
- disable_gptimers(TIMER0bit | TIMER1bit);
-
- set_gptimer_status(0, TIMER_STATUS_TRUN0 | TIMER_STATUS_TRUN1 |
- TIMER_STATUS_TIMIL0 | TIMER_STATUS_TIMIL1 |
- TIMER_STATUS_TOVF0 | TIMER_STATUS_TOVF1);
-
-}
-
-static void bfin_t350mcqb_init_timers(void)
-{
-
- bfin_t350mcqb_stop_timers();
-
- set_gptimer_period(TIMER0_id, H_PERIOD);
- set_gptimer_pwidth(TIMER0_id, H_PULSE);
- set_gptimer_config(TIMER0_id, TIMER_MODE_PWM | TIMER_PERIOD_CNT |
- TIMER_TIN_SEL | TIMER_CLK_SEL|
- TIMER_EMU_RUN);
-
- set_gptimer_period(TIMER1_id, V_PERIOD);
- set_gptimer_pwidth(TIMER1_id, V_PULSE);
- set_gptimer_config(TIMER1_id, TIMER_MODE_PWM | TIMER_PERIOD_CNT |
- TIMER_TIN_SEL | TIMER_CLK_SEL |
- TIMER_EMU_RUN);
-
-}
-
-static void bfin_t350mcqb_config_dma(struct bfin_t350mcqbfb_info *fbi)
-{
-
- set_dma_config(CH_PPI,
- set_bfin_dma_config(DIR_READ, DMA_FLOW_AUTO,
- INTR_DISABLE, DIMENSION_2D,
- DATA_SIZE_16,
- DMA_NOSYNC_KEEP_DMA_BUF));
- set_dma_x_count(CH_PPI, (LCD_X_RES * LCD_BPP) / DMA_BUS_SIZE);
- set_dma_x_modify(CH_PPI, DMA_BUS_SIZE / 8);
- set_dma_y_count(CH_PPI, V_LINES);
-
- set_dma_y_modify(CH_PPI, DMA_BUS_SIZE / 8);
- set_dma_start_addr(CH_PPI, (unsigned long)fbi->fb_buffer);
-
-}
-
-static u16 ppi0_req_8[] = {P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
- P_PPI0_D0, P_PPI0_D1, P_PPI0_D2,
- P_PPI0_D3, P_PPI0_D4, P_PPI0_D5,
- P_PPI0_D6, P_PPI0_D7, 0};
-
-static int bfin_t350mcqb_request_ports(int action)
-{
- if (action) {
- if (peripheral_request_list(ppi0_req_8, DRIVER_NAME)) {
- printk(KERN_ERR "Requesting Peripherals failed\n");
- return -EFAULT;
- }
- } else
- peripheral_free_list(ppi0_req_8);
-
- return 0;
-}
-
-static int bfin_t350mcqb_fb_open(struct fb_info *info, int user)
-{
- struct bfin_t350mcqbfb_info *fbi = info->par;
-
- spin_lock(&fbi->lock);
- fbi->lq043_open_cnt++;
-
- if (fbi->lq043_open_cnt <= 1) {
-
- bfin_t350mcqb_disable_ppi();
- SSYNC();
-
- bfin_t350mcqb_config_dma(fbi);
- bfin_t350mcqb_config_ppi(fbi);
- bfin_t350mcqb_init_timers();
-
- /* start dma */
- enable_dma(CH_PPI);
- bfin_t350mcqb_enable_ppi();
- bfin_t350mcqb_start_timers();
- }
-
- spin_unlock(&fbi->lock);
-
- return 0;
-}
-
-static int bfin_t350mcqb_fb_release(struct fb_info *info, int user)
-{
- struct bfin_t350mcqbfb_info *fbi = info->par;
-
- spin_lock(&fbi->lock);
-
- fbi->lq043_open_cnt--;
-
- if (fbi->lq043_open_cnt <= 0) {
- bfin_t350mcqb_disable_ppi();
- SSYNC();
- disable_dma(CH_PPI);
- bfin_t350mcqb_stop_timers();
- }
-
- spin_unlock(&fbi->lock);
-
- return 0;
-}
-
-static int bfin_t350mcqb_fb_check_var(struct fb_var_screeninfo *var,
- struct fb_info *info)
-{
-
- switch (var->bits_per_pixel) {
- case 24:/* TRUECOLOUR, 16m */
- var->red.offset = 0;
- var->green.offset = 8;
- var->blue.offset = 16;
- var->red.length = var->green.length = var->blue.length = 8;
- var->transp.offset = 0;
- var->transp.length = 0;
- var->transp.msb_right = 0;
- var->red.msb_right = 0;
- var->green.msb_right = 0;
- var->blue.msb_right = 0;
- break;
- default:
- pr_debug("%s: depth not supported: %u BPP\n", __func__,
- var->bits_per_pixel);
- return -EINVAL;
- }
-
- if (info->var.xres != var->xres || info->var.yres != var->yres ||
- info->var.xres_virtual != var->xres_virtual ||
- info->var.yres_virtual != var->yres_virtual) {
- pr_debug("%s: Resolution not supported: X%u x Y%u \n",
- __func__, var->xres, var->yres);
- return -EINVAL;
- }
-
- /*
- * Memory limit
- */
-
- if ((info->fix.line_length * var->yres_virtual) > info->fix.smem_len) {
- pr_debug("%s: Memory Limit requested yres_virtual = %u\n",
- __func__, var->yres_virtual);
- return -ENOMEM;
- }
-
- return 0;
-}
-
-int bfin_t350mcqb_fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
-{
- if (nocursor)
- return 0;
- else
- return -EINVAL; /* just to force soft_cursor() call */
-}
-
-static int bfin_t350mcqb_fb_setcolreg(u_int regno, u_int red, u_int green,
- u_int blue, u_int transp,
- struct fb_info *info)
-{
- if (regno >= BFIN_LCD_NBR_PALETTE_ENTRIES)
- return -EINVAL;
-
- if (info->var.grayscale) {
- /* grayscale = 0.30*R + 0.59*G + 0.11*B */
- red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
- }
-
- if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
-
- u32 value;
- /* Place color in the pseudopalette */
- if (regno > 16)
- return -EINVAL;
-
- red >>= (16 - info->var.red.length);
- green >>= (16 - info->var.green.length);
- blue >>= (16 - info->var.blue.length);
-
- value = (red << info->var.red.offset) |
- (green << info->var.green.offset) |
- (blue << info->var.blue.offset);
- value &= 0xFFFFFF;
-
- ((u32 *) (info->pseudo_palette))[regno] = value;
-
- }
-
- return 0;
-}
-
-static struct fb_ops bfin_t350mcqb_fb_ops = {
- .owner = THIS_MODULE,
- .fb_open = bfin_t350mcqb_fb_open,
- .fb_release = bfin_t350mcqb_fb_release,
- .fb_check_var = bfin_t350mcqb_fb_check_var,
- .fb_fillrect = cfb_fillrect,
- .fb_copyarea = cfb_copyarea,
- .fb_imageblit = cfb_imageblit,
- .fb_cursor = bfin_t350mcqb_fb_cursor,
- .fb_setcolreg = bfin_t350mcqb_fb_setcolreg,
-};
-
-#ifndef NO_BL_SUPPORT
-static int bl_get_brightness(struct backlight_device *bd)
-{
- return 0;
-}
-
-static const struct backlight_ops bfin_lq043fb_bl_ops = {
- .get_brightness = bl_get_brightness,
-};
-
-static struct backlight_device *bl_dev;
-
-static int bfin_lcd_get_power(struct lcd_device *dev)
-{
- return 0;
-}
-
-static int bfin_lcd_set_power(struct lcd_device *dev, int power)
-{
- return 0;
-}
-
-static int bfin_lcd_get_contrast(struct lcd_device *dev)
-{
- return 0;
-}
-
-static int bfin_lcd_set_contrast(struct lcd_device *dev, int contrast)
-{
-
- return 0;
-}
-
-static int bfin_lcd_check_fb(struct lcd_device *dev, struct fb_info *fi)
-{
- if (!fi || (fi == &bfin_t350mcqb_fb))
- return 1;
- return 0;
-}
-
-static struct lcd_ops bfin_lcd_ops = {
- .get_power = bfin_lcd_get_power,
- .set_power = bfin_lcd_set_power,
- .get_contrast = bfin_lcd_get_contrast,
- .set_contrast = bfin_lcd_set_contrast,
- .check_fb = bfin_lcd_check_fb,
-};
-
-static struct lcd_device *lcd_dev;
-#endif
-
-static irqreturn_t bfin_t350mcqb_irq_error(int irq, void *dev_id)
-{
- /*struct bfin_t350mcqbfb_info *info = (struct bfin_t350mcqbfb_info *)dev_id;*/
-
- u16 status = bfin_read_PPI_STATUS();
- bfin_write_PPI_STATUS(0xFFFF);
-
- if (status) {
- bfin_t350mcqb_disable_ppi();
- disable_dma(CH_PPI);
-
- /* start dma */
- enable_dma(CH_PPI);
- bfin_t350mcqb_enable_ppi();
- bfin_write_PPI_STATUS(0xFFFF);
- }
-
- return IRQ_HANDLED;
-}
-
-static int bfin_t350mcqb_probe(struct platform_device *pdev)
-{
-#ifndef NO_BL_SUPPORT
- struct backlight_properties props;
-#endif
- struct bfin_t350mcqbfb_info *info;
- struct fb_info *fbinfo;
- int ret;
-
- printk(KERN_INFO DRIVER_NAME ": %dx%d %d-bit RGB FrameBuffer initializing...\n",
- LCD_X_RES, LCD_Y_RES, LCD_BPP);
-
- if (request_dma(CH_PPI, "CH_PPI") < 0) {
- printk(KERN_ERR DRIVER_NAME
- ": couldn't request CH_PPI DMA\n");
- ret = -EFAULT;
- goto out1;
- }
-
- fbinfo =
- framebuffer_alloc(sizeof(struct bfin_t350mcqbfb_info), &pdev->dev);
- if (!fbinfo) {
- ret = -ENOMEM;
- goto out2;
- }
-
- info = fbinfo->par;
- info->fb = fbinfo;
- info->dev = &pdev->dev;
- spin_lock_init(&info->lock);
-
- platform_set_drvdata(pdev, fbinfo);
-
- strcpy(fbinfo->fix.id, driver_name);
-
- fbinfo->fix.type = FB_TYPE_PACKED_PIXELS;
- fbinfo->fix.type_aux = 0;
- fbinfo->fix.xpanstep = 0;
- fbinfo->fix.ypanstep = 0;
- fbinfo->fix.ywrapstep = 0;
- fbinfo->fix.accel = FB_ACCEL_NONE;
- fbinfo->fix.visual = FB_VISUAL_TRUECOLOR;
-
- fbinfo->var.nonstd = 0;
- fbinfo->var.activate = FB_ACTIVATE_NOW;
- fbinfo->var.height = 53;
- fbinfo->var.width = 70;
- fbinfo->var.accel_flags = 0;
- fbinfo->var.vmode = FB_VMODE_NONINTERLACED;
-
- fbinfo->var.xres = LCD_X_RES;
- fbinfo->var.xres_virtual = LCD_X_RES;
- fbinfo->var.yres = LCD_Y_RES;
- fbinfo->var.yres_virtual = LCD_Y_RES;
- fbinfo->var.bits_per_pixel = LCD_BPP;
-
- fbinfo->var.red.offset = 0;
- fbinfo->var.green.offset = 8;
- fbinfo->var.blue.offset = 16;
- fbinfo->var.transp.offset = 0;
- fbinfo->var.red.length = 8;
- fbinfo->var.green.length = 8;
- fbinfo->var.blue.length = 8;
- fbinfo->var.transp.length = 0;
- fbinfo->fix.smem_len = LCD_X_RES * LCD_Y_RES * LCD_BPP / 8;
-
- fbinfo->fix.line_length = fbinfo->var.xres_virtual *
- fbinfo->var.bits_per_pixel / 8;
-
-
- fbinfo->fbops = &bfin_t350mcqb_fb_ops;
- fbinfo->flags = FBINFO_FLAG_DEFAULT;
-
- info->fb_buffer = dma_alloc_coherent(NULL, fbinfo->fix.smem_len +
- ACTIVE_VIDEO_MEM_OFFSET,
- &info->dma_handle, GFP_KERNEL);
-
- if (NULL == info->fb_buffer) {
- printk(KERN_ERR DRIVER_NAME
- ": couldn't allocate dma buffer.\n");
- ret = -ENOMEM;
- goto out3;
- }
-
- fbinfo->screen_base = (void *)info->fb_buffer + ACTIVE_VIDEO_MEM_OFFSET;
- fbinfo->fix.smem_start = (int)info->fb_buffer + ACTIVE_VIDEO_MEM_OFFSET;
-
- fbinfo->fbops = &bfin_t350mcqb_fb_ops;
-
- fbinfo->pseudo_palette = &info->pseudo_pal;
-
- if (fb_alloc_cmap(&fbinfo->cmap, BFIN_LCD_NBR_PALETTE_ENTRIES, 0)
- < 0) {
- printk(KERN_ERR DRIVER_NAME
- "Fail to allocate colormap (%d entries)\n",
- BFIN_LCD_NBR_PALETTE_ENTRIES);
- ret = -EFAULT;
- goto out4;
- }
-
- if (bfin_t350mcqb_request_ports(1)) {
- printk(KERN_ERR DRIVER_NAME ": couldn't request gpio port.\n");
- ret = -EFAULT;
- goto out6;
- }
-
- info->irq = platform_get_irq(pdev, 0);
- if (info->irq < 0) {
- ret = -EINVAL;
- goto out7;
- }
-
- ret = request_irq(info->irq, bfin_t350mcqb_irq_error, 0,
- "PPI ERROR", info);
- if (ret < 0) {
- printk(KERN_ERR DRIVER_NAME
- ": unable to request PPI ERROR IRQ\n");
- goto out7;
- }
-
- if (register_framebuffer(fbinfo) < 0) {
- printk(KERN_ERR DRIVER_NAME
- ": unable to register framebuffer.\n");
- ret = -EINVAL;
- goto out8;
- }
-#ifndef NO_BL_SUPPORT
- memset(&props, 0, sizeof(struct backlight_properties));
- props.type = BACKLIGHT_RAW;
- props.max_brightness = 255;
- bl_dev = backlight_device_register("bf52x-bl", NULL, NULL,
- &bfin_lq043fb_bl_ops, &props);
- if (IS_ERR(bl_dev)) {
- printk(KERN_ERR DRIVER_NAME
- ": unable to register backlight.\n");
- ret = -EINVAL;
- unregister_framebuffer(fbinfo);
- goto out8;
- }
-
- lcd_dev = lcd_device_register(DRIVER_NAME, NULL, &bfin_lcd_ops);
- lcd_dev->props.max_contrast = 255, printk(KERN_INFO "Done.\n");
-#endif
-
- return 0;
-
-out8:
- free_irq(info->irq, info);
-out7:
- bfin_t350mcqb_request_ports(0);
-out6:
- fb_dealloc_cmap(&fbinfo->cmap);
-out4:
- dma_free_coherent(NULL, fbinfo->fix.smem_len + ACTIVE_VIDEO_MEM_OFFSET,
- info->fb_buffer, info->dma_handle);
-out3:
- framebuffer_release(fbinfo);
-out2:
- free_dma(CH_PPI);
-out1:
-
- return ret;
-}
-
-static int bfin_t350mcqb_remove(struct platform_device *pdev)
-{
-
- struct fb_info *fbinfo = platform_get_drvdata(pdev);
- struct bfin_t350mcqbfb_info *info = fbinfo->par;
-
- unregister_framebuffer(fbinfo);
-
- free_dma(CH_PPI);
- free_irq(info->irq, info);
-
- if (info->fb_buffer != NULL)
- dma_free_coherent(NULL, fbinfo->fix.smem_len +
- ACTIVE_VIDEO_MEM_OFFSET, info->fb_buffer,
- info->dma_handle);
-
- fb_dealloc_cmap(&fbinfo->cmap);
-
-#ifndef NO_BL_SUPPORT
- lcd_device_unregister(lcd_dev);
- backlight_device_unregister(bl_dev);
-#endif
-
- bfin_t350mcqb_request_ports(0);
-
- framebuffer_release(fbinfo);
-
- printk(KERN_INFO DRIVER_NAME ": Unregister LCD driver.\n");
-
- return 0;
-}
-
-#ifdef CONFIG_PM
-static int bfin_t350mcqb_suspend(struct platform_device *pdev, pm_message_t state)
-{
- struct fb_info *fbinfo = platform_get_drvdata(pdev);
- struct bfin_t350mcqbfb_info *fbi = fbinfo->par;
-
- if (fbi->lq043_open_cnt) {
- bfin_t350mcqb_disable_ppi();
- disable_dma(CH_PPI);
- bfin_t350mcqb_stop_timers();
- bfin_write_PPI_STATUS(-1);
- }
-
-
- return 0;
-}
-
-static int bfin_t350mcqb_resume(struct platform_device *pdev)
-{
- struct fb_info *fbinfo = platform_get_drvdata(pdev);
- struct bfin_t350mcqbfb_info *fbi = fbinfo->par;
-
- if (fbi->lq043_open_cnt) {
- bfin_t350mcqb_config_dma(fbi);
- bfin_t350mcqb_config_ppi(fbi);
- bfin_t350mcqb_init_timers();
-
- /* start dma */
- enable_dma(CH_PPI);
- bfin_t350mcqb_enable_ppi();
- bfin_t350mcqb_start_timers();
- }
-
- return 0;
-}
-#else
-#define bfin_t350mcqb_suspend NULL
-#define bfin_t350mcqb_resume NULL
-#endif
-
-static struct platform_driver bfin_t350mcqb_driver = {
- .probe = bfin_t350mcqb_probe,
- .remove = bfin_t350mcqb_remove,
- .suspend = bfin_t350mcqb_suspend,
- .resume = bfin_t350mcqb_resume,
- .driver = {
- .name = DRIVER_NAME,
- },
-};
-module_platform_driver(bfin_t350mcqb_driver);
-
-MODULE_DESCRIPTION("Blackfin TFT LCD Driver");
-MODULE_LICENSE("GPL");
diff --git a/drivers/video/fbdev/bfin_adv7393fb.c b/drivers/video/fbdev/bfin_adv7393fb.c
deleted file mode 100644
index 542ffaddc6ab..000000000000
--- a/drivers/video/fbdev/bfin_adv7393fb.c
+++ /dev/null
@@ -1,828 +0,0 @@
-/*
- * Frame buffer driver for ADV7393/2 video encoder
- *
- * Copyright 2006-2009 Analog Devices Inc.
- * Licensed under the GPL-2 or late.
- */
-
-/*
- * TODO: Remove Globals
- * TODO: Code Cleanup
- */
-
-#define DRIVER_NAME "bfin-adv7393"
-
-#define pr_fmt(fmt) DRIVER_NAME ": " fmt
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/tty.h>
-#include <linux/slab.h>
-#include <linux/delay.h>
-#include <linux/fb.h>
-#include <linux/ioport.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/sched.h>
-#include <asm/blackfin.h>
-#include <asm/irq.h>
-#include <asm/dma.h>
-#include <linux/uaccess.h>
-#include <linux/gpio.h>
-#include <asm/portmux.h>
-
-#include <linux/dma-mapping.h>
-#include <linux/proc_fs.h>
-#include <linux/platform_device.h>
-#include <linux/i2c.h>
-
-#include "bfin_adv7393fb.h"
-
-static int mode = VMODE;
-static int mem = VMEM;
-static int nocursor = 1;
-
-static const unsigned short ppi_pins[] = {
- P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
- P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3,
- P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7,
- P_PPI0_D8, P_PPI0_D9, P_PPI0_D10, P_PPI0_D11,
- P_PPI0_D12, P_PPI0_D13, P_PPI0_D14, P_PPI0_D15,
- 0
-};
-
-/*
- * card parameters
- */
-
-static struct bfin_adv7393_fb_par {
- /* structure holding blackfin / adv7393 parameters when
- screen is blanked */
- struct {
- u8 Mode; /* ntsc/pal/? */
- } vga_state;
- atomic_t ref_count;
-} bfin_par;
-
-/* --------------------------------------------------------------------- */
-
-static struct fb_var_screeninfo bfin_adv7393_fb_defined = {
- .xres = 720,
- .yres = 480,
- .xres_virtual = 720,
- .yres_virtual = 480,
- .bits_per_pixel = 16,
- .activate = FB_ACTIVATE_TEST,
- .height = -1,
- .width = -1,
- .left_margin = 0,
- .right_margin = 0,
- .upper_margin = 0,
- .lower_margin = 0,
- .vmode = FB_VMODE_INTERLACED,
- .red = {11, 5, 0},
- .green = {5, 6, 0},
- .blue = {0, 5, 0},
- .transp = {0, 0, 0},
-};
-
-static struct fb_fix_screeninfo bfin_adv7393_fb_fix = {
- .id = "BFIN ADV7393",
- .smem_len = 720 * 480 * 2,
- .type = FB_TYPE_PACKED_PIXELS,
- .visual = FB_VISUAL_TRUECOLOR,
- .xpanstep = 0,
- .ypanstep = 0,
- .line_length = 720 * 2,
- .accel = FB_ACCEL_NONE
-};
-
-static struct fb_ops bfin_adv7393_fb_ops = {
- .owner = THIS_MODULE,
- .fb_open = bfin_adv7393_fb_open,
- .fb_release = bfin_adv7393_fb_release,
- .fb_check_var = bfin_adv7393_fb_check_var,
- .fb_pan_display = bfin_adv7393_fb_pan_display,
- .fb_blank = bfin_adv7393_fb_blank,
- .fb_fillrect = cfb_fillrect,
- .fb_copyarea = cfb_copyarea,
- .fb_imageblit = cfb_imageblit,
- .fb_cursor = bfin_adv7393_fb_cursor,
- .fb_setcolreg = bfin_adv7393_fb_setcolreg,
-};
-
-static int dma_desc_list(struct adv7393fb_device *fbdev, u16 arg)
-{
- if (arg == BUILD) { /* Build */
- fbdev->vb1 = l1_data_sram_zalloc(sizeof(struct dmasg));
- if (fbdev->vb1 == NULL)
- goto error;
-
- fbdev->av1 = l1_data_sram_zalloc(sizeof(struct dmasg));
- if (fbdev->av1 == NULL)
- goto error;
-
- fbdev->vb2 = l1_data_sram_zalloc(sizeof(struct dmasg));
- if (fbdev->vb2 == NULL)
- goto error;
-
- fbdev->av2 = l1_data_sram_zalloc(sizeof(struct dmasg));
- if (fbdev->av2 == NULL)
- goto error;
-
- /* Build linked DMA descriptor list */
- fbdev->vb1->next_desc_addr = fbdev->av1;
- fbdev->av1->next_desc_addr = fbdev->vb2;
- fbdev->vb2->next_desc_addr = fbdev->av2;
- fbdev->av2->next_desc_addr = fbdev->vb1;
-
- /* Save list head */
- fbdev->descriptor_list_head = fbdev->av2;
-
- /* Vertical Blanking Field 1 */
- fbdev->vb1->start_addr = VB_DUMMY_MEMORY_SOURCE;
- fbdev->vb1->cfg = DMA_CFG_VAL;
-
- fbdev->vb1->x_count =
- fbdev->modes[mode].xres + fbdev->modes[mode].boeft_blank;
-
- fbdev->vb1->x_modify = 0;
- fbdev->vb1->y_count = fbdev->modes[mode].vb1_lines;
- fbdev->vb1->y_modify = 0;
-
- /* Active Video Field 1 */
-
- fbdev->av1->start_addr = (unsigned long)fbdev->fb_mem;
- fbdev->av1->cfg = DMA_CFG_VAL;
- fbdev->av1->x_count =
- fbdev->modes[mode].xres + fbdev->modes[mode].boeft_blank;
- fbdev->av1->x_modify = fbdev->modes[mode].bpp / 8;
- fbdev->av1->y_count = fbdev->modes[mode].a_lines;
- fbdev->av1->y_modify =
- (fbdev->modes[mode].xres - fbdev->modes[mode].boeft_blank +
- 1) * (fbdev->modes[mode].bpp / 8);
-
- /* Vertical Blanking Field 2 */
-
- fbdev->vb2->start_addr = VB_DUMMY_MEMORY_SOURCE;
- fbdev->vb2->cfg = DMA_CFG_VAL;
- fbdev->vb2->x_count =
- fbdev->modes[mode].xres + fbdev->modes[mode].boeft_blank;
-
- fbdev->vb2->x_modify = 0;
- fbdev->vb2->y_count = fbdev->modes[mode].vb2_lines;
- fbdev->vb2->y_modify = 0;
-
- /* Active Video Field 2 */
-
- fbdev->av2->start_addr =
- (unsigned long)fbdev->fb_mem + fbdev->line_len;
-
- fbdev->av2->cfg = DMA_CFG_VAL;
-
- fbdev->av2->x_count =
- fbdev->modes[mode].xres + fbdev->modes[mode].boeft_blank;
-
- fbdev->av2->x_modify = (fbdev->modes[mode].bpp / 8);
- fbdev->av2->y_count = fbdev->modes[mode].a_lines;
-
- fbdev->av2->y_modify =
- (fbdev->modes[mode].xres - fbdev->modes[mode].boeft_blank +
- 1) * (fbdev->modes[mode].bpp / 8);
-
- return 1;
- }
-
-error:
- l1_data_sram_free(fbdev->vb1);
- l1_data_sram_free(fbdev->av1);
- l1_data_sram_free(fbdev->vb2);
- l1_data_sram_free(fbdev->av2);
-
- return 0;
-}
-
-static int bfin_config_dma(struct adv7393fb_device *fbdev)
-{
- BUG_ON(!(fbdev->fb_mem));
-
- set_dma_x_count(CH_PPI, fbdev->descriptor_list_head->x_count);
- set_dma_x_modify(CH_PPI, fbdev->descriptor_list_head->x_modify);
- set_dma_y_count(CH_PPI, fbdev->descriptor_list_head->y_count);
- set_dma_y_modify(CH_PPI, fbdev->descriptor_list_head->y_modify);
- set_dma_start_addr(CH_PPI, fbdev->descriptor_list_head->start_addr);
- set_dma_next_desc_addr(CH_PPI,
- fbdev->descriptor_list_head->next_desc_addr);
- set_dma_config(CH_PPI, fbdev->descriptor_list_head->cfg);
-
- return 1;
-}
-
-static void bfin_disable_dma(void)
-{
- bfin_write_DMA0_CONFIG(bfin_read_DMA0_CONFIG() & ~DMAEN);
-}
-
-static void bfin_config_ppi(struct adv7393fb_device *fbdev)
-{
- if (ANOMALY_05000183) {
- bfin_write_TIMER2_CONFIG(WDTH_CAP);
- bfin_write_TIMER_ENABLE(TIMEN2);
- }
-
- bfin_write_PPI_CONTROL(0x381E);
- bfin_write_PPI_FRAME(fbdev->modes[mode].tot_lines);
- bfin_write_PPI_COUNT(fbdev->modes[mode].xres +
- fbdev->modes[mode].boeft_blank - 1);
- bfin_write_PPI_DELAY(fbdev->modes[mode].aoeft_blank - 1);
-}
-
-static void bfin_enable_ppi(void)
-{
- bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() | PORT_EN);
-}
-
-static void bfin_disable_ppi(void)
-{
- bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() & ~PORT_EN);
-}
-
-static inline int adv7393_write(struct i2c_client *client, u8 reg, u8 value)
-{
- return i2c_smbus_write_byte_data(client, reg, value);
-}
-
-static inline int adv7393_read(struct i2c_client *client, u8 reg)
-{
- return i2c_smbus_read_byte_data(client, reg);
-}
-
-static int
-adv7393_write_block(struct i2c_client *client,
- const u8 *data, unsigned int len)
-{
- int ret = -1;
- u8 reg;
-
- while (len >= 2) {
- reg = *data++;
- ret = adv7393_write(client, reg, *data++);
- if (ret < 0)
- break;
- len -= 2;
- }
-
- return ret;
-}
-
-static int adv7393_mode(struct i2c_client *client, u16 mode)
-{
- switch (mode) {
- case POWER_ON: /* ADV7393 Sleep mode OFF */
- adv7393_write(client, 0x00, 0x1E);
- break;
- case POWER_DOWN: /* ADV7393 Sleep mode ON */
- adv7393_write(client, 0x00, 0x1F);
- break;
- case BLANK_OFF: /* Pixel Data Valid */
- adv7393_write(client, 0x82, 0xCB);
- break;
- case BLANK_ON: /* Pixel Data Invalid */
- adv7393_write(client, 0x82, 0x8B);
- break;
- default:
- return -EINVAL;
- break;
- }
- return 0;
-}
-
-static irqreturn_t ppi_irq_error(int irq, void *dev_id)
-{
-
- struct adv7393fb_device *fbdev = (struct adv7393fb_device *)dev_id;
-
- u16 status = bfin_read_PPI_STATUS();
-
- pr_debug("%s: PPI Status = 0x%X\n", __func__, status);
-
- if (status) {
- bfin_disable_dma(); /* TODO: Check Sequence */
- bfin_disable_ppi();
- bfin_clear_PPI_STATUS();
- bfin_config_dma(fbdev);
- bfin_enable_ppi();
- }
-
- return IRQ_HANDLED;
-
-}
-
-static int proc_output(char *buf)
-{
- char *p = buf;
-
- p += sprintf(p,
- "Usage:\n"
- "echo 0x[REG][Value] > adv7393\n"
- "example: echo 0x1234 >adv7393\n"
- "writes 0x34 into Register 0x12\n");
-
- return p - buf;
-}
-
-static ssize_t
-adv7393_read_proc(struct file *file, char __user *buf,
- size_t size, loff_t *ppos)
-{
- static const char message[] = "Usage:\n"
- "echo 0x[REG][Value] > adv7393\n"
- "example: echo 0x1234 >adv7393\n"
- "writes 0x34 into Register 0x12\n";
- return simple_read_from_buffer(buf, size, ppos, message,
- sizeof(message));
-}
-
-static ssize_t
-adv7393_write_proc(struct file *file, const char __user * buffer,
- size_t count, loff_t *ppos)
-{
- struct adv7393fb_device *fbdev = PDE_DATA(file_inode(file));
- unsigned int val;
- int ret;
-
- ret = kstrtouint_from_user(buffer, count, 0, &val);
- if (ret)
- return -EFAULT;
-
- adv7393_write(fbdev->client, val >> 8, val & 0xff);
-
- return count;
-}
-
-static const struct file_operations fops = {
- .read = adv7393_read_proc,
- .write = adv7393_write_proc,
- .llseek = default_llseek,
-};
-
-static int bfin_adv7393_fb_probe(struct i2c_client *client,
- const struct i2c_device_id *id)
-{
- int ret = 0;
- struct proc_dir_entry *entry;
-
- struct adv7393fb_device *fbdev = NULL;
-
- if (mem > 2) {
- dev_err(&client->dev, "mem out of allowed range [1;2]\n");
- return -EINVAL;
- }
-
- if (mode >= ARRAY_SIZE(known_modes)) {
- dev_err(&client->dev, "mode %d: not supported", mode);
- return -EFAULT;
- }
-
- fbdev = kzalloc(sizeof(*fbdev), GFP_KERNEL);
- if (!fbdev) {
- dev_err(&client->dev, "failed to allocate device private record");
- return -ENOMEM;
- }
-
- i2c_set_clientdata(client, fbdev);
-
- fbdev->modes = known_modes;
- fbdev->client = client;
-
- fbdev->fb_len =
- mem * fbdev->modes[mode].xres * fbdev->modes[mode].xres *
- (fbdev->modes[mode].bpp / 8);
-
- fbdev->line_len =
- fbdev->modes[mode].xres * (fbdev->modes[mode].bpp / 8);
-
- /* Workaround "PPI Does Not Start Properly In Specific Mode" */
- if (ANOMALY_05000400) {
- ret = gpio_request_one(P_IDENT(P_PPI0_FS3), GPIOF_OUT_INIT_LOW,
- "PPI0_FS3");
- if (ret) {
- dev_err(&client->dev, "PPI0_FS3 GPIO request failed\n");
- ret = -EBUSY;
- goto free_fbdev;
- }
- }
-
- if (peripheral_request_list(ppi_pins, DRIVER_NAME)) {
- dev_err(&client->dev, "requesting PPI peripheral failed\n");
- ret = -EFAULT;
- goto free_gpio;
- }
-
- fbdev->fb_mem =
- dma_alloc_coherent(NULL, fbdev->fb_len, &fbdev->dma_handle,
- GFP_KERNEL);
-
- if (NULL == fbdev->fb_mem) {
- dev_err(&client->dev, "couldn't allocate dma buffer (%d bytes)\n",
- (u32) fbdev->fb_len);
- ret = -ENOMEM;
- goto free_ppi_pins;
- }
-
- fbdev->info.screen_base = (void *)fbdev->fb_mem;
- bfin_adv7393_fb_fix.smem_start = (int)fbdev->fb_mem;
-
- bfin_adv7393_fb_fix.smem_len = fbdev->fb_len;
- bfin_adv7393_fb_fix.line_length = fbdev->line_len;
-
- if (mem > 1)
- bfin_adv7393_fb_fix.ypanstep = 1;
-
- bfin_adv7393_fb_defined.red.length = 5;
- bfin_adv7393_fb_defined.green.length = 6;
- bfin_adv7393_fb_defined.blue.length = 5;
-
- bfin_adv7393_fb_defined.xres = fbdev->modes[mode].xres;
- bfin_adv7393_fb_defined.yres = fbdev->modes[mode].yres;
- bfin_adv7393_fb_defined.xres_virtual = fbdev->modes[mode].xres;
- bfin_adv7393_fb_defined.yres_virtual = mem * fbdev->modes[mode].yres;
- bfin_adv7393_fb_defined.bits_per_pixel = fbdev->modes[mode].bpp;
-
- fbdev->info.fbops = &bfin_adv7393_fb_ops;
- fbdev->info.var = bfin_adv7393_fb_defined;
- fbdev->info.fix = bfin_adv7393_fb_fix;
- fbdev->info.par = &bfin_par;
- fbdev->info.flags = FBINFO_DEFAULT;
-
- fbdev->info.pseudo_palette = kzalloc(sizeof(u32) * 16, GFP_KERNEL);
- if (!fbdev->info.pseudo_palette) {
- dev_err(&client->dev, "failed to allocate pseudo_palette\n");
- ret = -ENOMEM;
- goto free_fb_mem;
- }
-
- if (fb_alloc_cmap(&fbdev->info.cmap, BFIN_LCD_NBR_PALETTE_ENTRIES, 0) < 0) {
- dev_err(&client->dev, "failed to allocate colormap (%d entries)\n",
- BFIN_LCD_NBR_PALETTE_ENTRIES);
- ret = -EFAULT;
- goto free_palette;
- }
-
- if (request_dma(CH_PPI, "BF5xx_PPI_DMA") < 0) {
- dev_err(&client->dev, "unable to request PPI DMA\n");
- ret = -EFAULT;
- goto free_cmap;
- }
-
- if (request_irq(IRQ_PPI_ERROR, ppi_irq_error, 0,
- "PPI ERROR", fbdev) < 0) {
- dev_err(&client->dev, "unable to request PPI ERROR IRQ\n");
- ret = -EFAULT;
- goto free_ch_ppi;
- }
-
- fbdev->open = 0;
-
- ret = adv7393_write_block(client, fbdev->modes[mode].adv7393_i2c_initd,
- fbdev->modes[mode].adv7393_i2c_initd_len);
-
- if (ret) {
- dev_err(&client->dev, "i2c attach: init error\n");
- goto free_irq_ppi;
- }
-
-
- if (register_framebuffer(&fbdev->info) < 0) {
- dev_err(&client->dev, "unable to register framebuffer\n");
- ret = -EFAULT;
- goto free_irq_ppi;
- }
-
- dev_info(&client->dev, "fb%d: %s frame buffer device\n",
- fbdev->info.node, fbdev->info.fix.id);
- dev_info(&client->dev, "fb memory address : 0x%p\n", fbdev->fb_mem);
-
- entry = proc_create_data("driver/adv7393", 0, NULL, &fops, fbdev);
- if (!entry) {
- dev_err(&client->dev, "unable to create /proc entry\n");
- ret = -EFAULT;
- goto free_fb;
- }
- return 0;
-
-free_fb:
- unregister_framebuffer(&fbdev->info);
-free_irq_ppi:
- free_irq(IRQ_PPI_ERROR, fbdev);
-free_ch_ppi:
- free_dma(CH_PPI);
-free_cmap:
- fb_dealloc_cmap(&fbdev->info.cmap);
-free_palette:
- kfree(fbdev->info.pseudo_palette);
-free_fb_mem:
- dma_free_coherent(NULL, fbdev->fb_len, fbdev->fb_mem,
- fbdev->dma_handle);
-free_ppi_pins:
- peripheral_free_list(ppi_pins);
-free_gpio:
- if (ANOMALY_05000400)
- gpio_free(P_IDENT(P_PPI0_FS3));
-free_fbdev:
- kfree(fbdev);
-
- return ret;
-}
-
-static int bfin_adv7393_fb_open(struct fb_info *info, int user)
-{
- struct adv7393fb_device *fbdev = to_adv7393fb_device(info);
-
- fbdev->info.screen_base = (void *)fbdev->fb_mem;
- if (!fbdev->info.screen_base) {
- dev_err(&fbdev->client->dev, "unable to map device\n");
- return -ENOMEM;
- }
-
- fbdev->open = 1;
- dma_desc_list(fbdev, BUILD);
- adv7393_mode(fbdev->client, BLANK_OFF);
- bfin_config_ppi(fbdev);
- bfin_config_dma(fbdev);
- bfin_enable_ppi();
-
- return 0;
-}
-
-static int bfin_adv7393_fb_release(struct fb_info *info, int user)
-{
- struct adv7393fb_device *fbdev = to_adv7393fb_device(info);
-
- adv7393_mode(fbdev->client, BLANK_ON);
- bfin_disable_dma();
- bfin_disable_ppi();
- dma_desc_list(fbdev, DESTRUCT);
- fbdev->open = 0;
- return 0;
-}
-
-static int
-bfin_adv7393_fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
-{
-
- switch (var->bits_per_pixel) {
- case 16:/* DIRECTCOLOUR, 64k */
- var->red.offset = info->var.red.offset;
- var->green.offset = info->var.green.offset;
- var->blue.offset = info->var.blue.offset;
- var->red.length = info->var.red.length;
- var->green.length = info->var.green.length;
- var->blue.length = info->var.blue.length;
- var->transp.offset = 0;
- var->transp.length = 0;
- var->transp.msb_right = 0;
- var->red.msb_right = 0;
- var->green.msb_right = 0;
- var->blue.msb_right = 0;
- break;
- default:
- pr_debug("%s: depth not supported: %u BPP\n", __func__,
- var->bits_per_pixel);
- return -EINVAL;
- }
-
- if (info->var.xres != var->xres ||
- info->var.yres != var->yres ||
- info->var.xres_virtual != var->xres_virtual ||
- info->var.yres_virtual != var->yres_virtual) {
- pr_debug("%s: Resolution not supported: X%u x Y%u\n",
- __func__, var->xres, var->yres);
- return -EINVAL;
- }
-
- /*
- * Memory limit
- */
-
- if ((info->fix.line_length * var->yres_virtual) > info->fix.smem_len) {
- pr_debug("%s: Memory Limit requested yres_virtual = %u\n",
- __func__, var->yres_virtual);
- return -ENOMEM;
- }
-
- return 0;
-}
-
-static int
-bfin_adv7393_fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
-{
- int dy;
- u32 dmaaddr;
- struct adv7393fb_device *fbdev = to_adv7393fb_device(info);
-
- if (!var || !info)
- return -EINVAL;
-
- if (var->xoffset - info->var.xoffset) {
- /* No support for X panning for now! */
- return -EINVAL;
- }
- dy = var->yoffset - info->var.yoffset;
-
- if (dy) {
- pr_debug("%s: Panning screen of %d lines\n", __func__, dy);
-
- dmaaddr = fbdev->av1->start_addr;
- dmaaddr += (info->fix.line_length * dy);
- /* TODO: Wait for current frame to finished */
-
- fbdev->av1->start_addr = (unsigned long)dmaaddr;
- fbdev->av2->start_addr = (unsigned long)dmaaddr + fbdev->line_len;
- }
-
- return 0;
-
-}
-
-/* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
-static int bfin_adv7393_fb_blank(int blank, struct fb_info *info)
-{
- struct adv7393fb_device *fbdev = to_adv7393fb_device(info);
-
- switch (blank) {
-
- case VESA_NO_BLANKING:
- /* Turn on panel */
- adv7393_mode(fbdev->client, BLANK_OFF);
- break;
-
- case VESA_VSYNC_SUSPEND:
- case VESA_HSYNC_SUSPEND:
- case VESA_POWERDOWN:
- /* Turn off panel */
- adv7393_mode(fbdev->client, BLANK_ON);
- break;
-
- default:
- return -EINVAL;
- break;
- }
- return 0;
-}
-
-int bfin_adv7393_fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
-{
- if (nocursor)
- return 0;
- else
- return -EINVAL; /* just to force soft_cursor() call */
-}
-
-static int bfin_adv7393_fb_setcolreg(u_int regno, u_int red, u_int green,
- u_int blue, u_int transp,
- struct fb_info *info)
-{
- if (regno >= BFIN_LCD_NBR_PALETTE_ENTRIES)
- return -EINVAL;
-
- if (info->var.grayscale)
- /* grayscale = 0.30*R + 0.59*G + 0.11*B */
- red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
-
- if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
- u32 value;
- /* Place color in the pseudopalette */
- if (regno > 16)
- return -EINVAL;
-
- red >>= (16 - info->var.red.length);
- green >>= (16 - info->var.green.length);
- blue >>= (16 - info->var.blue.length);
-
- value = (red << info->var.red.offset) |
- (green << info->var.green.offset)|
- (blue << info->var.blue.offset);
- value &= 0xFFFF;
-
- ((u32 *) (info->pseudo_palette))[regno] = value;
- }
-
- return 0;
-}
-
-static int bfin_adv7393_fb_remove(struct i2c_client *client)
-{
- struct adv7393fb_device *fbdev = i2c_get_clientdata(client);
-
- adv7393_mode(client, POWER_DOWN);
-
- if (fbdev->fb_mem)
- dma_free_coherent(NULL, fbdev->fb_len, fbdev->fb_mem, fbdev->dma_handle);
- free_dma(CH_PPI);
- free_irq(IRQ_PPI_ERROR, fbdev);
- unregister_framebuffer(&fbdev->info);
- remove_proc_entry("driver/adv7393", NULL);
- fb_dealloc_cmap(&fbdev->info.cmap);
- kfree(fbdev->info.pseudo_palette);
-
- if (ANOMALY_05000400)
- gpio_free(P_IDENT(P_PPI0_FS3)); /* FS3 */
- peripheral_free_list(ppi_pins);
- kfree(fbdev);
-
- return 0;
-}
-
-#ifdef CONFIG_PM
-static int bfin_adv7393_fb_suspend(struct device *dev)
-{
- struct adv7393fb_device *fbdev = dev_get_drvdata(dev);
-
- if (fbdev->open) {
- bfin_disable_dma();
- bfin_disable_ppi();
- dma_desc_list(fbdev, DESTRUCT);
- }
- adv7393_mode(fbdev->client, POWER_DOWN);
-
- return 0;
-}
-
-static int bfin_adv7393_fb_resume(struct device *dev)
-{
- struct adv7393fb_device *fbdev = dev_get_drvdata(dev);
-
- adv7393_mode(fbdev->client, POWER_ON);
-
- if (fbdev->open) {
- dma_desc_list(fbdev, BUILD);
- bfin_config_ppi(fbdev);
- bfin_config_dma(fbdev);
- bfin_enable_ppi();
- }
-
- return 0;
-}
-
-static const struct dev_pm_ops bfin_adv7393_dev_pm_ops = {
- .suspend = bfin_adv7393_fb_suspend,
- .resume = bfin_adv7393_fb_resume,
-};
-#endif
-
-static const struct i2c_device_id bfin_adv7393_id[] = {
- {DRIVER_NAME, 0},
- {}
-};
-
-MODULE_DEVICE_TABLE(i2c, bfin_adv7393_id);
-
-static struct i2c_driver bfin_adv7393_fb_driver = {
- .driver = {
- .name = DRIVER_NAME,
-#ifdef CONFIG_PM
- .pm = &bfin_adv7393_dev_pm_ops,
-#endif
- },
- .probe = bfin_adv7393_fb_probe,
- .remove = bfin_adv7393_fb_remove,
- .id_table = bfin_adv7393_id,
-};
-
-static int __init bfin_adv7393_fb_driver_init(void)
-{
-#if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
- request_module("i2c-bfin-twi");
-#else
- request_module("i2c-gpio");
-#endif
-
- return i2c_add_driver(&bfin_adv7393_fb_driver);
-}
-module_init(bfin_adv7393_fb_driver_init);
-
-static void __exit bfin_adv7393_fb_driver_cleanup(void)
-{
- i2c_del_driver(&bfin_adv7393_fb_driver);
-}
-module_exit(bfin_adv7393_fb_driver_cleanup);
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
-MODULE_DESCRIPTION("Frame buffer driver for ADV7393/2 Video Encoder");
-
-module_param(mode, int, 0);
-MODULE_PARM_DESC(mode,
- "Video Mode (0=NTSC,1=PAL,2=NTSC 640x480,3=PAL 640x480,4=NTSC YCbCr input,5=PAL YCbCr input)");
-
-module_param(mem, int, 0);
-MODULE_PARM_DESC(mem,
- "Size of frame buffer memory 1=Single 2=Double Size (allows y-panning / frame stacking)");
-
-module_param(nocursor, int, 0644);
-MODULE_PARM_DESC(nocursor, "cursor enable/disable");
diff --git a/drivers/video/fbdev/bfin_adv7393fb.h b/drivers/video/fbdev/bfin_adv7393fb.h
deleted file mode 100644
index afd0380e19e1..000000000000
--- a/drivers/video/fbdev/bfin_adv7393fb.h
+++ /dev/null
@@ -1,319 +0,0 @@
-/*
- * Frame buffer driver for ADV7393/2 video encoder
- *
- * Copyright 2006-2009 Analog Devices Inc.
- * Licensed under the GPL-2 or late.
- */
-
-#ifndef __BFIN_ADV7393FB_H__
-#define __BFIN_ADV7393FB_H__
-
-#define BFIN_LCD_NBR_PALETTE_ENTRIES 256
-
-#ifdef CONFIG_NTSC
-# define VMODE 0
-#endif
-#ifdef CONFIG_PAL
-# define VMODE 1
-#endif
-#ifdef CONFIG_NTSC_640x480
-# define VMODE 2
-#endif
-#ifdef CONFIG_PAL_640x480
-# define VMODE 3
-#endif
-#ifdef CONFIG_NTSC_YCBCR
-# define VMODE 4
-#endif
-#ifdef CONFIG_PAL_YCBCR
-# define VMODE 5
-#endif
-
-#ifndef VMODE
-# define VMODE 1
-#endif
-
-#ifdef CONFIG_ADV7393_2XMEM
-# define VMEM 2
-#else
-# define VMEM 1
-#endif
-
-#if defined(CONFIG_BF537) || defined(CONFIG_BF536) || defined(CONFIG_BF534)
-# define DMA_CFG_VAL 0x7935 /* Set Sync Bit */
-# define VB_DUMMY_MEMORY_SOURCE L1_DATA_B_START
-#else
-# define DMA_CFG_VAL 0x7915
-# define VB_DUMMY_MEMORY_SOURCE BOOT_ROM_START
-#endif
-
-enum {
- DESTRUCT,
- BUILD,
-};
-
-enum {
- POWER_ON,
- POWER_DOWN,
- BLANK_ON,
- BLANK_OFF,
-};
-
-struct adv7393fb_modes {
- const s8 name[25]; /* Full name */
- u16 xres; /* Active Horizonzal Pixels */
- u16 yres; /* Active Vertical Pixels */
- u16 bpp;
- u16 vmode;
- u16 a_lines; /* Active Lines per Field */
- u16 vb1_lines; /* Vertical Blanking Field 1 Lines */
- u16 vb2_lines; /* Vertical Blanking Field 2 Lines */
- u16 tot_lines; /* Total Lines per Frame */
- u16 boeft_blank; /* Before Odd/Even Field Transition No. of Blank Pixels */
- u16 aoeft_blank; /* After Odd/Even Field Transition No. of Blank Pixels */
- const s8 *adv7393_i2c_initd;
- u16 adv7393_i2c_initd_len;
-};
-
-static const u8 init_NTSC_TESTPATTERN[] = {
- 0x00, 0x1E, /* Power up all DACs and PLL */
- 0x01, 0x00, /* SD-Only Mode */
- 0x80, 0x10, /* SSAF Luma Filter Enabled, NTSC Mode */
- 0x82, 0xCB, /* Step control on, pixel data valid, pedestal on, PrPb SSAF on, CVBS/YC output */
- 0x84, 0x40, /* SD Color Bar Test Pattern Enabled, DAC 2 = Luma, DAC 3 = Chroma */
-};
-
-static const u8 init_NTSC[] = {
- 0x00, 0x1E, /* Power up all DACs and PLL */
- 0xC3, 0x26, /* Program RGB->YCrCb Color Space conversion matrix */
- 0xC5, 0x12, /* Program RGB->YCrCb Color Space conversion matrix */
- 0xC2, 0x4A, /* Program RGB->YCrCb Color Space conversion matrix */
- 0xC6, 0x5E, /* Program RGB->YCrCb Color Space conversion matrix */
- 0xBD, 0x19, /* Program RGB->YCrCb Color Space conversion matrix */
- 0xBF, 0x42, /* Program RGB->YCrCb Color Space conversion matrix */
- 0x8C, 0x1F, /* NTSC Subcarrier Frequency */
- 0x8D, 0x7C, /* NTSC Subcarrier Frequency */
- 0x8E, 0xF0, /* NTSC Subcarrier Frequency */
- 0x8F, 0x21, /* NTSC Subcarrier Frequency */
- 0x01, 0x00, /* SD-Only Mode */
- 0x80, 0x30, /* SSAF Luma Filter Enabled, NTSC Mode */
- 0x82, 0x8B, /* Step control on, pixel data invalid, pedestal on, PrPb SSAF on, CVBS/YC output */
- 0x87, 0x80, /* SD Color Bar Test Pattern Enabled, DAC 2 = Luma, DAC 3 = Chroma */
- 0x86, 0x82,
- 0x8B, 0x11,
- 0x88, 0x20,
- 0x8A, 0x0d,
-};
-
-static const u8 init_PAL[] = {
- 0x00, 0x1E, /* Power up all DACs and PLL */
- 0xC3, 0x26, /* Program RGB->YCrCb Color Space conversion matrix */
- 0xC5, 0x12, /* Program RGB->YCrCb Color Space conversion matrix */
- 0xC2, 0x4A, /* Program RGB->YCrCb Color Space conversion matrix */
- 0xC6, 0x5E, /* Program RGB->YCrCb Color Space conversion matrix */
- 0xBD, 0x19, /* Program RGB->YCrCb Color Space conversion matrix */
- 0xBF, 0x42, /* Program RGB->YCrCb Color Space conversion matrix */
- 0x8C, 0xCB, /* PAL Subcarrier Frequency */
- 0x8D, 0x8A, /* PAL Subcarrier Frequency */
- 0x8E, 0x09, /* PAL Subcarrier Frequency */
- 0x8F, 0x2A, /* PAL Subcarrier Frequency */
- 0x01, 0x00, /* SD-Only Mode */
- 0x80, 0x11, /* SSAF Luma Filter Enabled, PAL Mode */
- 0x82, 0x8B, /* Step control on, pixel data invalid, pedestal on, PrPb SSAF on, CVBS/YC output */
- 0x87, 0x80, /* SD Color Bar Test Pattern Enabled, DAC 2 = Luma, DAC 3 = Chroma */
- 0x86, 0x82,
- 0x8B, 0x11,
- 0x88, 0x20,
- 0x8A, 0x0d,
-};
-
-static const u8 init_NTSC_YCbCr[] = {
- 0x00, 0x1E, /* Power up all DACs and PLL */
- 0x8C, 0x1F, /* NTSC Subcarrier Frequency */
- 0x8D, 0x7C, /* NTSC Subcarrier Frequency */
- 0x8E, 0xF0, /* NTSC Subcarrier Frequency */
- 0x8F, 0x21, /* NTSC Subcarrier Frequency */
- 0x01, 0x00, /* SD-Only Mode */
- 0x80, 0x30, /* SSAF Luma Filter Enabled, NTSC Mode */
- 0x82, 0x8B, /* Step control on, pixel data invalid, pedestal on, PrPb SSAF on, CVBS/YC output */
- 0x87, 0x00, /* DAC 2 = Luma, DAC 3 = Chroma */
- 0x86, 0x82,
- 0x8B, 0x11,
- 0x88, 0x08,
- 0x8A, 0x0d,
-};
-
-static const u8 init_PAL_YCbCr[] = {
- 0x00, 0x1E, /* Power up all DACs and PLL */
- 0x8C, 0xCB, /* PAL Subcarrier Frequency */
- 0x8D, 0x8A, /* PAL Subcarrier Frequency */
- 0x8E, 0x09, /* PAL Subcarrier Frequency */
- 0x8F, 0x2A, /* PAL Subcarrier Frequency */
- 0x01, 0x00, /* SD-Only Mode */
- 0x80, 0x11, /* SSAF Luma Filter Enabled, PAL Mode */
- 0x82, 0x8B, /* Step control on, pixel data invalid, pedestal on, PrPb SSAF on, CVBS/YC output */
- 0x87, 0x00, /* DAC 2 = Luma, DAC 3 = Chroma */
- 0x86, 0x82,
- 0x8B, 0x11,
- 0x88, 0x08,
- 0x8A, 0x0d,
-};
-
-static struct adv7393fb_modes known_modes[] = {
- /* NTSC 720x480 CRT */
- {
- .name = "NTSC 720x480",
- .xres = 720,
- .yres = 480,
- .bpp = 16,
- .vmode = FB_VMODE_INTERLACED,
- .a_lines = 240,
- .vb1_lines = 22,
- .vb2_lines = 23,
- .tot_lines = 525,
- .boeft_blank = 16,
- .aoeft_blank = 122,
- .adv7393_i2c_initd = init_NTSC,
- .adv7393_i2c_initd_len = sizeof(init_NTSC)
- },
- /* PAL 720x480 CRT */
- {
- .name = "PAL 720x576",
- .xres = 720,
- .yres = 576,
- .bpp = 16,
- .vmode = FB_VMODE_INTERLACED,
- .a_lines = 288,
- .vb1_lines = 24,
- .vb2_lines = 25,
- .tot_lines = 625,
- .boeft_blank = 12,
- .aoeft_blank = 132,
- .adv7393_i2c_initd = init_PAL,
- .adv7393_i2c_initd_len = sizeof(init_PAL)
- },
- /* NTSC 640x480 CRT Experimental */
- {
- .name = "NTSC 640x480",
- .xres = 640,
- .yres = 480,
- .bpp = 16,
- .vmode = FB_VMODE_INTERLACED,
- .a_lines = 240,
- .vb1_lines = 22,
- .vb2_lines = 23,
- .tot_lines = 525,
- .boeft_blank = 16 + 40,
- .aoeft_blank = 122 + 40,
- .adv7393_i2c_initd = init_NTSC,
- .adv7393_i2c_initd_len = sizeof(init_NTSC)
- },
- /* PAL 640x480 CRT Experimental */
- {
- .name = "PAL 640x480",
- .xres = 640,
- .yres = 480,
- .bpp = 16,
- .vmode = FB_VMODE_INTERLACED,
- .a_lines = 288 - 20,
- .vb1_lines = 24 + 20,
- .vb2_lines = 25 + 20,
- .tot_lines = 625,
- .boeft_blank = 12 + 40,
- .aoeft_blank = 132 + 40,
- .adv7393_i2c_initd = init_PAL,
- .adv7393_i2c_initd_len = sizeof(init_PAL)
- },
- /* NTSC 720x480 YCbCR */
- {
- .name = "NTSC 720x480 YCbCR",
- .xres = 720,
- .yres = 480,
- .bpp = 16,
- .vmode = FB_VMODE_INTERLACED,
- .a_lines = 240,
- .vb1_lines = 22,
- .vb2_lines = 23,
- .tot_lines = 525,
- .boeft_blank = 16,
- .aoeft_blank = 122,
- .adv7393_i2c_initd = init_NTSC_YCbCr,
- .adv7393_i2c_initd_len = sizeof(init_NTSC_YCbCr)
- },
- /* PAL 720x480 CRT */
- {
- .name = "PAL 720x576 YCbCR",
- .xres = 720,
- .yres = 576,
- .bpp = 16,
- .vmode = FB_VMODE_INTERLACED,
- .a_lines = 288,
- .vb1_lines = 24,
- .vb2_lines = 25,
- .tot_lines = 625,
- .boeft_blank = 12,
- .aoeft_blank = 132,
- .adv7393_i2c_initd = init_PAL_YCbCr,
- .adv7393_i2c_initd_len = sizeof(init_PAL_YCbCr)
- }
-};
-
-struct adv7393fb_regs {
-
-};
-
-struct adv7393fb_device {
- struct fb_info info; /* FB driver info record */
-
- struct i2c_client *client;
-
- struct dmasg *descriptor_list_head;
- struct dmasg *vb1;
- struct dmasg *av1;
- struct dmasg *vb2;
- struct dmasg *av2;
-
- dma_addr_t dma_handle;
-
- struct fb_info bfin_adv7393_fb;
-
- struct adv7393fb_modes *modes;
-
- struct adv7393fb_regs *regs; /* Registers memory map */
- size_t regs_len;
- size_t fb_len;
- size_t line_len;
- u16 open;
- u16 *fb_mem; /* RGB Buffer */
-
-};
-
-#define to_adv7393fb_device(_info) \
- (_info ? container_of(_info, struct adv7393fb_device, info) : NULL);
-
-static int bfin_adv7393_fb_open(struct fb_info *info, int user);
-static int bfin_adv7393_fb_release(struct fb_info *info, int user);
-static int bfin_adv7393_fb_check_var(struct fb_var_screeninfo *var,
- struct fb_info *info);
-
-static int bfin_adv7393_fb_pan_display(struct fb_var_screeninfo *var,
- struct fb_info *info);
-
-static int bfin_adv7393_fb_blank(int blank, struct fb_info *info);
-
-static void bfin_config_ppi(struct adv7393fb_device *fbdev);
-static int bfin_config_dma(struct adv7393fb_device *fbdev);
-static void bfin_disable_dma(void);
-static void bfin_enable_ppi(void);
-static void bfin_disable_ppi(void);
-
-static inline int adv7393_write(struct i2c_client *client, u8 reg, u8 value);
-static inline int adv7393_read(struct i2c_client *client, u8 reg);
-static int adv7393_write_block(struct i2c_client *client, const u8 *data,
- unsigned int len);
-
-int bfin_adv7393_fb_cursor(struct fb_info *info, struct fb_cursor *cursor);
-static int bfin_adv7393_fb_setcolreg(u_int, u_int, u_int, u_int,
- u_int, struct fb_info *info);
-
-#endif
diff --git a/drivers/video/fbdev/core/fbcon.c b/drivers/video/fbdev/core/fbcon.c
index 5baf7bc054e1..3e330e0f56ed 100644
--- a/drivers/video/fbdev/core/fbcon.c
+++ b/drivers/video/fbdev/core/fbcon.c
@@ -2595,7 +2595,8 @@ static int fbcon_copy_font(struct vc_data *vc, int con)
* is ever implemented.
*/
-static int fbcon_set_font(struct vc_data *vc, struct console_font *font, unsigned flags)
+static int fbcon_set_font(struct vc_data *vc, struct console_font *font,
+ unsigned int flags)
{
struct fb_info *info = registered_fb[con2fb_map[vc->vc_num]];
unsigned charcount = font->charcount;
diff --git a/drivers/video/fbdev/fsl-diu-fb.c b/drivers/video/fbdev/fsl-diu-fb.c
index 25abbcf38913..1bfd13cbd4e3 100644
--- a/drivers/video/fbdev/fsl-diu-fb.c
+++ b/drivers/video/fbdev/fsl-diu-fb.c
@@ -1960,12 +1960,8 @@ static int __init fsl_diu_init(void)
of_node_put(np);
coherence_data = vmalloc(coherence_data_size);
- if (!coherence_data) {
- pr_err("fsl-diu-fb: could not allocate coherence data "
- "(size=%zu)\n", coherence_data_size);
+ if (!coherence_data)
return -ENOMEM;
- }
-
#endif
ret = platform_driver_register(&fsl_diu_driver);
diff --git a/drivers/video/fbdev/matrox/matroxfb_crtc2.c b/drivers/video/fbdev/matrox/matroxfb_crtc2.c
index 02796a4317a9..f64e1d55d7a1 100644
--- a/drivers/video/fbdev/matrox/matroxfb_crtc2.c
+++ b/drivers/video/fbdev/matrox/matroxfb_crtc2.c
@@ -696,10 +696,9 @@ static void* matroxfb_crtc2_probe(struct matrox_fb_info* minfo) {
if (!minfo->devflags.crtc2)
return NULL;
m2info = kzalloc(sizeof(*m2info), GFP_KERNEL);
- if (!m2info) {
- printk(KERN_ERR "matroxfb_crtc2: Not enough memory for CRTC2 control structs\n");
+ if (!m2info)
return NULL;
- }
+
m2info->primary_dev = minfo;
if (matroxfb_dh_registerfb(m2info)) {
kfree(m2info);
diff --git a/drivers/video/fbdev/offb.c b/drivers/video/fbdev/offb.c
index 90d38de34479..77c0a2f45b3b 100644
--- a/drivers/video/fbdev/offb.c
+++ b/drivers/video/fbdev/offb.c
@@ -280,6 +280,7 @@ static void offb_destroy(struct fb_info *info)
if (info->screen_base)
iounmap(info->screen_base);
release_mem_region(info->apertures->ranges[0].base, info->apertures->ranges[0].size);
+ fb_dealloc_cmap(&info->cmap);
framebuffer_release(info);
}
@@ -518,6 +519,7 @@ static void __init offb_init_fb(const char *name,
return;
out_err:
+ fb_dealloc_cmap(&info->cmap);
iounmap(info->screen_base);
out_aper:
iounmap(par->cmap_adr);
diff --git a/drivers/video/fbdev/s1d13xxxfb.c b/drivers/video/fbdev/s1d13xxxfb.c
index 5d6179ef0298..e04efb567b5c 100644
--- a/drivers/video/fbdev/s1d13xxxfb.c
+++ b/drivers/video/fbdev/s1d13xxxfb.c
@@ -96,18 +96,12 @@ static const struct fb_fix_screeninfo s1d13xxxfb_fix = {
static inline u8
s1d13xxxfb_readreg(struct s1d13xxxfb_par *par, u16 regno)
{
-#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI3)
- regno=((regno & 1) ? (regno & ~1L) : (regno + 1));
-#endif
return readb(par->regs + regno);
}
static inline void
s1d13xxxfb_writereg(struct s1d13xxxfb_par *par, u16 regno, u8 value)
{
-#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI3)
- regno=((regno & 1) ? (regno & ~1L) : (regno + 1));
-#endif
writeb(value, par->regs + regno);
}
@@ -296,11 +290,7 @@ s1d13xxxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
dbg("s1d13xxxfb_setcolreg: pseudo %d, val %08x\n",
regno, pseudo_val);
-#if defined(CONFIG_PLAT_MAPPI)
- ((u32 *)info->pseudo_palette)[regno] = cpu_to_le16(pseudo_val);
-#else
((u32 *)info->pseudo_palette)[regno] = pseudo_val;
-#endif
break;
case FB_VISUAL_PSEUDOCOLOR:
diff --git a/drivers/video/fbdev/s3c-fb.c b/drivers/video/fbdev/s3c-fb.c
index 5f4f696c2ecf..9ec85ccd0ce9 100644
--- a/drivers/video/fbdev/s3c-fb.c
+++ b/drivers/video/fbdev/s3c-fb.c
@@ -1383,11 +1383,9 @@ static int s3c_fb_probe(struct platform_device *pdev)
return -EINVAL;
}
- sfb = devm_kzalloc(dev, sizeof(struct s3c_fb), GFP_KERNEL);
- if (!sfb) {
- dev_err(dev, "no memory for framebuffers\n");
+ sfb = devm_kzalloc(dev, sizeof(*sfb), GFP_KERNEL);
+ if (!sfb)
return -ENOMEM;
- }
dev_dbg(dev, "allocate new framebuffer %p\n", sfb);
@@ -1716,63 +1714,6 @@ static struct s3c_fb_win_variant s3c_fb_data_64xx_wins[] = {
},
};
-static struct s3c_fb_win_variant s3c_fb_data_s5p_wins[] = {
- [0] = {
- .has_osd_c = 1,
- .osd_size_off = 0x8,
- .palette_sz = 256,
- .valid_bpp = (VALID_BPP1248 | VALID_BPP(13) |
- VALID_BPP(15) | VALID_BPP(16) |
- VALID_BPP(18) | VALID_BPP(19) |
- VALID_BPP(24) | VALID_BPP(25) |
- VALID_BPP(32)),
- },
- [1] = {
- .has_osd_c = 1,
- .has_osd_d = 1,
- .osd_size_off = 0xc,
- .has_osd_alpha = 1,
- .palette_sz = 256,
- .valid_bpp = (VALID_BPP1248 | VALID_BPP(13) |
- VALID_BPP(15) | VALID_BPP(16) |
- VALID_BPP(18) | VALID_BPP(19) |
- VALID_BPP(24) | VALID_BPP(25) |
- VALID_BPP(32)),
- },
- [2] = {
- .has_osd_c = 1,
- .has_osd_d = 1,
- .osd_size_off = 0xc,
- .has_osd_alpha = 1,
- .palette_sz = 256,
- .valid_bpp = (VALID_BPP1248 | VALID_BPP(13) |
- VALID_BPP(15) | VALID_BPP(16) |
- VALID_BPP(18) | VALID_BPP(19) |
- VALID_BPP(24) | VALID_BPP(25) |
- VALID_BPP(32)),
- },
- [3] = {
- .has_osd_c = 1,
- .has_osd_alpha = 1,
- .palette_sz = 256,
- .valid_bpp = (VALID_BPP1248 | VALID_BPP(13) |
- VALID_BPP(15) | VALID_BPP(16) |
- VALID_BPP(18) | VALID_BPP(19) |
- VALID_BPP(24) | VALID_BPP(25) |
- VALID_BPP(32)),
- },
- [4] = {
- .has_osd_c = 1,
- .has_osd_alpha = 1,
- .palette_sz = 256,
- .valid_bpp = (VALID_BPP1248 | VALID_BPP(13) |
- VALID_BPP(15) | VALID_BPP(16) |
- VALID_BPP(18) | VALID_BPP(19) |
- VALID_BPP(24) | VALID_BPP(25) |
- VALID_BPP(32)),
- },
-};
-
static struct s3c_fb_driverdata s3c_fb_data_64xx = {
.variant = {
.nr_windows = 5,
@@ -1804,102 +1745,6 @@ static struct s3c_fb_driverdata s3c_fb_data_64xx = {
.win[4] = &s3c_fb_data_64xx_wins[4],
};
-static struct s3c_fb_driverdata s3c_fb_data_s5pv210 = {
- .variant = {
- .nr_windows = 5,
- .vidtcon = VIDTCON0,
- .wincon = WINCON(0),
- .winmap = WINxMAP(0),
- .keycon = WKEYCON,
- .osd = VIDOSD_BASE,
- .osd_stride = 16,
- .buf_start = VIDW_BUF_START(0),
- .buf_size = VIDW_BUF_SIZE(0),
- .buf_end = VIDW_BUF_END(0),
-
- .palette = {
- [0] = 0x2400,
- [1] = 0x2800,
- [2] = 0x2c00,
- [3] = 0x3000,
- [4] = 0x3400,
- },
-
- .has_shadowcon = 1,
- .has_blendcon = 1,
- .has_clksel = 1,
- .has_fixvclk = 1,
- },
- .win[0] = &s3c_fb_data_s5p_wins[0],
- .win[1] = &s3c_fb_data_s5p_wins[1],
- .win[2] = &s3c_fb_data_s5p_wins[2],
- .win[3] = &s3c_fb_data_s5p_wins[3],
- .win[4] = &s3c_fb_data_s5p_wins[4],
-};
-
-static struct s3c_fb_driverdata s3c_fb_data_exynos4 = {
- .variant = {
- .nr_windows = 5,
- .vidtcon = VIDTCON0,
- .wincon = WINCON(0),
- .winmap = WINxMAP(0),
- .keycon = WKEYCON,
- .osd = VIDOSD_BASE,
- .osd_stride = 16,
- .buf_start = VIDW_BUF_START(0),
- .buf_size = VIDW_BUF_SIZE(0),
- .buf_end = VIDW_BUF_END(0),
-
- .palette = {
- [0] = 0x2400,
- [1] = 0x2800,
- [2] = 0x2c00,
- [3] = 0x3000,
- [4] = 0x3400,
- },
-
- .has_shadowcon = 1,
- .has_blendcon = 1,
- .has_fixvclk = 1,
- },
- .win[0] = &s3c_fb_data_s5p_wins[0],
- .win[1] = &s3c_fb_data_s5p_wins[1],
- .win[2] = &s3c_fb_data_s5p_wins[2],
- .win[3] = &s3c_fb_data_s5p_wins[3],
- .win[4] = &s3c_fb_data_s5p_wins[4],
-};
-
-static struct s3c_fb_driverdata s3c_fb_data_exynos5 = {
- .variant = {
- .nr_windows = 5,
- .vidtcon = FIMD_V8_VIDTCON0,
- .wincon = WINCON(0),
- .winmap = WINxMAP(0),
- .keycon = WKEYCON,
- .osd = VIDOSD_BASE,
- .osd_stride = 16,
- .buf_start = VIDW_BUF_START(0),
- .buf_size = VIDW_BUF_SIZE(0),
- .buf_end = VIDW_BUF_END(0),
-
- .palette = {
- [0] = 0x2400,
- [1] = 0x2800,
- [2] = 0x2c00,
- [3] = 0x3000,
- [4] = 0x3400,
- },
- .has_shadowcon = 1,
- .has_blendcon = 1,
- .has_fixvclk = 1,
- },
- .win[0] = &s3c_fb_data_s5p_wins[0],
- .win[1] = &s3c_fb_data_s5p_wins[1],
- .win[2] = &s3c_fb_data_s5p_wins[2],
- .win[3] = &s3c_fb_data_s5p_wins[3],
- .win[4] = &s3c_fb_data_s5p_wins[4],
-};
-
/* S3C2443/S3C2416 style hardware */
static struct s3c_fb_driverdata s3c_fb_data_s3c2443 = {
.variant = {
@@ -1942,15 +1787,6 @@ static const struct platform_device_id s3c_fb_driver_ids[] = {
.name = "s3c-fb",
.driver_data = (unsigned long)&s3c_fb_data_64xx,
}, {
- .name = "s5pv210-fb",
- .driver_data = (unsigned long)&s3c_fb_data_s5pv210,
- }, {
- .name = "exynos4-fb",
- .driver_data = (unsigned long)&s3c_fb_data_exynos4,
- }, {
- .name = "exynos5-fb",
- .driver_data = (unsigned long)&s3c_fb_data_exynos5,
- }, {
.name = "s3c2443-fb",
.driver_data = (unsigned long)&s3c_fb_data_s3c2443,
},
diff --git a/drivers/video/fbdev/sis/init.h b/drivers/video/fbdev/sis/init.h
index 85d6738b6c64..400b0e5681b2 100644
--- a/drivers/video/fbdev/sis/init.h
+++ b/drivers/video/fbdev/sis/init.h
@@ -1461,81 +1461,5 @@ static const struct SiS_LVDSCRT1Data SiS_LVDSCRT1640x480_1_H[] =
0x00}}
};
-bool SiSInitPtr(struct SiS_Private *SiS_Pr);
-unsigned short SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay,
- int VDisplay, int Depth, bool FSTN,
- unsigned short CustomT, int LCDwith, int LCDheight,
- unsigned int VBFlags2);
-unsigned short SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay,
- int VDisplay, int Depth, unsigned int VBFlags2);
-unsigned short SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay,
- int VDisplay, int Depth, unsigned int VBFlags2);
-
-void SiS_DisplayOn(struct SiS_Private *SiS_Pr);
-void SiS_DisplayOff(struct SiS_Private *SiS_Pr);
-void SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr);
-void SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable);
-void SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable);
-unsigned short SiS_GetModeFlag(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
- unsigned short ModeIdIndex);
-bool SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr);
-
-bool SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo,
- unsigned short *ModeIdIndex);
-unsigned short SiS_GetModePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
- unsigned short ModeIdIndex);
-unsigned short SiS_GetRefCRTVCLK(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide);
-unsigned short SiS_GetRefCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide);
-unsigned short SiS_GetColorDepth(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
- unsigned short ModeIdIndex);
-unsigned short SiS_GetOffset(struct SiS_Private *SiS_Pr,unsigned short ModeNo,
- unsigned short ModeIdIndex, unsigned short RRTI);
-#ifdef CONFIG_FB_SIS_300
-void SiS_GetFIFOThresholdIndex300(struct SiS_Private *SiS_Pr, unsigned short *idx1,
- unsigned short *idx2);
-unsigned short SiS_GetFIFOThresholdB300(unsigned short idx1, unsigned short idx2);
-unsigned short SiS_GetLatencyFactor630(struct SiS_Private *SiS_Pr, unsigned short index);
-#endif
-void SiS_LoadDAC(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex);
-bool SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo);
-void SiS_CalcCRRegisters(struct SiS_Private *SiS_Pr, int depth);
-void SiS_CalcLCDACRT1Timing(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
- unsigned short ModeIdIndex);
-void SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata, int xres,
- int yres, struct fb_var_screeninfo *var, bool writeres);
-
-/* From init301.c: */
-extern void SiS_GetVBInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
- unsigned short ModeIdIndex, int chkcrt2mode);
-extern void SiS_GetLCDResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
- unsigned short ModeIdIndex);
-extern void SiS_SetYPbPr(struct SiS_Private *SiS_Pr);
-extern void SiS_SetTVMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
- unsigned short ModeIdIndex);
-extern void SiS_UnLockCRT2(struct SiS_Private *SiS_Pr);
-extern void SiS_DisableBridge(struct SiS_Private *);
-extern bool SiS_SetCRT2Group(struct SiS_Private *, unsigned short);
-extern unsigned short SiS_GetRatePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
- unsigned short ModeIdIndex);
-extern void SiS_WaitRetrace1(struct SiS_Private *SiS_Pr);
-extern unsigned short SiS_GetResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
- unsigned short ModeIdIndex);
-extern unsigned short SiS_GetCH700x(struct SiS_Private *SiS_Pr, unsigned short tempax);
-extern unsigned short SiS_GetVCLK2Ptr(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
- unsigned short ModeIdIndex, unsigned short RRTI);
-extern bool SiS_IsVAMode(struct SiS_Private *);
-extern bool SiS_IsDualEdge(struct SiS_Private *);
-
-#ifdef CONFIG_FB_SIS_300
-extern unsigned int sisfb_read_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg);
-extern void sisfb_write_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg,
- unsigned int val);
-#endif
-#ifdef CONFIG_FB_SIS_315
-extern void sisfb_write_nbridge_pci_byte(struct SiS_Private *SiS_Pr, int reg,
- unsigned char val);
-extern unsigned int sisfb_read_mio_pci_word(struct SiS_Private *SiS_Pr, int reg);
-#endif
-
#endif
diff --git a/drivers/video/fbdev/sis/init301.c b/drivers/video/fbdev/sis/init301.c
index 02ee752d5000..27a2b72e50e8 100644
--- a/drivers/video/fbdev/sis/init301.c
+++ b/drivers/video/fbdev/sis/init301.c
@@ -82,6 +82,332 @@
#define SiS_I2CDELAY 1000
#define SiS_I2CDELAYSHORT 150
+static const unsigned char SiS_YPbPrTable[3][64] = {
+ {
+ 0x17,0x1d,0x03,0x09,0x05,0x06,0x0c,0x0c,
+ 0x94,0x49,0x01,0x0a,0x06,0x0d,0x04,0x0a,
+ 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x1b,
+ 0x0c,0x50,0x00,0x97,0x00,0xda,0x4a,0x17,
+ 0x7d,0x05,0x4b,0x00,0x00,0xe2,0x00,0x02,
+ 0x03,0x0a,0x65,0x9d /*0x8d*/,0x08,0x92,0x8f,0x40,
+ 0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x53 /*0x50*/,
+ 0x00,0x40,0x44,0x00,0xdb,0x02,0x3b,0x00
+ },
+ {
+ 0x33,0x06,0x06,0x09,0x0b,0x0c,0x0c,0x0c,
+ 0x98,0x0a,0x01,0x0d,0x06,0x0d,0x04,0x0a,
+ 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x3f,
+ 0x0c,0x50,0xb2,0x9f,0x16,0x59,0x4f,0x13,
+ 0xad,0x11,0xad,0x1d,0x40,0x8a,0x3d,0xb8,
+ 0x51,0x5e,0x60,0x49,0x7d,0x92,0x0f,0x40,
+ 0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x4e,
+ 0x43,0x41,0x11,0x00,0xfc,0xff,0x32,0x00
+ },
+ {
+#if 0 /* OK, but sticks to left edge */
+ 0x13,0x1d,0xe8,0x09,0x09,0xed,0x0c,0x0c,
+ 0x98,0x0a,0x01,0x0c,0x06,0x0d,0x04,0x0a,
+ 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x3f,
+ 0xed,0x50,0x70,0x9f,0x16,0x59,0x21 /*0x2b*/,0x13,
+ 0x27,0x0b,0x27,0xfc,0x30,0x27,0x1c,0xb0,
+ 0x4b,0x4b,0x65 /*0x6f*/,0x2f,0x63,0x92,0x0f,0x40,
+ 0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x27,
+ 0x00,0x40,0x11,0x00,0xfc,0xff,0x32,0x00
+#endif
+#if 1 /* Perfect */
+ 0x23,0x2d,0xe8,0x09,0x09,0xed,0x0c,0x0c,
+ 0x98,0x0a,0x01,0x0c,0x06,0x0d,0x04,0x0a,
+ 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x3f,
+ 0xed,0x50,0x70,0x9f,0x16,0x59,0x60,0x13,
+ 0x27,0x0b,0x27,0xfc,0x30,0x27,0x1c,0xb0,
+ 0x4b,0x4b,0x6f,0x2f,0x63,0x92,0x0f,0x40,
+ 0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x73,
+ 0x00,0x40,0x11,0x00,0xfc,0xff,0x32,0x00
+#endif
+ }
+};
+
+static const unsigned char SiS_TVPhase[] =
+{
+ 0x21,0xED,0xBA,0x08, /* 0x00 SiS_NTSCPhase */
+ 0x2A,0x05,0xE3,0x00, /* 0x01 SiS_PALPhase */
+ 0x21,0xE4,0x2E,0x9B, /* 0x02 SiS_PALMPhase */
+ 0x21,0xF4,0x3E,0xBA, /* 0x03 SiS_PALNPhase */
+ 0x1E,0x8B,0xA2,0xA7,
+ 0x1E,0x83,0x0A,0xE0, /* 0x05 SiS_SpecialPhaseM */
+ 0x00,0x00,0x00,0x00,
+ 0x00,0x00,0x00,0x00,
+ 0x21,0xF0,0x7B,0xD6, /* 0x08 SiS_NTSCPhase2 */
+ 0x2A,0x09,0x86,0xE9, /* 0x09 SiS_PALPhase2 */
+ 0x21,0xE6,0xEF,0xA4, /* 0x0a SiS_PALMPhase2 */
+ 0x21,0xF6,0x94,0x46, /* 0x0b SiS_PALNPhase2 */
+ 0x1E,0x8B,0xA2,0xA7,
+ 0x1E,0x83,0x0A,0xE0, /* 0x0d SiS_SpecialPhaseM */
+ 0x00,0x00,0x00,0x00,
+ 0x00,0x00,0x00,0x00,
+ 0x1e,0x8c,0x5c,0x7a, /* 0x10 SiS_SpecialPhase */
+ 0x25,0xd4,0xfd,0x5e /* 0x11 SiS_SpecialPhaseJ */
+};
+
+static const unsigned char SiS_HiTVGroup3_1[] = {
+ 0x00, 0x14, 0x15, 0x25, 0x55, 0x15, 0x0b, 0x13,
+ 0xb1, 0x41, 0x62, 0x62, 0xff, 0xf4, 0x45, 0xa6,
+ 0x25, 0x2f, 0x67, 0xf6, 0xbf, 0xff, 0x8e, 0x20,
+ 0xac, 0xda, 0x60, 0xfe, 0x6a, 0x9a, 0x06, 0x10,
+ 0xd1, 0x04, 0x18, 0x0a, 0xff, 0x80, 0x00, 0x80,
+ 0x3b, 0x77, 0x00, 0xef, 0xe0, 0x10, 0xb0, 0xe0,
+ 0x10, 0x4f, 0x0f, 0x0f, 0x05, 0x0f, 0x08, 0x6e,
+ 0x1a, 0x1f, 0x25, 0x2a, 0x4c, 0xaa, 0x01
+};
+
+static const unsigned char SiS_HiTVGroup3_2[] = {
+ 0x00, 0x14, 0x15, 0x25, 0x55, 0x15, 0x0b, 0x7a,
+ 0x54, 0x41, 0xe7, 0xe7, 0xff, 0xf4, 0x45, 0xa6,
+ 0x25, 0x2f, 0x67, 0xf6, 0xbf, 0xff, 0x8e, 0x20,
+ 0xac, 0x6a, 0x60, 0x2b, 0x52, 0xcd, 0x61, 0x10,
+ 0x51, 0x04, 0x18, 0x0a, 0x1f, 0x80, 0x00, 0x80,
+ 0xff, 0xa4, 0x04, 0x2b, 0x94, 0x21, 0x72, 0x94,
+ 0x26, 0x05, 0x01, 0x0f, 0xed, 0x0f, 0x0a, 0x64,
+ 0x18, 0x1d, 0x23, 0x28, 0x4c, 0xaa, 0x01
+};
+
+/* 301C / 302ELV extended Part2 TV registers (4 tap scaler) */
+
+static const unsigned char SiS_Part2CLVX_1[] = {
+ 0x00,0x00,
+ 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F,0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E,
+ 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E,0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C,
+ 0x7C,0x14,0x14,0x7C,0x7C,0x11,0x17,0x7C,0x7D,0x0E,0x19,0x7C,0x7E,0x0B,0x1B,0x7C,
+ 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C,0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E
+};
+
+static const unsigned char SiS_Part2CLVX_2[] = {
+ 0x00,0x00,
+ 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F,0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E,
+ 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E,0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C,
+ 0x7C,0x14,0x14,0x7C,0x7C,0x11,0x17,0x7C,0x7D,0x0E,0x19,0x7C,0x7E,0x0B,0x1B,0x7C,
+ 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C,0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E
+};
+
+static const unsigned char SiS_Part2CLVX_3[] = { /* NTSC, 525i, 525p */
+ 0xE0,0x01,
+ 0x04,0x1A,0x04,0x7E,0x03,0x1A,0x06,0x7D,0x01,0x1A,0x08,0x7D,0x00,0x19,0x0A,0x7D,
+ 0x7F,0x19,0x0C,0x7C,0x7E,0x18,0x0E,0x7C,0x7E,0x17,0x10,0x7B,0x7D,0x15,0x12,0x7C,
+ 0x7D,0x13,0x13,0x7D,0x7C,0x12,0x15,0x7D,0x7C,0x10,0x17,0x7D,0x7C,0x0E,0x18,0x7E,
+ 0x7D,0x0C,0x19,0x7E,0x7D,0x0A,0x19,0x00,0x7D,0x08,0x1A,0x01,0x7E,0x06,0x1A,0x02,
+ 0x58,0x02,
+ 0x07,0x14,0x07,0x7E,0x06,0x14,0x09,0x7D,0x05,0x14,0x0A,0x7D,0x04,0x13,0x0B,0x7E,
+ 0x03,0x13,0x0C,0x7E,0x02,0x12,0x0D,0x7F,0x01,0x12,0x0E,0x7F,0x01,0x11,0x0F,0x7F,
+ 0x00,0x10,0x10,0x00,0x7F,0x0F,0x11,0x01,0x7F,0x0E,0x12,0x01,0x7E,0x0D,0x12,0x03,
+ 0x7E,0x0C,0x13,0x03,0x7E,0x0B,0x13,0x04,0x7E,0x0A,0x14,0x04,0x7D,0x09,0x14,0x06,
+ 0x00,0x03,
+ 0x09,0x0F,0x09,0x7F,0x08,0x0F,0x09,0x00,0x07,0x0F,0x0A,0x00,0x06,0x0F,0x0A,0x01,
+ 0x06,0x0E,0x0B,0x01,0x05,0x0E,0x0B,0x02,0x04,0x0E,0x0C,0x02,0x04,0x0D,0x0C,0x03,
+ 0x03,0x0D,0x0D,0x03,0x02,0x0C,0x0D,0x05,0x02,0x0C,0x0E,0x04,0x01,0x0B,0x0E,0x06,
+ 0x01,0x0B,0x0E,0x06,0x00,0x0A,0x0F,0x07,0x00,0x0A,0x0F,0x07,0x00,0x09,0x0F,0x08,
+ 0xFF,0xFF
+};
+
+static const unsigned char SiS_Part2CLVX_4[] = { /* PAL */
+ 0x58,0x02,
+ 0x05,0x19,0x05,0x7D,0x03,0x19,0x06,0x7E,0x02,0x19,0x08,0x7D,0x01,0x18,0x0A,0x7D,
+ 0x00,0x18,0x0C,0x7C,0x7F,0x17,0x0E,0x7C,0x7E,0x16,0x0F,0x7D,0x7E,0x14,0x11,0x7D,
+ 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x14,0x7E,0x7D,0x0F,0x16,0x7E,0x7D,0x0E,0x17,0x7E,
+ 0x7D,0x0C,0x18,0x7F,0x7D,0x0A,0x18,0x01,0x7D,0x08,0x19,0x02,0x7D,0x06,0x19,0x04,
+ 0x00,0x03,
+ 0x08,0x12,0x08,0x7E,0x07,0x12,0x09,0x7E,0x06,0x12,0x0A,0x7E,0x05,0x11,0x0B,0x7F,
+ 0x04,0x11,0x0C,0x7F,0x03,0x11,0x0C,0x00,0x03,0x10,0x0D,0x00,0x02,0x0F,0x0E,0x01,
+ 0x01,0x0F,0x0F,0x01,0x01,0x0E,0x0F,0x02,0x00,0x0D,0x10,0x03,0x7F,0x0C,0x11,0x04,
+ 0x7F,0x0C,0x11,0x04,0x7F,0x0B,0x11,0x05,0x7E,0x0A,0x12,0x06,0x7E,0x09,0x12,0x07,
+ 0x40,0x02,
+ 0x04,0x1A,0x04,0x7E,0x02,0x1B,0x05,0x7E,0x01,0x1A,0x07,0x7E,0x00,0x1A,0x09,0x7D,
+ 0x7F,0x19,0x0B,0x7D,0x7E,0x18,0x0D,0x7D,0x7D,0x17,0x10,0x7C,0x7D,0x15,0x12,0x7C,
+ 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x15,0x7D,0x7C,0x10,0x17,0x7D,0x7C,0x0D,0x18,0x7F,
+ 0x7D,0x0B,0x19,0x7F,0x7D,0x09,0x1A,0x00,0x7D,0x07,0x1A,0x02,0x7E,0x05,0x1B,0x02,
+ 0xFF,0xFF
+};
+
+static const unsigned char SiS_Part2CLVX_5[] = { /* 750p */
+ 0x00,0x03,
+ 0x05,0x19,0x05,0x7D,0x03,0x19,0x06,0x7E,0x02,0x19,0x08,0x7D,0x01,0x18,0x0A,0x7D,
+ 0x00,0x18,0x0C,0x7C,0x7F,0x17,0x0E,0x7C,0x7E,0x16,0x0F,0x7D,0x7E,0x14,0x11,0x7D,
+ 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x14,0x7E,0x7D,0x0F,0x16,0x7E,0x7D,0x0E,0x17,0x7E,
+ 0x7D,0x0C,0x18,0x7F,0x7D,0x0A,0x18,0x01,0x7D,0x08,0x19,0x02,0x7D,0x06,0x19,0x04,
+ 0xFF,0xFF
+};
+
+static const unsigned char SiS_Part2CLVX_6[] = { /* 1080i */
+ 0x00,0x04,
+ 0x04,0x1A,0x04,0x7E,0x02,0x1B,0x05,0x7E,0x01,0x1A,0x07,0x7E,0x00,0x1A,0x09,0x7D,
+ 0x7F,0x19,0x0B,0x7D,0x7E,0x18,0x0D,0x7D,0x7D,0x17,0x10,0x7C,0x7D,0x15,0x12,0x7C,
+ 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x15,0x7D,0x7C,0x10,0x17,0x7D,0x7C,0x0D,0x18,0x7F,
+ 0x7D,0x0B,0x19,0x7F,0x7D,0x09,0x1A,0x00,0x7D,0x07,0x1A,0x02,0x7E,0x05,0x1B,0x02,
+ 0xFF,0xFF,
+};
+
+#ifdef CONFIG_FB_SIS_315
+/* 661 et al LCD data structure (2.03.00) */
+static const unsigned char SiS_LCDStruct661[] = {
+ /* 1024x768 */
+/* type|CR37| HDE | VDE | HT | VT | hss | hse */
+ 0x02,0xC0,0x00,0x04,0x00,0x03,0x40,0x05,0x26,0x03,0x10,0x00,0x88,
+ 0x00,0x02,0x00,0x06,0x00,0x41,0x5A,0x64,0x00,0x00,0x00,0x00,0x04,
+ /* | vss | vse |clck| clock |CRT2DataP|CRT2DataP|idx */
+ /* VESA non-VESA noscale */
+ /* 1280x1024 */
+ 0x03,0xC0,0x00,0x05,0x00,0x04,0x98,0x06,0x2A,0x04,0x30,0x00,0x70,
+ 0x00,0x01,0x00,0x03,0x00,0x6C,0xF8,0x2F,0x00,0x00,0x00,0x00,0x08,
+ /* 1400x1050 */
+ 0x09,0x20,0x78,0x05,0x1A,0x04,0x98,0x06,0x2A,0x04,0x18,0x00,0x38,
+ 0x00,0x01,0x00,0x03,0x00,0x6C,0xF8,0x2F,0x00,0x00,0x00,0x00,0x09,
+ /* 1600x1200 */
+ 0x0B,0xE0,0x40,0x06,0xB0,0x04,0x70,0x08,0xE2,0x04,0x40,0x00,0xC0,
+ 0x00,0x01,0x00,0x03,0x00,0xA2,0x70,0x24,0x00,0x00,0x00,0x00,0x0A,
+ /* 1280x768 (_2) */
+ 0x0A,0xE0,0x00,0x05,0x00,0x03,0x7C,0x06,0x26,0x03,0x30,0x00,0x70,
+ 0x00,0x03,0x00,0x06,0x00,0x4D,0xC8,0x48,0x00,0x00,0x00,0x00,0x06,
+ /* 1280x720 */
+ 0x0E,0xE0,0x00,0x05,0xD0,0x02,0x80,0x05,0x26,0x03,0x10,0x00,0x20,
+ 0x00,0x01,0x00,0x06,0x00,0x45,0x9C,0x62,0x00,0x00,0x00,0x00,0x05,
+ /* 1280x800 (_2) */
+ 0x0C,0xE0,0x00,0x05,0x20,0x03,0x10,0x06,0x2C,0x03,0x30,0x00,0x70,
+ 0x00,0x04,0x00,0x03,0x00,0x49,0xCE,0x1E,0x00,0x00,0x00,0x00,0x09,
+ /* 1680x1050 */
+ 0x0D,0xE0,0x90,0x06,0x1A,0x04,0x6C,0x07,0x2A,0x04,0x1A,0x00,0x4C,
+ 0x00,0x03,0x00,0x06,0x00,0x79,0xBE,0x44,0x00,0x00,0x00,0x00,0x06,
+ /* 1280x800_3 */
+ 0x0C,0xE0,0x00,0x05,0x20,0x03,0xAA,0x05,0x2E,0x03,0x30,0x00,0x50,
+ 0x00,0x04,0x00,0x03,0x00,0x47,0xA9,0x10,0x00,0x00,0x00,0x00,0x07,
+ /* 800x600 */
+ 0x01,0xC0,0x20,0x03,0x58,0x02,0x20,0x04,0x74,0x02,0x2A,0x00,0x80,
+ 0x00,0x06,0x00,0x04,0x00,0x28,0x63,0x4B,0x00,0x00,0x00,0x00,0x00,
+ /* 1280x854 */
+ 0x08,0xE0,0x00,0x05,0x56,0x03,0x80,0x06,0x5d,0x03,0x10,0x00,0x70,
+ 0x00,0x01,0x00,0x03,0x00,0x54,0x75,0x13,0x00,0x00,0x00,0x00,0x08
+};
+#endif
+
+#ifdef CONFIG_FB_SIS_300
+static unsigned char SiS300_TrumpionData[14][80] = {
+ { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02,
+ 0x20,0x03,0x0B,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x10,0x00,0x00,0x04,0x23,
+ 0x00,0x00,0x03,0x28,0x03,0x10,0x05,0x08,0x40,0x10,0x00,0x10,0x04,0x23,0x00,0x23,
+ 0x03,0x11,0x60,0xBC,0x01,0xFF,0x03,0xFF,0x19,0x01,0x00,0x05,0x09,0x04,0x04,0x05,
+ 0x04,0x0C,0x09,0x05,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x5A,0x01,0xBE,0x01,0x00 },
+ { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0x27,0x00,0x80,0x02,
+ 0x20,0x03,0x07,0x00,0x5E,0x01,0x0D,0x02,0x60,0x0C,0x30,0x11,0x00,0x00,0x04,0x23,
+ 0x00,0x00,0x03,0x80,0x03,0x28,0x06,0x08,0x40,0x11,0x00,0x11,0x04,0x23,0x00,0x23,
+ 0x03,0x11,0x60,0x90,0x01,0xFF,0x0F,0xF4,0x19,0x01,0x00,0x05,0x01,0x00,0x04,0x05,
+ 0x04,0x0C,0x02,0x01,0x02,0xB0,0x00,0x00,0x02,0xBA,0xEC,0x57,0x01,0xBE,0x01,0x00 },
+ { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0x8A,0x00,0xD8,0x02,
+ 0x84,0x03,0x16,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x1C,0x00,0x20,0x04,0x23,
+ 0x00,0x01,0x03,0x53,0x03,0x28,0x06,0x08,0x40,0x1C,0x00,0x16,0x04,0x23,0x00,0x23,
+ 0x03,0x11,0x60,0xD9,0x01,0xFF,0x0F,0xF4,0x18,0x07,0x05,0x05,0x13,0x04,0x04,0x05,
+ 0x01,0x0B,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x59,0x01,0xBE,0x01,0x00 },
+ { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0x72,0x00,0xD8,0x02,
+ 0x84,0x03,0x16,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x1C,0x00,0x20,0x04,0x23,
+ 0x00,0x01,0x03,0x53,0x03,0x28,0x06,0x08,0x40,0x1C,0x00,0x16,0x04,0x23,0x00,0x23,
+ 0x03,0x11,0x60,0xDA,0x01,0xFF,0x0F,0xF4,0x18,0x07,0x05,0x05,0x13,0x04,0x04,0x05,
+ 0x01,0x0B,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x55,0x01,0xBE,0x01,0x00 },
+ { 0x02,0x0A,0x02,0x00,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02,
+ 0x20,0x03,0x16,0x00,0xE0,0x01,0x0D,0x02,0x60,0x0C,0x30,0x98,0x00,0x00,0x04,0x23,
+ 0x00,0x01,0x03,0x45,0x03,0x48,0x06,0x08,0x40,0x98,0x00,0x98,0x04,0x23,0x00,0x23,
+ 0x03,0x11,0x60,0xF4,0x01,0xFF,0x0F,0xF4,0x18,0x01,0x00,0x05,0x01,0x00,0x05,0x05,
+ 0x04,0x0C,0x08,0x05,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x5B,0x01,0xBE,0x01,0x00 },
+ { 0x02,0x0A,0x02,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0xBF,0x00,0x20,0x03,
+ 0x20,0x04,0x0D,0x00,0x58,0x02,0x71,0x02,0x80,0x0C,0x30,0x9A,0x00,0xFA,0x03,0x1D,
+ 0x00,0x01,0x03,0x22,0x03,0x28,0x06,0x08,0x40,0x98,0x00,0x98,0x04,0x1D,0x00,0x1D,
+ 0x03,0x11,0x60,0x39,0x03,0x40,0x05,0xF4,0x18,0x07,0x02,0x06,0x04,0x01,0x06,0x0B,
+ 0x02,0x0A,0x20,0x19,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x5B,0x01,0xBE,0x01,0x00 },
+ { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0xEF,0x00,0x00,0x04,
+ 0x40,0x05,0x13,0x00,0x00,0x03,0x26,0x03,0x88,0x0C,0x30,0x90,0x00,0x00,0x04,0x23,
+ 0x00,0x01,0x03,0x24,0x03,0x28,0x06,0x08,0x40,0x90,0x00,0x90,0x04,0x23,0x00,0x23,
+ 0x03,0x11,0x60,0x40,0x05,0xFF,0x0F,0xF4,0x18,0x01,0x00,0x08,0x01,0x00,0x08,0x01,
+ 0x00,0x08,0x01,0x01,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x5B,0x01,0xBE,0x01,0x00 },
+ /* variant 2 */
+ { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02,
+ 0x20,0x03,0x15,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x18,0x00,0x00,0x04,0x23,
+ 0x00,0x01,0x03,0x44,0x03,0x28,0x06,0x08,0x40,0x18,0x00,0x18,0x04,0x23,0x00,0x23,
+ 0x03,0x11,0x60,0xA6,0x01,0xFF,0x03,0xFF,0x19,0x01,0x00,0x05,0x13,0x04,0x04,0x05,
+ 0x04,0x0C,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x55,0x01,0xBE,0x01,0x00 },
+ { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02,
+ 0x20,0x03,0x15,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x18,0x00,0x00,0x04,0x23,
+ 0x00,0x01,0x03,0x44,0x03,0x28,0x06,0x08,0x40,0x18,0x00,0x18,0x04,0x23,0x00,0x23,
+ 0x03,0x11,0x60,0xA6,0x01,0xFF,0x03,0xFF,0x19,0x01,0x00,0x05,0x13,0x04,0x04,0x05,
+ 0x04,0x0C,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x55,0x01,0xBE,0x01,0x00 },
+ { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x8A,0x00,0xD8,0x02,
+ 0x84,0x03,0x16,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x1C,0x00,0x20,0x04,0x23,
+ 0x00,0x01,0x03,0x53,0x03,0x28,0x06,0x08,0x40,0x1C,0x00,0x16,0x04,0x23,0x00,0x23,
+ 0x03,0x11,0x60,0xDA,0x01,0xFF,0x0F,0xF4,0x18,0x07,0x05,0x05,0x13,0x04,0x04,0x05,
+ 0x01,0x0B,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x55,0x01,0xBE,0x01,0x00 },
+ { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x72,0x00,0xD8,0x02,
+ 0x84,0x03,0x16,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x1C,0x00,0x20,0x04,0x23,
+ 0x00,0x01,0x03,0x53,0x03,0x28,0x06,0x08,0x40,0x1C,0x00,0x16,0x04,0x23,0x00,0x23,
+ 0x03,0x11,0x60,0xDA,0x01,0xFF,0x0F,0xF4,0x18,0x07,0x05,0x05,0x13,0x04,0x04,0x05,
+ 0x01,0x0B,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x55,0x01,0xBE,0x01,0x00 },
+ { 0x02,0x0A,0x02,0x00,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02,
+ 0x20,0x03,0x16,0x00,0xE0,0x01,0x0D,0x02,0x60,0x0C,0x30,0x98,0x00,0x00,0x04,0x23,
+ 0x00,0x01,0x03,0x45,0x03,0x48,0x06,0x08,0x40,0x98,0x00,0x98,0x04,0x23,0x00,0x23,
+ 0x03,0x11,0x60,0xF4,0x01,0xFF,0x0F,0xF4,0x18,0x01,0x00,0x05,0x01,0x00,0x05,0x05,
+ 0x04,0x0C,0x08,0x05,0x02,0xB0,0x00,0x00,0x02,0xBA,0xEA,0x58,0x01,0xBE,0x01,0x00 },
+ { 0x02,0x0A,0x02,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0xBF,0x00,0x20,0x03,
+ 0x20,0x04,0x0D,0x00,0x58,0x02,0x71,0x02,0x80,0x0C,0x30,0x9A,0x00,0xFA,0x03,0x1D,
+ 0x00,0x01,0x03,0x22,0x03,0x28,0x06,0x08,0x40,0x98,0x00,0x98,0x04,0x1D,0x00,0x1D,
+ 0x03,0x11,0x60,0x39,0x03,0x40,0x05,0xF4,0x18,0x07,0x02,0x06,0x04,0x01,0x06,0x0B,
+ 0x02,0x0A,0x20,0x19,0x02,0xB0,0x00,0x00,0x02,0xBA,0xEA,0x58,0x01,0xBE,0x01,0x00 },
+ { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0xEF,0x00,0x00,0x04,
+ 0x40,0x05,0x13,0x00,0x00,0x03,0x26,0x03,0x88,0x0C,0x30,0x90,0x00,0x00,0x04,0x23,
+ 0x00,0x01,0x03,0x24,0x03,0x28,0x06,0x08,0x40,0x90,0x00,0x90,0x04,0x23,0x00,0x23,
+ 0x03,0x11,0x60,0x40,0x05,0xFF,0x0F,0xF4,0x18,0x01,0x00,0x08,0x01,0x00,0x08,0x01,
+ 0x00,0x08,0x01,0x01,0x02,0xB0,0x00,0x00,0x02,0xBA,0xEA,0x58,0x01,0xBE,0x01,0x00 }
+};
+#endif
+
+#ifdef CONFIG_FB_SIS_315
+static void SiS_Chrontel701xOn(struct SiS_Private *SiS_Pr);
+static void SiS_Chrontel701xOff(struct SiS_Private *SiS_Pr);
+static void SiS_ChrontelInitTVVSync(struct SiS_Private *SiS_Pr);
+static void SiS_ChrontelDoSomething1(struct SiS_Private *SiS_Pr);
+#endif /* 315 */
+
+#ifdef CONFIG_FB_SIS_300
+static bool SiS_SetTrumpionBlock(struct SiS_Private *SiS_Pr, unsigned char *dataptr);
+#endif
+
+static unsigned short SiS_InitDDCRegs(struct SiS_Private *SiS_Pr, unsigned int VBFlags,
+ int VGAEngine, unsigned short adaptnum, unsigned short DDCdatatype,
+ bool checkcr32, unsigned int VBFlags2);
+static unsigned short SiS_ProbeDDC(struct SiS_Private *SiS_Pr);
+static unsigned short SiS_ReadDDC(struct SiS_Private *SiS_Pr, unsigned short DDCdatatype,
+ unsigned char *buffer);
+static void SiS_SetSwitchDDC2(struct SiS_Private *SiS_Pr);
+static unsigned short SiS_SetStart(struct SiS_Private *SiS_Pr);
+static unsigned short SiS_SetStop(struct SiS_Private *SiS_Pr);
+static unsigned short SiS_SetSCLKLow(struct SiS_Private *SiS_Pr);
+static unsigned short SiS_SetSCLKHigh(struct SiS_Private *SiS_Pr);
+static unsigned short SiS_ReadDDC2Data(struct SiS_Private *SiS_Pr);
+static unsigned short SiS_WriteDDC2Data(struct SiS_Private *SiS_Pr, unsigned short tempax);
+static unsigned short SiS_CheckACK(struct SiS_Private *SiS_Pr);
+static unsigned short SiS_WriteDABDDC(struct SiS_Private *SiS_Pr);
+static unsigned short SiS_PrepareReadDDC(struct SiS_Private *SiS_Pr);
+static unsigned short SiS_PrepareDDC(struct SiS_Private *SiS_Pr);
+static void SiS_SendACK(struct SiS_Private *SiS_Pr, unsigned short yesno);
+static unsigned short SiS_DoProbeDDC(struct SiS_Private *SiS_Pr);
+
+#ifdef CONFIG_FB_SIS_300
+static void SiS_OEM300Setting(struct SiS_Private *SiS_Pr,
+ unsigned short ModeNo, unsigned short ModeIdIndex, unsigned short RefTabindex);
+static void SetOEMLCDData2(struct SiS_Private *SiS_Pr,
+ unsigned short ModeNo, unsigned short ModeIdIndex,unsigned short RefTableIndex);
+#endif
+#ifdef CONFIG_FB_SIS_315
+static void SiS_OEM310Setting(struct SiS_Private *SiS_Pr,
+ unsigned short ModeNo,unsigned short ModeIdIndex, unsigned short RRTI);
+static void SiS_OEM661Setting(struct SiS_Private *SiS_Pr,
+ unsigned short ModeNo,unsigned short ModeIdIndex, unsigned short RRTI);
+static void SiS_FinalizeLCD(struct SiS_Private *, unsigned short, unsigned short);
+#endif
+
static unsigned short SiS_GetBIOSLCDResInfo(struct SiS_Private *SiS_Pr);
static void SiS_SetCH70xx(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val);
diff --git a/drivers/video/fbdev/sis/init301.h b/drivers/video/fbdev/sis/init301.h
index 2112d6d7feda..6e5cf14c4ce4 100644
--- a/drivers/video/fbdev/sis/init301.h
+++ b/drivers/video/fbdev/sis/init301.h
@@ -66,287 +66,6 @@
#include "sis.h"
#include <video/sisfb.h>
-static const unsigned char SiS_YPbPrTable[3][64] = {
- {
- 0x17,0x1d,0x03,0x09,0x05,0x06,0x0c,0x0c,
- 0x94,0x49,0x01,0x0a,0x06,0x0d,0x04,0x0a,
- 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x1b,
- 0x0c,0x50,0x00,0x97,0x00,0xda,0x4a,0x17,
- 0x7d,0x05,0x4b,0x00,0x00,0xe2,0x00,0x02,
- 0x03,0x0a,0x65,0x9d /*0x8d*/,0x08,0x92,0x8f,0x40,
- 0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x53 /*0x50*/,
- 0x00,0x40,0x44,0x00,0xdb,0x02,0x3b,0x00
- },
- {
- 0x33,0x06,0x06,0x09,0x0b,0x0c,0x0c,0x0c,
- 0x98,0x0a,0x01,0x0d,0x06,0x0d,0x04,0x0a,
- 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x3f,
- 0x0c,0x50,0xb2,0x9f,0x16,0x59,0x4f,0x13,
- 0xad,0x11,0xad,0x1d,0x40,0x8a,0x3d,0xb8,
- 0x51,0x5e,0x60,0x49,0x7d,0x92,0x0f,0x40,
- 0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x4e,
- 0x43,0x41,0x11,0x00,0xfc,0xff,0x32,0x00
- },
- {
-#if 0 /* OK, but sticks to left edge */
- 0x13,0x1d,0xe8,0x09,0x09,0xed,0x0c,0x0c,
- 0x98,0x0a,0x01,0x0c,0x06,0x0d,0x04,0x0a,
- 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x3f,
- 0xed,0x50,0x70,0x9f,0x16,0x59,0x21 /*0x2b*/,0x13,
- 0x27,0x0b,0x27,0xfc,0x30,0x27,0x1c,0xb0,
- 0x4b,0x4b,0x65 /*0x6f*/,0x2f,0x63,0x92,0x0f,0x40,
- 0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x27,
- 0x00,0x40,0x11,0x00,0xfc,0xff,0x32,0x00
-#endif
-#if 1 /* Perfect */
- 0x23,0x2d,0xe8,0x09,0x09,0xed,0x0c,0x0c,
- 0x98,0x0a,0x01,0x0c,0x06,0x0d,0x04,0x0a,
- 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x3f,
- 0xed,0x50,0x70,0x9f,0x16,0x59,0x60,0x13,
- 0x27,0x0b,0x27,0xfc,0x30,0x27,0x1c,0xb0,
- 0x4b,0x4b,0x6f,0x2f,0x63,0x92,0x0f,0x40,
- 0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x73,
- 0x00,0x40,0x11,0x00,0xfc,0xff,0x32,0x00
-#endif
- }
-};
-
-static const unsigned char SiS_TVPhase[] =
-{
- 0x21,0xED,0xBA,0x08, /* 0x00 SiS_NTSCPhase */
- 0x2A,0x05,0xE3,0x00, /* 0x01 SiS_PALPhase */
- 0x21,0xE4,0x2E,0x9B, /* 0x02 SiS_PALMPhase */
- 0x21,0xF4,0x3E,0xBA, /* 0x03 SiS_PALNPhase */
- 0x1E,0x8B,0xA2,0xA7,
- 0x1E,0x83,0x0A,0xE0, /* 0x05 SiS_SpecialPhaseM */
- 0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,
- 0x21,0xF0,0x7B,0xD6, /* 0x08 SiS_NTSCPhase2 */
- 0x2A,0x09,0x86,0xE9, /* 0x09 SiS_PALPhase2 */
- 0x21,0xE6,0xEF,0xA4, /* 0x0a SiS_PALMPhase2 */
- 0x21,0xF6,0x94,0x46, /* 0x0b SiS_PALNPhase2 */
- 0x1E,0x8B,0xA2,0xA7,
- 0x1E,0x83,0x0A,0xE0, /* 0x0d SiS_SpecialPhaseM */
- 0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,
- 0x1e,0x8c,0x5c,0x7a, /* 0x10 SiS_SpecialPhase */
- 0x25,0xd4,0xfd,0x5e /* 0x11 SiS_SpecialPhaseJ */
-};
-
-static const unsigned char SiS_HiTVGroup3_1[] = {
- 0x00, 0x14, 0x15, 0x25, 0x55, 0x15, 0x0b, 0x13,
- 0xb1, 0x41, 0x62, 0x62, 0xff, 0xf4, 0x45, 0xa6,
- 0x25, 0x2f, 0x67, 0xf6, 0xbf, 0xff, 0x8e, 0x20,
- 0xac, 0xda, 0x60, 0xfe, 0x6a, 0x9a, 0x06, 0x10,
- 0xd1, 0x04, 0x18, 0x0a, 0xff, 0x80, 0x00, 0x80,
- 0x3b, 0x77, 0x00, 0xef, 0xe0, 0x10, 0xb0, 0xe0,
- 0x10, 0x4f, 0x0f, 0x0f, 0x05, 0x0f, 0x08, 0x6e,
- 0x1a, 0x1f, 0x25, 0x2a, 0x4c, 0xaa, 0x01
-};
-
-static const unsigned char SiS_HiTVGroup3_2[] = {
- 0x00, 0x14, 0x15, 0x25, 0x55, 0x15, 0x0b, 0x7a,
- 0x54, 0x41, 0xe7, 0xe7, 0xff, 0xf4, 0x45, 0xa6,
- 0x25, 0x2f, 0x67, 0xf6, 0xbf, 0xff, 0x8e, 0x20,
- 0xac, 0x6a, 0x60, 0x2b, 0x52, 0xcd, 0x61, 0x10,
- 0x51, 0x04, 0x18, 0x0a, 0x1f, 0x80, 0x00, 0x80,
- 0xff, 0xa4, 0x04, 0x2b, 0x94, 0x21, 0x72, 0x94,
- 0x26, 0x05, 0x01, 0x0f, 0xed, 0x0f, 0x0a, 0x64,
- 0x18, 0x1d, 0x23, 0x28, 0x4c, 0xaa, 0x01
-};
-
-/* 301C / 302ELV extended Part2 TV registers (4 tap scaler) */
-
-static const unsigned char SiS_Part2CLVX_1[] = {
- 0x00,0x00,
- 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F,0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E,
- 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E,0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C,
- 0x7C,0x14,0x14,0x7C,0x7C,0x11,0x17,0x7C,0x7D,0x0E,0x19,0x7C,0x7E,0x0B,0x1B,0x7C,
- 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C,0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E
-};
-
-static const unsigned char SiS_Part2CLVX_2[] = {
- 0x00,0x00,
- 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F,0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E,
- 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E,0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C,
- 0x7C,0x14,0x14,0x7C,0x7C,0x11,0x17,0x7C,0x7D,0x0E,0x19,0x7C,0x7E,0x0B,0x1B,0x7C,
- 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C,0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E
-};
-
-static const unsigned char SiS_Part2CLVX_3[] = { /* NTSC, 525i, 525p */
- 0xE0,0x01,
- 0x04,0x1A,0x04,0x7E,0x03,0x1A,0x06,0x7D,0x01,0x1A,0x08,0x7D,0x00,0x19,0x0A,0x7D,
- 0x7F,0x19,0x0C,0x7C,0x7E,0x18,0x0E,0x7C,0x7E,0x17,0x10,0x7B,0x7D,0x15,0x12,0x7C,
- 0x7D,0x13,0x13,0x7D,0x7C,0x12,0x15,0x7D,0x7C,0x10,0x17,0x7D,0x7C,0x0E,0x18,0x7E,
- 0x7D,0x0C,0x19,0x7E,0x7D,0x0A,0x19,0x00,0x7D,0x08,0x1A,0x01,0x7E,0x06,0x1A,0x02,
- 0x58,0x02,
- 0x07,0x14,0x07,0x7E,0x06,0x14,0x09,0x7D,0x05,0x14,0x0A,0x7D,0x04,0x13,0x0B,0x7E,
- 0x03,0x13,0x0C,0x7E,0x02,0x12,0x0D,0x7F,0x01,0x12,0x0E,0x7F,0x01,0x11,0x0F,0x7F,
- 0x00,0x10,0x10,0x00,0x7F,0x0F,0x11,0x01,0x7F,0x0E,0x12,0x01,0x7E,0x0D,0x12,0x03,
- 0x7E,0x0C,0x13,0x03,0x7E,0x0B,0x13,0x04,0x7E,0x0A,0x14,0x04,0x7D,0x09,0x14,0x06,
- 0x00,0x03,
- 0x09,0x0F,0x09,0x7F,0x08,0x0F,0x09,0x00,0x07,0x0F,0x0A,0x00,0x06,0x0F,0x0A,0x01,
- 0x06,0x0E,0x0B,0x01,0x05,0x0E,0x0B,0x02,0x04,0x0E,0x0C,0x02,0x04,0x0D,0x0C,0x03,
- 0x03,0x0D,0x0D,0x03,0x02,0x0C,0x0D,0x05,0x02,0x0C,0x0E,0x04,0x01,0x0B,0x0E,0x06,
- 0x01,0x0B,0x0E,0x06,0x00,0x0A,0x0F,0x07,0x00,0x0A,0x0F,0x07,0x00,0x09,0x0F,0x08,
- 0xFF,0xFF
-};
-
-static const unsigned char SiS_Part2CLVX_4[] = { /* PAL */
- 0x58,0x02,
- 0x05,0x19,0x05,0x7D,0x03,0x19,0x06,0x7E,0x02,0x19,0x08,0x7D,0x01,0x18,0x0A,0x7D,
- 0x00,0x18,0x0C,0x7C,0x7F,0x17,0x0E,0x7C,0x7E,0x16,0x0F,0x7D,0x7E,0x14,0x11,0x7D,
- 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x14,0x7E,0x7D,0x0F,0x16,0x7E,0x7D,0x0E,0x17,0x7E,
- 0x7D,0x0C,0x18,0x7F,0x7D,0x0A,0x18,0x01,0x7D,0x08,0x19,0x02,0x7D,0x06,0x19,0x04,
- 0x00,0x03,
- 0x08,0x12,0x08,0x7E,0x07,0x12,0x09,0x7E,0x06,0x12,0x0A,0x7E,0x05,0x11,0x0B,0x7F,
- 0x04,0x11,0x0C,0x7F,0x03,0x11,0x0C,0x00,0x03,0x10,0x0D,0x00,0x02,0x0F,0x0E,0x01,
- 0x01,0x0F,0x0F,0x01,0x01,0x0E,0x0F,0x02,0x00,0x0D,0x10,0x03,0x7F,0x0C,0x11,0x04,
- 0x7F,0x0C,0x11,0x04,0x7F,0x0B,0x11,0x05,0x7E,0x0A,0x12,0x06,0x7E,0x09,0x12,0x07,
- 0x40,0x02,
- 0x04,0x1A,0x04,0x7E,0x02,0x1B,0x05,0x7E,0x01,0x1A,0x07,0x7E,0x00,0x1A,0x09,0x7D,
- 0x7F,0x19,0x0B,0x7D,0x7E,0x18,0x0D,0x7D,0x7D,0x17,0x10,0x7C,0x7D,0x15,0x12,0x7C,
- 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x15,0x7D,0x7C,0x10,0x17,0x7D,0x7C,0x0D,0x18,0x7F,
- 0x7D,0x0B,0x19,0x7F,0x7D,0x09,0x1A,0x00,0x7D,0x07,0x1A,0x02,0x7E,0x05,0x1B,0x02,
- 0xFF,0xFF
-};
-
-static const unsigned char SiS_Part2CLVX_5[] = { /* 750p */
- 0x00,0x03,
- 0x05,0x19,0x05,0x7D,0x03,0x19,0x06,0x7E,0x02,0x19,0x08,0x7D,0x01,0x18,0x0A,0x7D,
- 0x00,0x18,0x0C,0x7C,0x7F,0x17,0x0E,0x7C,0x7E,0x16,0x0F,0x7D,0x7E,0x14,0x11,0x7D,
- 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x14,0x7E,0x7D,0x0F,0x16,0x7E,0x7D,0x0E,0x17,0x7E,
- 0x7D,0x0C,0x18,0x7F,0x7D,0x0A,0x18,0x01,0x7D,0x08,0x19,0x02,0x7D,0x06,0x19,0x04,
- 0xFF,0xFF
-};
-
-static const unsigned char SiS_Part2CLVX_6[] = { /* 1080i */
- 0x00,0x04,
- 0x04,0x1A,0x04,0x7E,0x02,0x1B,0x05,0x7E,0x01,0x1A,0x07,0x7E,0x00,0x1A,0x09,0x7D,
- 0x7F,0x19,0x0B,0x7D,0x7E,0x18,0x0D,0x7D,0x7D,0x17,0x10,0x7C,0x7D,0x15,0x12,0x7C,
- 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x15,0x7D,0x7C,0x10,0x17,0x7D,0x7C,0x0D,0x18,0x7F,
- 0x7D,0x0B,0x19,0x7F,0x7D,0x09,0x1A,0x00,0x7D,0x07,0x1A,0x02,0x7E,0x05,0x1B,0x02,
- 0xFF,0xFF,
-};
-
-#ifdef CONFIG_FB_SIS_315
-/* 661 et al LCD data structure (2.03.00) */
-static const unsigned char SiS_LCDStruct661[] = {
- /* 1024x768 */
-/* type|CR37| HDE | VDE | HT | VT | hss | hse */
- 0x02,0xC0,0x00,0x04,0x00,0x03,0x40,0x05,0x26,0x03,0x10,0x00,0x88,
- 0x00,0x02,0x00,0x06,0x00,0x41,0x5A,0x64,0x00,0x00,0x00,0x00,0x04,
- /* | vss | vse |clck| clock |CRT2DataP|CRT2DataP|idx */
- /* VESA non-VESA noscale */
- /* 1280x1024 */
- 0x03,0xC0,0x00,0x05,0x00,0x04,0x98,0x06,0x2A,0x04,0x30,0x00,0x70,
- 0x00,0x01,0x00,0x03,0x00,0x6C,0xF8,0x2F,0x00,0x00,0x00,0x00,0x08,
- /* 1400x1050 */
- 0x09,0x20,0x78,0x05,0x1A,0x04,0x98,0x06,0x2A,0x04,0x18,0x00,0x38,
- 0x00,0x01,0x00,0x03,0x00,0x6C,0xF8,0x2F,0x00,0x00,0x00,0x00,0x09,
- /* 1600x1200 */
- 0x0B,0xE0,0x40,0x06,0xB0,0x04,0x70,0x08,0xE2,0x04,0x40,0x00,0xC0,
- 0x00,0x01,0x00,0x03,0x00,0xA2,0x70,0x24,0x00,0x00,0x00,0x00,0x0A,
- /* 1280x768 (_2) */
- 0x0A,0xE0,0x00,0x05,0x00,0x03,0x7C,0x06,0x26,0x03,0x30,0x00,0x70,
- 0x00,0x03,0x00,0x06,0x00,0x4D,0xC8,0x48,0x00,0x00,0x00,0x00,0x06,
- /* 1280x720 */
- 0x0E,0xE0,0x00,0x05,0xD0,0x02,0x80,0x05,0x26,0x03,0x10,0x00,0x20,
- 0x00,0x01,0x00,0x06,0x00,0x45,0x9C,0x62,0x00,0x00,0x00,0x00,0x05,
- /* 1280x800 (_2) */
- 0x0C,0xE0,0x00,0x05,0x20,0x03,0x10,0x06,0x2C,0x03,0x30,0x00,0x70,
- 0x00,0x04,0x00,0x03,0x00,0x49,0xCE,0x1E,0x00,0x00,0x00,0x00,0x09,
- /* 1680x1050 */
- 0x0D,0xE0,0x90,0x06,0x1A,0x04,0x6C,0x07,0x2A,0x04,0x1A,0x00,0x4C,
- 0x00,0x03,0x00,0x06,0x00,0x79,0xBE,0x44,0x00,0x00,0x00,0x00,0x06,
- /* 1280x800_3 */
- 0x0C,0xE0,0x00,0x05,0x20,0x03,0xAA,0x05,0x2E,0x03,0x30,0x00,0x50,
- 0x00,0x04,0x00,0x03,0x00,0x47,0xA9,0x10,0x00,0x00,0x00,0x00,0x07,
- /* 800x600 */
- 0x01,0xC0,0x20,0x03,0x58,0x02,0x20,0x04,0x74,0x02,0x2A,0x00,0x80,
- 0x00,0x06,0x00,0x04,0x00,0x28,0x63,0x4B,0x00,0x00,0x00,0x00,0x00,
- /* 1280x854 */
- 0x08,0xE0,0x00,0x05,0x56,0x03,0x80,0x06,0x5d,0x03,0x10,0x00,0x70,
- 0x00,0x01,0x00,0x03,0x00,0x54,0x75,0x13,0x00,0x00,0x00,0x00,0x08
-};
-#endif
-
-#ifdef CONFIG_FB_SIS_300
-static unsigned char SiS300_TrumpionData[14][80] = {
- { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02,
- 0x20,0x03,0x0B,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x10,0x00,0x00,0x04,0x23,
- 0x00,0x00,0x03,0x28,0x03,0x10,0x05,0x08,0x40,0x10,0x00,0x10,0x04,0x23,0x00,0x23,
- 0x03,0x11,0x60,0xBC,0x01,0xFF,0x03,0xFF,0x19,0x01,0x00,0x05,0x09,0x04,0x04,0x05,
- 0x04,0x0C,0x09,0x05,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x5A,0x01,0xBE,0x01,0x00 },
- { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0x27,0x00,0x80,0x02,
- 0x20,0x03,0x07,0x00,0x5E,0x01,0x0D,0x02,0x60,0x0C,0x30,0x11,0x00,0x00,0x04,0x23,
- 0x00,0x00,0x03,0x80,0x03,0x28,0x06,0x08,0x40,0x11,0x00,0x11,0x04,0x23,0x00,0x23,
- 0x03,0x11,0x60,0x90,0x01,0xFF,0x0F,0xF4,0x19,0x01,0x00,0x05,0x01,0x00,0x04,0x05,
- 0x04,0x0C,0x02,0x01,0x02,0xB0,0x00,0x00,0x02,0xBA,0xEC,0x57,0x01,0xBE,0x01,0x00 },
- { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0x8A,0x00,0xD8,0x02,
- 0x84,0x03,0x16,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x1C,0x00,0x20,0x04,0x23,
- 0x00,0x01,0x03,0x53,0x03,0x28,0x06,0x08,0x40,0x1C,0x00,0x16,0x04,0x23,0x00,0x23,
- 0x03,0x11,0x60,0xD9,0x01,0xFF,0x0F,0xF4,0x18,0x07,0x05,0x05,0x13,0x04,0x04,0x05,
- 0x01,0x0B,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x59,0x01,0xBE,0x01,0x00 },
- { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0x72,0x00,0xD8,0x02,
- 0x84,0x03,0x16,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x1C,0x00,0x20,0x04,0x23,
- 0x00,0x01,0x03,0x53,0x03,0x28,0x06,0x08,0x40,0x1C,0x00,0x16,0x04,0x23,0x00,0x23,
- 0x03,0x11,0x60,0xDA,0x01,0xFF,0x0F,0xF4,0x18,0x07,0x05,0x05,0x13,0x04,0x04,0x05,
- 0x01,0x0B,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x55,0x01,0xBE,0x01,0x00 },
- { 0x02,0x0A,0x02,0x00,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02,
- 0x20,0x03,0x16,0x00,0xE0,0x01,0x0D,0x02,0x60,0x0C,0x30,0x98,0x00,0x00,0x04,0x23,
- 0x00,0x01,0x03,0x45,0x03,0x48,0x06,0x08,0x40,0x98,0x00,0x98,0x04,0x23,0x00,0x23,
- 0x03,0x11,0x60,0xF4,0x01,0xFF,0x0F,0xF4,0x18,0x01,0x00,0x05,0x01,0x00,0x05,0x05,
- 0x04,0x0C,0x08,0x05,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x5B,0x01,0xBE,0x01,0x00 },
- { 0x02,0x0A,0x02,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0xBF,0x00,0x20,0x03,
- 0x20,0x04,0x0D,0x00,0x58,0x02,0x71,0x02,0x80,0x0C,0x30,0x9A,0x00,0xFA,0x03,0x1D,
- 0x00,0x01,0x03,0x22,0x03,0x28,0x06,0x08,0x40,0x98,0x00,0x98,0x04,0x1D,0x00,0x1D,
- 0x03,0x11,0x60,0x39,0x03,0x40,0x05,0xF4,0x18,0x07,0x02,0x06,0x04,0x01,0x06,0x0B,
- 0x02,0x0A,0x20,0x19,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x5B,0x01,0xBE,0x01,0x00 },
- { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0xEF,0x00,0x00,0x04,
- 0x40,0x05,0x13,0x00,0x00,0x03,0x26,0x03,0x88,0x0C,0x30,0x90,0x00,0x00,0x04,0x23,
- 0x00,0x01,0x03,0x24,0x03,0x28,0x06,0x08,0x40,0x90,0x00,0x90,0x04,0x23,0x00,0x23,
- 0x03,0x11,0x60,0x40,0x05,0xFF,0x0F,0xF4,0x18,0x01,0x00,0x08,0x01,0x00,0x08,0x01,
- 0x00,0x08,0x01,0x01,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x5B,0x01,0xBE,0x01,0x00 },
- /* variant 2 */
- { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02,
- 0x20,0x03,0x15,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x18,0x00,0x00,0x04,0x23,
- 0x00,0x01,0x03,0x44,0x03,0x28,0x06,0x08,0x40,0x18,0x00,0x18,0x04,0x23,0x00,0x23,
- 0x03,0x11,0x60,0xA6,0x01,0xFF,0x03,0xFF,0x19,0x01,0x00,0x05,0x13,0x04,0x04,0x05,
- 0x04,0x0C,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x55,0x01,0xBE,0x01,0x00 },
- { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02,
- 0x20,0x03,0x15,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x18,0x00,0x00,0x04,0x23,
- 0x00,0x01,0x03,0x44,0x03,0x28,0x06,0x08,0x40,0x18,0x00,0x18,0x04,0x23,0x00,0x23,
- 0x03,0x11,0x60,0xA6,0x01,0xFF,0x03,0xFF,0x19,0x01,0x00,0x05,0x13,0x04,0x04,0x05,
- 0x04,0x0C,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x55,0x01,0xBE,0x01,0x00 },
- { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x8A,0x00,0xD8,0x02,
- 0x84,0x03,0x16,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x1C,0x00,0x20,0x04,0x23,
- 0x00,0x01,0x03,0x53,0x03,0x28,0x06,0x08,0x40,0x1C,0x00,0x16,0x04,0x23,0x00,0x23,
- 0x03,0x11,0x60,0xDA,0x01,0xFF,0x0F,0xF4,0x18,0x07,0x05,0x05,0x13,0x04,0x04,0x05,
- 0x01,0x0B,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x55,0x01,0xBE,0x01,0x00 },
- { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x72,0x00,0xD8,0x02,
- 0x84,0x03,0x16,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x1C,0x00,0x20,0x04,0x23,
- 0x00,0x01,0x03,0x53,0x03,0x28,0x06,0x08,0x40,0x1C,0x00,0x16,0x04,0x23,0x00,0x23,
- 0x03,0x11,0x60,0xDA,0x01,0xFF,0x0F,0xF4,0x18,0x07,0x05,0x05,0x13,0x04,0x04,0x05,
- 0x01,0x0B,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x55,0x01,0xBE,0x01,0x00 },
- { 0x02,0x0A,0x02,0x00,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02,
- 0x20,0x03,0x16,0x00,0xE0,0x01,0x0D,0x02,0x60,0x0C,0x30,0x98,0x00,0x00,0x04,0x23,
- 0x00,0x01,0x03,0x45,0x03,0x48,0x06,0x08,0x40,0x98,0x00,0x98,0x04,0x23,0x00,0x23,
- 0x03,0x11,0x60,0xF4,0x01,0xFF,0x0F,0xF4,0x18,0x01,0x00,0x05,0x01,0x00,0x05,0x05,
- 0x04,0x0C,0x08,0x05,0x02,0xB0,0x00,0x00,0x02,0xBA,0xEA,0x58,0x01,0xBE,0x01,0x00 },
- { 0x02,0x0A,0x02,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0xBF,0x00,0x20,0x03,
- 0x20,0x04,0x0D,0x00,0x58,0x02,0x71,0x02,0x80,0x0C,0x30,0x9A,0x00,0xFA,0x03,0x1D,
- 0x00,0x01,0x03,0x22,0x03,0x28,0x06,0x08,0x40,0x98,0x00,0x98,0x04,0x1D,0x00,0x1D,
- 0x03,0x11,0x60,0x39,0x03,0x40,0x05,0xF4,0x18,0x07,0x02,0x06,0x04,0x01,0x06,0x0B,
- 0x02,0x0A,0x20,0x19,0x02,0xB0,0x00,0x00,0x02,0xBA,0xEA,0x58,0x01,0xBE,0x01,0x00 },
- { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0xEF,0x00,0x00,0x04,
- 0x40,0x05,0x13,0x00,0x00,0x03,0x26,0x03,0x88,0x0C,0x30,0x90,0x00,0x00,0x04,0x23,
- 0x00,0x01,0x03,0x24,0x03,0x28,0x06,0x08,0x40,0x90,0x00,0x90,0x04,0x23,0x00,0x23,
- 0x03,0x11,0x60,0x40,0x05,0xFF,0x0F,0xF4,0x18,0x01,0x00,0x08,0x01,0x00,0x08,0x01,
- 0x00,0x08,0x01,0x01,0x02,0xB0,0x00,0x00,0x02,0xBA,0xEA,0x58,0x01,0xBE,0x01,0x00 }
-};
-#endif
-
void SiS_UnLockCRT2(struct SiS_Private *SiS_Pr);
void SiS_EnableCRT2(struct SiS_Private *SiS_Pr);
unsigned short SiS_GetRatePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex);
@@ -375,16 +94,11 @@ unsigned short SiS_GetCH701x(struct SiS_Private *SiS_Pr, unsigned short tempax);
void SiS_SetCH70xxANDOR(struct SiS_Private *SiS_Pr, unsigned short reg,
unsigned char orval,unsigned short andval);
#ifdef CONFIG_FB_SIS_315
-static void SiS_Chrontel701xOn(struct SiS_Private *SiS_Pr);
-static void SiS_Chrontel701xOff(struct SiS_Private *SiS_Pr);
-static void SiS_ChrontelInitTVVSync(struct SiS_Private *SiS_Pr);
-static void SiS_ChrontelDoSomething1(struct SiS_Private *SiS_Pr);
void SiS_Chrontel701xBLOn(struct SiS_Private *SiS_Pr);
void SiS_Chrontel701xBLOff(struct SiS_Private *SiS_Pr);
#endif /* 315 */
#ifdef CONFIG_FB_SIS_300
-static bool SiS_SetTrumpionBlock(struct SiS_Private *SiS_Pr, unsigned char *dataptr);
void SiS_SetChrontelGPIO(struct SiS_Private *SiS_Pr, unsigned short myvbinfo);
#endif
@@ -394,40 +108,6 @@ unsigned short SiS_HandleDDC(struct SiS_Private *SiS_Pr, unsigned int VBFlags, i
unsigned short adaptnum, unsigned short DDCdatatype,
unsigned char *buffer, unsigned int VBFlags2);
-static unsigned short SiS_InitDDCRegs(struct SiS_Private *SiS_Pr, unsigned int VBFlags,
- int VGAEngine, unsigned short adaptnum, unsigned short DDCdatatype,
- bool checkcr32, unsigned int VBFlags2);
-static unsigned short SiS_ProbeDDC(struct SiS_Private *SiS_Pr);
-static unsigned short SiS_ReadDDC(struct SiS_Private *SiS_Pr, unsigned short DDCdatatype,
- unsigned char *buffer);
-static void SiS_SetSwitchDDC2(struct SiS_Private *SiS_Pr);
-static unsigned short SiS_SetStart(struct SiS_Private *SiS_Pr);
-static unsigned short SiS_SetStop(struct SiS_Private *SiS_Pr);
-static unsigned short SiS_SetSCLKLow(struct SiS_Private *SiS_Pr);
-static unsigned short SiS_SetSCLKHigh(struct SiS_Private *SiS_Pr);
-static unsigned short SiS_ReadDDC2Data(struct SiS_Private *SiS_Pr);
-static unsigned short SiS_WriteDDC2Data(struct SiS_Private *SiS_Pr, unsigned short tempax);
-static unsigned short SiS_CheckACK(struct SiS_Private *SiS_Pr);
-static unsigned short SiS_WriteDABDDC(struct SiS_Private *SiS_Pr);
-static unsigned short SiS_PrepareReadDDC(struct SiS_Private *SiS_Pr);
-static unsigned short SiS_PrepareDDC(struct SiS_Private *SiS_Pr);
-static void SiS_SendACK(struct SiS_Private *SiS_Pr, unsigned short yesno);
-static unsigned short SiS_DoProbeDDC(struct SiS_Private *SiS_Pr);
-
-#ifdef CONFIG_FB_SIS_300
-static void SiS_OEM300Setting(struct SiS_Private *SiS_Pr,
- unsigned short ModeNo, unsigned short ModeIdIndex, unsigned short RefTabindex);
-static void SetOEMLCDData2(struct SiS_Private *SiS_Pr,
- unsigned short ModeNo, unsigned short ModeIdIndex,unsigned short RefTableIndex);
-#endif
-#ifdef CONFIG_FB_SIS_315
-static void SiS_OEM310Setting(struct SiS_Private *SiS_Pr,
- unsigned short ModeNo,unsigned short ModeIdIndex, unsigned short RRTI);
-static void SiS_OEM661Setting(struct SiS_Private *SiS_Pr,
- unsigned short ModeNo,unsigned short ModeIdIndex, unsigned short RRTI);
-static void SiS_FinalizeLCD(struct SiS_Private *, unsigned short, unsigned short);
-#endif
-
extern void SiS_DisplayOff(struct SiS_Private *SiS_Pr);
extern void SiS_DisplayOn(struct SiS_Private *SiS_Pr);
extern bool SiS_SearchModeID(struct SiS_Private *, unsigned short *, unsigned short *);
diff --git a/drivers/video/fbdev/sis/sis.h b/drivers/video/fbdev/sis/sis.h
index ea1d1c9640bf..d04982b0cd6f 100644
--- a/drivers/video/fbdev/sis/sis.h
+++ b/drivers/video/fbdev/sis/sis.h
@@ -28,6 +28,7 @@
#include "vgatypes.h"
#include "vstruct.h"
+#include "init.h"
#define VER_MAJOR 1
#define VER_MINOR 8
@@ -321,6 +322,85 @@ u8 SiS_GetRegByte(SISIOADDRESS);
u16 SiS_GetRegShort(SISIOADDRESS);
u32 SiS_GetRegLong(SISIOADDRESS);
+/* Chrontel TV, DDC and DPMS functions */
+/* from init.c */
+bool SiSInitPtr(struct SiS_Private *SiS_Pr);
+unsigned short SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay,
+ int VDisplay, int Depth, bool FSTN,
+ unsigned short CustomT, int LCDwith, int LCDheight,
+ unsigned int VBFlags2);
+unsigned short SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay,
+ int VDisplay, int Depth, unsigned int VBFlags2);
+unsigned short SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay,
+ int VDisplay, int Depth, unsigned int VBFlags2);
+
+void SiS_DisplayOn(struct SiS_Private *SiS_Pr);
+void SiS_DisplayOff(struct SiS_Private *SiS_Pr);
+void SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr);
+void SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable);
+void SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable);
+unsigned short SiS_GetModeFlag(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
+ unsigned short ModeIdIndex);
+bool SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr);
+
+bool SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo,
+ unsigned short *ModeIdIndex);
+unsigned short SiS_GetModePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
+ unsigned short ModeIdIndex);
+unsigned short SiS_GetRefCRTVCLK(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide);
+unsigned short SiS_GetRefCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide);
+unsigned short SiS_GetColorDepth(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
+ unsigned short ModeIdIndex);
+unsigned short SiS_GetOffset(struct SiS_Private *SiS_Pr,unsigned short ModeNo,
+ unsigned short ModeIdIndex, unsigned short RRTI);
+#ifdef CONFIG_FB_SIS_300
+void SiS_GetFIFOThresholdIndex300(struct SiS_Private *SiS_Pr, unsigned short *idx1,
+ unsigned short *idx2);
+unsigned short SiS_GetFIFOThresholdB300(unsigned short idx1, unsigned short idx2);
+unsigned short SiS_GetLatencyFactor630(struct SiS_Private *SiS_Pr, unsigned short index);
+#endif
+void SiS_LoadDAC(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex);
+bool SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo);
+void SiS_CalcCRRegisters(struct SiS_Private *SiS_Pr, int depth);
+void SiS_CalcLCDACRT1Timing(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
+ unsigned short ModeIdIndex);
+void SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata, int xres,
+ int yres, struct fb_var_screeninfo *var, bool writeres);
+
+/* From init301.c: */
+extern void SiS_GetVBInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
+ unsigned short ModeIdIndex, int chkcrt2mode);
+extern void SiS_GetLCDResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
+ unsigned short ModeIdIndex);
+extern void SiS_SetYPbPr(struct SiS_Private *SiS_Pr);
+extern void SiS_SetTVMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
+ unsigned short ModeIdIndex);
+extern void SiS_UnLockCRT2(struct SiS_Private *SiS_Pr);
+extern void SiS_DisableBridge(struct SiS_Private *);
+extern bool SiS_SetCRT2Group(struct SiS_Private *, unsigned short);
+extern unsigned short SiS_GetRatePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
+ unsigned short ModeIdIndex);
+extern void SiS_WaitRetrace1(struct SiS_Private *SiS_Pr);
+extern unsigned short SiS_GetResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
+ unsigned short ModeIdIndex);
+extern unsigned short SiS_GetCH700x(struct SiS_Private *SiS_Pr, unsigned short tempax);
+extern unsigned short SiS_GetVCLK2Ptr(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
+ unsigned short ModeIdIndex, unsigned short RRTI);
+extern bool SiS_IsVAMode(struct SiS_Private *);
+extern bool SiS_IsDualEdge(struct SiS_Private *);
+
+#ifdef CONFIG_FB_SIS_300
+extern unsigned int sisfb_read_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg);
+extern void sisfb_write_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg,
+ unsigned int val);
+#endif
+#ifdef CONFIG_FB_SIS_315
+extern void sisfb_write_nbridge_pci_byte(struct SiS_Private *SiS_Pr, int reg,
+ unsigned char val);
+extern unsigned int sisfb_read_mio_pci_word(struct SiS_Private *SiS_Pr, int reg);
+#endif
+
+
/* MMIO access macros */
#define MMIO_IN8(base, offset) readb((base+offset))
#define MMIO_IN16(base, offset) readw((base+offset))
@@ -583,4 +663,55 @@ struct sis_video_info {
struct sis_video_info *next;
};
+/* from sis_accel.c */
+extern void fbcon_sis_fillrect(struct fb_info *info,
+ const struct fb_fillrect *rect);
+extern void fbcon_sis_copyarea(struct fb_info *info,
+ const struct fb_copyarea *area);
+extern int fbcon_sis_sync(struct fb_info *info);
+
+/* Internal 2D accelerator functions */
+extern int sisfb_initaccel(struct sis_video_info *ivideo);
+extern void sisfb_syncaccel(struct sis_video_info *ivideo);
+
+/* Internal general routines */
+#ifdef CONFIG_FB_SIS_300
+unsigned int sisfb_read_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg);
+void sisfb_write_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg, unsigned int val);
+unsigned int sisfb_read_lpc_pci_dword(struct SiS_Private *SiS_Pr, int reg);
+#endif
+#ifdef CONFIG_FB_SIS_315
+void sisfb_write_nbridge_pci_byte(struct SiS_Private *SiS_Pr, int reg, unsigned char val);
+unsigned int sisfb_read_mio_pci_word(struct SiS_Private *SiS_Pr, int reg);
+#endif
+
+/* SiS-specific exported functions */
+void sis_malloc(struct sis_memreq *req);
+void sis_malloc_new(struct pci_dev *pdev, struct sis_memreq *req);
+void sis_free(u32 base);
+void sis_free_new(struct pci_dev *pdev, u32 base);
+
+/* Routines from init.c/init301.c */
+extern unsigned short SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay,
+ int VDisplay, int Depth, bool FSTN, unsigned short CustomT,
+ int LCDwith, int LCDheight, unsigned int VBFlags2);
+extern unsigned short SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay,
+ int VDisplay, int Depth, unsigned int VBFlags2);
+extern unsigned short SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay,
+ int VDisplay, int Depth, unsigned int VBFlags2);
+extern void SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr);
+extern bool SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo);
+extern void SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable);
+extern void SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable);
+
+extern bool SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr);
+
+extern bool sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno,
+ int *htotal, int *vtotal, unsigned char rateindex);
+extern int sisfb_mode_rate_to_dclock(struct SiS_Private *SiS_Pr,
+ unsigned char modeno, unsigned char rateindex);
+extern int sisfb_mode_rate_to_ddata(struct SiS_Private *SiS_Pr, unsigned char modeno,
+ unsigned char rateindex, struct fb_var_screeninfo *var);
+
+
#endif
diff --git a/drivers/video/fbdev/sis/sis_main.c b/drivers/video/fbdev/sis/sis_main.c
index ecdd054d8951..20aff9005978 100644
--- a/drivers/video/fbdev/sis/sis_main.c
+++ b/drivers/video/fbdev/sis/sis_main.c
@@ -56,15 +56,66 @@
#include "sis.h"
#include "sis_main.h"
+#include "init301.h"
#if !defined(CONFIG_FB_SIS_300) && !defined(CONFIG_FB_SIS_315)
#warning Neither CONFIG_FB_SIS_300 nor CONFIG_FB_SIS_315 is set
#warning sisfb will not work!
#endif
+/* ---------------------- Prototypes ------------------------- */
+
+/* Interface used by the world */
+#ifndef MODULE
+static int sisfb_setup(char *options);
+#endif
+
+/* Interface to the low level console driver */
+static int sisfb_init(void);
+
+/* fbdev routines */
+static int sisfb_get_fix(struct fb_fix_screeninfo *fix, int con,
+ struct fb_info *info);
+
+static int sisfb_ioctl(struct fb_info *info, unsigned int cmd,
+ unsigned long arg);
+static int sisfb_set_par(struct fb_info *info);
+static int sisfb_blank(int blank,
+ struct fb_info *info);
+
static void sisfb_handle_command(struct sis_video_info *ivideo,
struct sisfb_cmd *sisfb_command);
+static void sisfb_search_mode(char *name, bool quiet);
+static int sisfb_validate_mode(struct sis_video_info *ivideo, int modeindex, u32 vbflags);
+static u8 sisfb_search_refresh_rate(struct sis_video_info *ivideo, unsigned int rate,
+ int index);
+static int sisfb_setcolreg(unsigned regno, unsigned red, unsigned green,
+ unsigned blue, unsigned transp,
+ struct fb_info *fb_info);
+static int sisfb_do_set_var(struct fb_var_screeninfo *var, int isactive,
+ struct fb_info *info);
+static void sisfb_pre_setmode(struct sis_video_info *ivideo);
+static void sisfb_post_setmode(struct sis_video_info *ivideo);
+static bool sisfb_CheckVBRetrace(struct sis_video_info *ivideo);
+static bool sisfbcheckvretracecrt2(struct sis_video_info *ivideo);
+static bool sisfbcheckvretracecrt1(struct sis_video_info *ivideo);
+static bool sisfb_bridgeisslave(struct sis_video_info *ivideo);
+static void sisfb_detect_VB_connect(struct sis_video_info *ivideo);
+static void sisfb_get_VB_type(struct sis_video_info *ivideo);
+static void sisfb_set_TVxposoffset(struct sis_video_info *ivideo, int val);
+static void sisfb_set_TVyposoffset(struct sis_video_info *ivideo, int val);
+
+/* Internal heap routines */
+static int sisfb_heap_init(struct sis_video_info *ivideo);
+static struct SIS_OH * sisfb_poh_new_node(struct SIS_HEAP *memheap);
+static struct SIS_OH * sisfb_poh_allocate(struct SIS_HEAP *memheap, u32 size);
+static void sisfb_delete_node(struct SIS_OH *poh);
+static void sisfb_insert_node(struct SIS_OH *pohList, struct SIS_OH *poh);
+static struct SIS_OH * sisfb_poh_free(struct SIS_HEAP *memheap, u32 base);
+static void sisfb_free_node(struct SIS_HEAP *memheap, struct SIS_OH *poh);
+
+
/* ------------------ Internal helper routines ----------------- */
static void __init
diff --git a/drivers/video/fbdev/sis/sis_main.h b/drivers/video/fbdev/sis/sis_main.h
index 32e23c209430..d8ba07061f1e 100644
--- a/drivers/video/fbdev/sis/sis_main.h
+++ b/drivers/video/fbdev/sis/sis_main.h
@@ -661,121 +661,4 @@ static struct _customttable {
}
};
-/* ---------------------- Prototypes ------------------------- */
-
-/* Interface used by the world */
-#ifndef MODULE
-static int sisfb_setup(char *options);
#endif
-
-/* Interface to the low level console driver */
-static int sisfb_init(void);
-
-/* fbdev routines */
-static int sisfb_get_fix(struct fb_fix_screeninfo *fix, int con,
- struct fb_info *info);
-
-static int sisfb_ioctl(struct fb_info *info, unsigned int cmd,
- unsigned long arg);
-static int sisfb_set_par(struct fb_info *info);
-static int sisfb_blank(int blank,
- struct fb_info *info);
-extern void fbcon_sis_fillrect(struct fb_info *info,
- const struct fb_fillrect *rect);
-extern void fbcon_sis_copyarea(struct fb_info *info,
- const struct fb_copyarea *area);
-extern int fbcon_sis_sync(struct fb_info *info);
-
-/* Internal 2D accelerator functions */
-extern int sisfb_initaccel(struct sis_video_info *ivideo);
-extern void sisfb_syncaccel(struct sis_video_info *ivideo);
-
-/* Internal general routines */
-static void sisfb_search_mode(char *name, bool quiet);
-static int sisfb_validate_mode(struct sis_video_info *ivideo, int modeindex, u32 vbflags);
-static u8 sisfb_search_refresh_rate(struct sis_video_info *ivideo, unsigned int rate,
- int index);
-static int sisfb_setcolreg(unsigned regno, unsigned red, unsigned green,
- unsigned blue, unsigned transp,
- struct fb_info *fb_info);
-static int sisfb_do_set_var(struct fb_var_screeninfo *var, int isactive,
- struct fb_info *info);
-static void sisfb_pre_setmode(struct sis_video_info *ivideo);
-static void sisfb_post_setmode(struct sis_video_info *ivideo);
-static bool sisfb_CheckVBRetrace(struct sis_video_info *ivideo);
-static bool sisfbcheckvretracecrt2(struct sis_video_info *ivideo);
-static bool sisfbcheckvretracecrt1(struct sis_video_info *ivideo);
-static bool sisfb_bridgeisslave(struct sis_video_info *ivideo);
-static void sisfb_detect_VB_connect(struct sis_video_info *ivideo);
-static void sisfb_get_VB_type(struct sis_video_info *ivideo);
-static void sisfb_set_TVxposoffset(struct sis_video_info *ivideo, int val);
-static void sisfb_set_TVyposoffset(struct sis_video_info *ivideo, int val);
-#ifdef CONFIG_FB_SIS_300
-unsigned int sisfb_read_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg);
-void sisfb_write_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg, unsigned int val);
-unsigned int sisfb_read_lpc_pci_dword(struct SiS_Private *SiS_Pr, int reg);
-#endif
-#ifdef CONFIG_FB_SIS_315
-void sisfb_write_nbridge_pci_byte(struct SiS_Private *SiS_Pr, int reg, unsigned char val);
-unsigned int sisfb_read_mio_pci_word(struct SiS_Private *SiS_Pr, int reg);
-#endif
-
-/* SiS-specific exported functions */
-void sis_malloc(struct sis_memreq *req);
-void sis_malloc_new(struct pci_dev *pdev, struct sis_memreq *req);
-void sis_free(u32 base);
-void sis_free_new(struct pci_dev *pdev, u32 base);
-
-/* Internal heap routines */
-static int sisfb_heap_init(struct sis_video_info *ivideo);
-static struct SIS_OH * sisfb_poh_new_node(struct SIS_HEAP *memheap);
-static struct SIS_OH * sisfb_poh_allocate(struct SIS_HEAP *memheap, u32 size);
-static void sisfb_delete_node(struct SIS_OH *poh);
-static void sisfb_insert_node(struct SIS_OH *pohList, struct SIS_OH *poh);
-static struct SIS_OH * sisfb_poh_free(struct SIS_HEAP *memheap, u32 base);
-static void sisfb_free_node(struct SIS_HEAP *memheap, struct SIS_OH *poh);
-
-/* Routines from init.c/init301.c */
-extern unsigned short SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay,
- int VDisplay, int Depth, bool FSTN, unsigned short CustomT,
- int LCDwith, int LCDheight, unsigned int VBFlags2);
-extern unsigned short SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay,
- int VDisplay, int Depth, unsigned int VBFlags2);
-extern unsigned short SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay,
- int VDisplay, int Depth, unsigned int VBFlags2);
-extern void SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr);
-extern bool SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo);
-extern void SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable);
-extern void SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable);
-
-extern bool SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr);
-
-extern bool sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno,
- int *htotal, int *vtotal, unsigned char rateindex);
-extern int sisfb_mode_rate_to_dclock(struct SiS_Private *SiS_Pr,
- unsigned char modeno, unsigned char rateindex);
-extern int sisfb_mode_rate_to_ddata(struct SiS_Private *SiS_Pr, unsigned char modeno,
- unsigned char rateindex, struct fb_var_screeninfo *var);
-
-/* Chrontel TV, DDC and DPMS functions */
-extern unsigned short SiS_GetCH700x(struct SiS_Private *SiS_Pr, unsigned short reg);
-extern void SiS_SetCH700x(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val);
-extern unsigned short SiS_GetCH701x(struct SiS_Private *SiS_Pr, unsigned short reg);
-extern void SiS_SetCH701x(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val);
-extern void SiS_SetCH70xxANDOR(struct SiS_Private *SiS_Pr, unsigned short reg,
- unsigned char myor, unsigned char myand);
-extern void SiS_DDC2Delay(struct SiS_Private *SiS_Pr, unsigned int delaytime);
-extern void SiS_SetChrontelGPIO(struct SiS_Private *SiS_Pr, unsigned short myvbinfo);
-extern unsigned short SiS_HandleDDC(struct SiS_Private *SiS_Pr, unsigned int VBFlags, int VGAEngine,
- unsigned short adaptnum, unsigned short DDCdatatype, unsigned char *buffer,
- unsigned int VBFlags2);
-extern unsigned short SiS_ReadDDC1Bit(struct SiS_Private *SiS_Pr);
-#ifdef CONFIG_FB_SIS_315
-extern void SiS_Chrontel701xBLOn(struct SiS_Private *SiS_Pr);
-extern void SiS_Chrontel701xBLOff(struct SiS_Private *SiS_Pr);
-#endif
-extern void SiS_SiS30xBLOn(struct SiS_Private *SiS_Pr);
-extern void SiS_SiS30xBLOff(struct SiS_Private *SiS_Pr);
-#endif
-
-
diff --git a/drivers/video/fbdev/smscufx.c b/drivers/video/fbdev/smscufx.c
index 8db7085e5d1a..22b606af0a87 100644
--- a/drivers/video/fbdev/smscufx.c
+++ b/drivers/video/fbdev/smscufx.c
@@ -1293,7 +1293,6 @@ static struct fb_ops ufx_ops = {
* Assumes no active clients have framebuffer open */
static int ufx_realloc_framebuffer(struct ufx_data *dev, struct fb_info *info)
{
- int retval = -ENOMEM;
int old_len = info->fix.smem_len;
int new_len;
unsigned char *old_fb = info->screen_base;
@@ -1308,10 +1307,8 @@ static int ufx_realloc_framebuffer(struct ufx_data *dev, struct fb_info *info)
* Alloc system memory for virtual framebuffer
*/
new_fb = vmalloc(new_len);
- if (!new_fb) {
- pr_err("Virtual framebuffer alloc failed");
- goto error;
- }
+ if (!new_fb)
+ return -ENOMEM;
if (info->screen_base) {
memcpy(new_fb, old_fb, old_len);
@@ -1323,11 +1320,7 @@ static int ufx_realloc_framebuffer(struct ufx_data *dev, struct fb_info *info)
info->fix.smem_start = (unsigned long) new_fb;
info->flags = smscufx_info_flags;
}
-
- retval = 0;
-
-error:
- return retval;
+ return 0;
}
/* sets up I2C Controller for 100 Kbps, std. speed, 7-bit addr, master,
@@ -1620,8 +1613,8 @@ static int ufx_usb_probe(struct usb_interface *interface,
{
struct usb_device *usbdev;
struct ufx_data *dev;
- struct fb_info *info = NULL;
- int retval = -ENOMEM;
+ struct fb_info *info;
+ int retval;
u32 id_rev, fpga_rev;
/* usb initialization */
@@ -1631,7 +1624,7 @@ static int ufx_usb_probe(struct usb_interface *interface,
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
if (dev == NULL) {
dev_err(&usbdev->dev, "ufx_usb_probe: failed alloc of dev struct\n");
- goto error;
+ return -ENOMEM;
}
/* we need to wait for both usb and fbdev to spin down on disconnect */
@@ -1652,9 +1645,8 @@ static int ufx_usb_probe(struct usb_interface *interface,
dev_dbg(dev->gdev, "fb_defio enable=%d\n", fb_defio);
if (!ufx_alloc_urb_list(dev, WRITES_IN_FLIGHT, MAX_TRANSFER)) {
- retval = -ENOMEM;
dev_err(dev->gdev, "ufx_alloc_urb_list failed\n");
- goto error;
+ goto e_nomem;
}
/* We don't register a new USB class. Our client interface is fbdev */
@@ -1662,9 +1654,8 @@ static int ufx_usb_probe(struct usb_interface *interface,
/* allocates framebuffer driver structure, not framebuffer memory */
info = framebuffer_alloc(0, &usbdev->dev);
if (!info) {
- retval = -ENOMEM;
dev_err(dev->gdev, "framebuffer_alloc failed\n");
- goto error;
+ goto e_nomem;
}
dev->info = info;
@@ -1675,7 +1666,7 @@ static int ufx_usb_probe(struct usb_interface *interface,
retval = fb_alloc_cmap(&info->cmap, 256, 0);
if (retval < 0) {
dev_err(dev->gdev, "fb_alloc_cmap failed %x\n", retval);
- goto error;
+ goto destroy_modedb;
}
INIT_DELAYED_WORK(&dev->free_framebuffer_work,
@@ -1736,26 +1727,20 @@ static int ufx_usb_probe(struct usb_interface *interface,
return 0;
error:
- if (dev) {
- if (info) {
- if (info->cmap.len != 0)
- fb_dealloc_cmap(&info->cmap);
- if (info->monspecs.modedb)
- fb_destroy_modedb(info->monspecs.modedb);
- vfree(info->screen_base);
-
- fb_destroy_modelist(&info->modelist);
-
- framebuffer_release(info);
- }
-
- kref_put(&dev->kref, ufx_free); /* ref for framebuffer */
- kref_put(&dev->kref, ufx_free); /* last ref from kref_init */
-
- /* dev has been deallocated. Do not dereference */
- }
-
+ fb_dealloc_cmap(&info->cmap);
+destroy_modedb:
+ fb_destroy_modedb(info->monspecs.modedb);
+ vfree(info->screen_base);
+ fb_destroy_modelist(&info->modelist);
+ framebuffer_release(info);
+put_ref:
+ kref_put(&dev->kref, ufx_free); /* ref for framebuffer */
+ kref_put(&dev->kref, ufx_free); /* last ref from kref_init */
return retval;
+
+e_nomem:
+ retval = -ENOMEM;
+ goto put_ref;
}
static void ufx_usb_disconnect(struct usb_interface *interface)
diff --git a/drivers/video/fbdev/ssd1307fb.c b/drivers/video/fbdev/ssd1307fb.c
index f599520374dd..6439231f2db2 100644
--- a/drivers/video/fbdev/ssd1307fb.c
+++ b/drivers/video/fbdev/ssd1307fb.c
@@ -628,7 +628,8 @@ static int ssd1307fb_probe(struct i2c_client *client,
goto fb_alloc_error;
}
- ssd1307fb_defio = devm_kzalloc(&client->dev, sizeof(struct fb_deferred_io), GFP_KERNEL);
+ ssd1307fb_defio = devm_kzalloc(&client->dev, sizeof(*ssd1307fb_defio),
+ GFP_KERNEL);
if (!ssd1307fb_defio) {
dev_err(&client->dev, "Couldn't allocate deferred io.\n");
ret = -ENOMEM;
diff --git a/drivers/video/fbdev/stifb.c b/drivers/video/fbdev/stifb.c
index 6ded5c198998..045e8afe398b 100644
--- a/drivers/video/fbdev/stifb.c
+++ b/drivers/video/fbdev/stifb.c
@@ -527,7 +527,7 @@ rattlerSetupPlanes(struct stifb_info *fb)
fb->id = saved_id;
for (y = 0; y < fb->info.var.yres; ++y)
- memset(fb->info.screen_base + y * fb->info.fix.line_length,
+ fb_memset(fb->info.screen_base + y * fb->info.fix.line_length,
0xff, fb->info.var.xres * fb->info.var.bits_per_pixel/8);
CRX24_SET_OVLY_MASK(fb);
@@ -1126,10 +1126,8 @@ static int __init stifb_init_fb(struct sti_struct *sti, int bpp_pref)
int bpp, xres, yres;
fb = kzalloc(sizeof(*fb), GFP_ATOMIC);
- if (!fb) {
- printk(KERN_ERR "stifb: Could not allocate stifb structure\n");
- return -ENODEV;
- }
+ if (!fb)
+ return -ENOMEM;
info = &fb->info;
diff --git a/drivers/video/fbdev/udlfb.c b/drivers/video/fbdev/udlfb.c
index 452a4207ac1b..f365d4862015 100644
--- a/drivers/video/fbdev/udlfb.c
+++ b/drivers/video/fbdev/udlfb.c
@@ -428,7 +428,6 @@ static void dlfb_compress_hline(
const uint16_t *pixel = *pixel_start_ptr;
uint32_t dev_addr = *device_address_ptr;
uint8_t *cmd = *command_buffer_ptr;
- const int bpp = 2;
while ((pixel_end > pixel) &&
(cmd_buffer_end - MIN_RLX_CMD_BYTES > cmd)) {
@@ -441,9 +440,9 @@ static void dlfb_compress_hline(
*cmd++ = 0xAF;
*cmd++ = 0x6B;
- *cmd++ = (uint8_t) ((dev_addr >> 16) & 0xFF);
- *cmd++ = (uint8_t) ((dev_addr >> 8) & 0xFF);
- *cmd++ = (uint8_t) ((dev_addr) & 0xFF);
+ *cmd++ = dev_addr >> 16;
+ *cmd++ = dev_addr >> 8;
+ *cmd++ = dev_addr;
cmd_pixels_count_byte = cmd++; /* we'll know this later */
cmd_pixel_start = pixel;
@@ -453,15 +452,15 @@ static void dlfb_compress_hline(
cmd_pixel_end = pixel + min(MAX_CMD_PIXELS + 1,
min((int)(pixel_end - pixel),
- (int)(cmd_buffer_end - cmd) / bpp));
+ (int)(cmd_buffer_end - cmd) / BPP));
- prefetch_range((void *) pixel, (cmd_pixel_end - pixel) * bpp);
+ prefetch_range((void *) pixel, (cmd_pixel_end - pixel) * BPP);
while (pixel < cmd_pixel_end) {
const uint16_t * const repeating_pixel = pixel;
- *(uint16_t *)cmd = cpu_to_be16p(pixel);
- cmd += 2;
+ *cmd++ = *pixel >> 8;
+ *cmd++ = *pixel;
pixel++;
if (unlikely((pixel < cmd_pixel_end) &&
@@ -490,7 +489,7 @@ static void dlfb_compress_hline(
}
*cmd_pixels_count_byte = (pixel - cmd_pixel_start) & 0xFF;
- dev_addr += (pixel - cmd_pixel_start) * bpp;
+ dev_addr += (pixel - cmd_pixel_start) * BPP;
}
if (cmd_buffer_end <= MIN_RLX_CMD_BYTES + cmd) {
@@ -1136,7 +1135,6 @@ static struct fb_ops dlfb_ops = {
*/
static int dlfb_realloc_framebuffer(struct dlfb_data *dlfb, struct fb_info *info)
{
- int retval = -ENOMEM;
int old_len = info->fix.smem_len;
int new_len;
unsigned char *old_fb = info->screen_base;
@@ -1152,7 +1150,7 @@ static int dlfb_realloc_framebuffer(struct dlfb_data *dlfb, struct fb_info *info
new_fb = vmalloc(new_len);
if (!new_fb) {
dev_err(info->dev, "Virtual framebuffer alloc failed\n");
- goto error;
+ return -ENOMEM;
}
if (info->screen_base) {
@@ -1181,11 +1179,7 @@ static int dlfb_realloc_framebuffer(struct dlfb_data *dlfb, struct fb_info *info
dlfb->backing_buffer = new_back;
}
}
-
- retval = 0;
-
-error:
- return retval;
+ return 0;
}
/*
@@ -1531,15 +1525,16 @@ static int dlfb_parse_vendor_descriptor(struct dlfb_data *dlfb,
u8 length;
u16 key;
- key = le16_to_cpu(*((u16 *) desc));
- desc += sizeof(u16);
- length = *desc;
- desc++;
+ key = *desc++;
+ key |= (u16)*desc++ << 8;
+ length = *desc++;
switch (key) {
case 0x0200: { /* max_area */
- u32 max_area;
- max_area = le32_to_cpu(*((u32 *)desc));
+ u32 max_area = *desc++;
+ max_area |= (u32)*desc++ << 8;
+ max_area |= (u32)*desc++ << 16;
+ max_area |= (u32)*desc++ << 24;
dev_warn(&intf->dev,
"DL chip limited to %d pixel modes\n",
max_area);
diff --git a/drivers/video/fbdev/vermilion/vermilion.c b/drivers/video/fbdev/vermilion/vermilion.c
index 6f8d444eb0e3..5172fa581147 100644
--- a/drivers/video/fbdev/vermilion/vermilion.c
+++ b/drivers/video/fbdev/vermilion/vermilion.c
@@ -651,7 +651,7 @@ static int vmlfb_check_var_locked(struct fb_var_screeninfo *var,
}
pitch = ALIGN((var->xres * var->bits_per_pixel) >> 3, 0x40);
- mem = pitch * var->yres_virtual;
+ mem = (u64)pitch * var->yres_virtual;
if (mem > vinfo->vram_contig_size) {
return -ENOMEM;
}
diff --git a/drivers/video/fbdev/via/via_aux_sii164.c b/drivers/video/fbdev/via/via_aux_sii164.c
index ca1b35f033b1..c27f62c2c75a 100644
--- a/drivers/video/fbdev/via/via_aux_sii164.c
+++ b/drivers/video/fbdev/via/via_aux_sii164.c
@@ -36,7 +36,7 @@ static void probe(struct via_aux_bus *bus, u8 addr)
.name = name};
/* check vendor id and device id */
const u8 id[] = {0x01, 0x00, 0x06, 0x00}, len = ARRAY_SIZE(id);
- u8 tmp[len];
+ u8 tmp[ARRAY_SIZE(id)];
if (!via_aux_read(&drv, 0x00, tmp, len) || memcmp(id, tmp, len))
return;
diff --git a/drivers/video/fbdev/via/via_aux_vt1631.c b/drivers/video/fbdev/via/via_aux_vt1631.c
index 06e742f1f723..32978a0ccfd7 100644
--- a/drivers/video/fbdev/via/via_aux_vt1631.c
+++ b/drivers/video/fbdev/via/via_aux_vt1631.c
@@ -36,7 +36,7 @@ void via_aux_vt1631_probe(struct via_aux_bus *bus)
.name = name};
/* check vendor id and device id */
const u8 id[] = {0x06, 0x11, 0x91, 0x31}, len = ARRAY_SIZE(id);
- u8 tmp[len];
+ u8 tmp[ARRAY_SIZE(id)];
if (!via_aux_read(&drv, 0x00, tmp, len) || memcmp(id, tmp, len))
return;
diff --git a/drivers/video/fbdev/via/via_aux_vt1632.c b/drivers/video/fbdev/via/via_aux_vt1632.c
index d24f4cd97401..cec8cc43d524 100644
--- a/drivers/video/fbdev/via/via_aux_vt1632.c
+++ b/drivers/video/fbdev/via/via_aux_vt1632.c
@@ -36,7 +36,7 @@ static void probe(struct via_aux_bus *bus, u8 addr)
.name = name};
/* check vendor id and device id */
const u8 id[] = {0x06, 0x11, 0x92, 0x31}, len = ARRAY_SIZE(id);
- u8 tmp[len];
+ u8 tmp[ARRAY_SIZE(id)];
if (!via_aux_read(&drv, 0x00, tmp, len) || memcmp(id, tmp, len))
return;
diff --git a/drivers/video/fbdev/via/via_aux_vt1636.c b/drivers/video/fbdev/via/via_aux_vt1636.c
index 9e015c101d4d..2b10bc21ab79 100644
--- a/drivers/video/fbdev/via/via_aux_vt1636.c
+++ b/drivers/video/fbdev/via/via_aux_vt1636.c
@@ -36,7 +36,7 @@ void via_aux_vt1636_probe(struct via_aux_bus *bus)
.name = name};
/* check vendor id and device id */
const u8 id[] = {0x06, 0x11, 0x45, 0x33}, len = ARRAY_SIZE(id);
- u8 tmp[len];
+ u8 tmp[ARRAY_SIZE(id)];
if (!via_aux_read(&drv, 0x00, tmp, len) || memcmp(id, tmp, len))
return;
diff --git a/drivers/video/logo/Kconfig b/drivers/video/logo/Kconfig
index 0037104d66ac..d1f6196c8b9a 100644
--- a/drivers/video/logo/Kconfig
+++ b/drivers/video/logo/Kconfig
@@ -27,16 +27,6 @@ config LOGO_LINUX_CLUT224
bool "Standard 224-color Linux logo"
default y
-config LOGO_BLACKFIN_VGA16
- bool "16-colour Blackfin Processor Linux logo"
- depends on BLACKFIN
- default y
-
-config LOGO_BLACKFIN_CLUT224
- bool "224-colour Blackfin Processor Linux logo"
- depends on BLACKFIN
- default y
-
config LOGO_DEC_CLUT224
bool "224-color Digital Equipment Corporation Linux logo"
depends on MACH_DECSTATION || ALPHA
@@ -77,9 +67,4 @@ config LOGO_SUPERH_CLUT224
depends on SUPERH
default y
-config LOGO_M32R_CLUT224
- bool "224-color M32R Linux logo"
- depends on M32R
- default y
-
endif # LOGO
diff --git a/drivers/video/logo/Makefile b/drivers/video/logo/Makefile
index 6194373ee424..228a89b9bdd1 100644
--- a/drivers/video/logo/Makefile
+++ b/drivers/video/logo/Makefile
@@ -5,8 +5,6 @@ obj-$(CONFIG_LOGO) += logo.o
obj-$(CONFIG_LOGO_LINUX_MONO) += logo_linux_mono.o
obj-$(CONFIG_LOGO_LINUX_VGA16) += logo_linux_vga16.o
obj-$(CONFIG_LOGO_LINUX_CLUT224) += logo_linux_clut224.o
-obj-$(CONFIG_LOGO_BLACKFIN_CLUT224) += logo_blackfin_clut224.o
-obj-$(CONFIG_LOGO_BLACKFIN_VGA16) += logo_blackfin_vga16.o
obj-$(CONFIG_LOGO_DEC_CLUT224) += logo_dec_clut224.o
obj-$(CONFIG_LOGO_MAC_CLUT224) += logo_mac_clut224.o
obj-$(CONFIG_LOGO_PARISC_CLUT224) += logo_parisc_clut224.o
@@ -15,7 +13,6 @@ obj-$(CONFIG_LOGO_SUN_CLUT224) += logo_sun_clut224.o
obj-$(CONFIG_LOGO_SUPERH_MONO) += logo_superh_mono.o
obj-$(CONFIG_LOGO_SUPERH_VGA16) += logo_superh_vga16.o
obj-$(CONFIG_LOGO_SUPERH_CLUT224) += logo_superh_clut224.o
-obj-$(CONFIG_LOGO_M32R_CLUT224) += logo_m32r_clut224.o
obj-$(CONFIG_SPU_BASE) += logo_spe_clut224.o
diff --git a/drivers/video/logo/logo.c b/drivers/video/logo/logo.c
index 4d50bfd13e7c..36aa050f9a21 100644
--- a/drivers/video/logo/logo.c
+++ b/drivers/video/logo/logo.c
@@ -63,10 +63,6 @@ const struct linux_logo * __ref fb_find_logo(int depth)
/* Generic Linux logo */
logo = &logo_linux_vga16;
#endif
-#ifdef CONFIG_LOGO_BLACKFIN_VGA16
- /* Blackfin processor logo */
- logo = &logo_blackfin_vga16;
-#endif
#ifdef CONFIG_LOGO_SUPERH_VGA16
/* SuperH Linux logo */
logo = &logo_superh_vga16;
@@ -78,10 +74,6 @@ const struct linux_logo * __ref fb_find_logo(int depth)
/* Generic Linux logo */
logo = &logo_linux_clut224;
#endif
-#ifdef CONFIG_LOGO_BLACKFIN_CLUT224
- /* Blackfin Linux logo */
- logo = &logo_blackfin_clut224;
-#endif
#ifdef CONFIG_LOGO_DEC_CLUT224
/* DEC Linux logo on MIPS/MIPS64 or ALPHA */
logo = &logo_dec_clut224;
@@ -107,10 +99,6 @@ const struct linux_logo * __ref fb_find_logo(int depth)
/* SuperH Linux logo */
logo = &logo_superh_clut224;
#endif
-#ifdef CONFIG_LOGO_M32R_CLUT224
- /* M32R Linux logo */
- logo = &logo_m32r_clut224;
-#endif
}
return logo;
}
diff --git a/drivers/video/logo/logo_blackfin_clut224.ppm b/drivers/video/logo/logo_blackfin_clut224.ppm
deleted file mode 100644
index dc9a50a14477..000000000000
--- a/drivers/video/logo/logo_blackfin_clut224.ppm
+++ /dev/null
@@ -1,1127 +0,0 @@
-P3
-# This was generated by the GIMP & Netpbm tools
-# gimp linux_bf.svg (create 80x80 save as linux_bf.ppm)
-# pnmquant 224 linux_bf.ppm | pnmnoraw > logo_blackfin_clut224.ppm
-#
-80 80
-255
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-1 1 1 3 3 3 4 6 6 6 6 6 4 6 6 3 3 3
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 2 2 2 10 10 10 26 26 27
-44 44 45 66 66 66 78 81 81 78 81 81 75 75 76 60 60 60
-39 39 39 20 20 20 6 6 6 1 1 1 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 2 2 2 14 14 14 47 47 47 84 84 84 75 75 76
-47 47 47 12 12 12 0 0 0 0 0 0 0 0 0 20 20 20
-53 54 54 81 81 82 74 74 74 31 31 31 6 6 6 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-4 4 4 34 34 35 84 84 84 60 60 60 4 4 4 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 17 18 18 75 75 76 66 66 66 17 18 18
-1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 3 3
-42 42 43 84 84 84 8 8 8 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 3 3 36 40 40 10 16 16 0 0 0 31 31 31 84 84 84
-29 29 30 2 2 2 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 26 27 27
-84 84 84 3 3 3 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-15 19 19 114 115 115 110 114 114 44 46 46 0 0 0 12 12 12
-90 87 86 24 24 24 1 1 1 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 8 8 8 75 75 76
-14 14 14 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-30 40 40 133 133 133 129 130 130 78 85 85 23 31 30 0 0 0
-19 19 19 78 81 81 13 13 13 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 26 27 27 81 81 82
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-36 40 40 89 90 91 55 63 63 23 31 30 4 6 6 0 0 0
-0 0 0 60 60 60 47 47 47 2 2 2 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 2 2 2 53 54 54 34 34 35
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-4 10 10 7 9 9 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 1 1 1 84 84 84 13 13 13 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 4 6 6 78 81 81 2 2 2
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 65 64 64 36 36 36 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 10 11 11 81 81 82 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 12 12 12 67 70 70 4 4 4 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 16 16 16 81 81 82 0 0 0
-0 0 0 0 0 0 4 10 10 44 50 50 18 21 21 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 1 1 78 85 85 120 121 122 7 9 9 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 82 82 81 12 12 12 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 19 19 19 81 81 82 0 0 0
-0 0 0 2 2 2 8 8 8 55 63 63 108 110 110 52 58 58
-0 0 0 0 0 0 0 0 0 0 0 0 42 42 43 129 130 130
-140 142 143 114 115 115 110 114 114 129 130 130 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 75 75 76 24 24 24 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 19 19 19 74 74 74 0 0 0
-4 6 6 167 168 167 196 196 197 196 196 197 61 65 66 78 85 85
-0 0 0 0 0 0 0 0 0 118 118 118 202 202 203 219 219 219
-219 219 219 214 214 215 187 187 188 78 85 85 29 33 34 0 0 0
-0 0 0 0 0 0 0 0 0 60 60 60 39 39 39 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 19 19 19 72 71 71 0 0 0
-185 185 184 244 245 245 250 251 252 251 251 252 247 248 249 36 36 36
-0 0 0 0 0 0 13 13 13 243 243 241 252 252 252 253 253 253
-253 253 253 252 252 252 247 247 246 193 193 194 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 42 42 43 50 51 51 1 1 1
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 19 19 19 78 81 81 0 0 0
-247 247 246 193 193 194 95 97 97 193 193 194 255 255 255 237 237 238
-0 0 0 0 0 0 202 202 203 255 255 255 247 247 246 108 107 107
-82 85 86 167 168 167 255 255 255 248 248 249 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 34 34 35 56 56 56 2 2 2
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 19 19 19 78 81 81 0 0 0
-250 250 251 50 51 51 153 154 155 150 151 151 244 245 245 244 245 245
-44 50 50 84 89 89 153 154 155 255 255 255 140 142 143 0 0 0
-149 149 150 156 155 156 237 237 238 254 254 254 67 70 70 0 0 0
-0 0 0 0 0 0 0 0 0 39 39 39 47 47 47 1 1 1
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 19 19 19 81 81 82 0 0 0
-248 248 249 34 34 35 72 71 71 165 165 165 202 202 203 244 245 245
-10 16 16 82 85 86 89 90 91 255 255 255 95 97 97 0 0 0
-0 0 0 53 54 54 177 177 174 255 255 255 127 127 126 0 0 0
-0 0 0 0 0 0 0 0 0 39 39 39 36 36 36 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 14 14 14 78 81 81 0 0 0
-243 243 243 89 90 91 0 0 0 36 40 40 201 147 55 241 205 27
-241 205 27 241 205 27 241 205 27 238 192 33 108 110 110 0 0 0
-0 0 0 0 0 0 191 190 190 254 254 254 34 34 35 0 0 0
-0 0 0 0 0 0 0 0 0 42 42 43 42 42 43 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 10 10 10 75 75 76 0 0 0
-202 202 203 218 217 217 21 19 17 230 165 41 199 129 48 213 157 40
-244 212 23 243 206 27 180 121 62 243 206 27 244 209 25 226 179 40
-15 10 7 103 103 103 254 254 254 251 251 252 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 17 18 18 58 58 58 2 2 2
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 9 9 9 84 84 84 0 0 0
-0 0 0 226 226 219 213 157 40 244 209 25 245 211 23 245 211 23
-245 214 38 245 214 38 245 211 23 245 211 23 245 211 23 244 212 23
-244 212 23 241 205 27 226 179 40 196 196 197 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 74 74 74 4 6 6
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 7 7 7 84 84 84 0 0 0
-54 42 32 213 157 40 243 206 27 245 211 23 245 211 23 245 211 23
-245 215 41 245 214 35 245 211 23 245 211 23 245 214 35 245 215 41
-245 214 35 245 211 23 245 211 23 238 204 29 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 81 81 82 12 12 12
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 4 6 6 74 74 74 0 0 0
-201 147 55 241 205 27 245 211 23 245 211 23 245 211 23 245 213 29
-245 214 38 245 211 23 245 211 23 245 214 35 245 215 41 245 215 41
-245 213 29 142 83 36 142 83 36 244 209 25 1 1 1 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 74 74 74 25 25 26
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 4 4 4 72 71 71 6 6 6
-213 157 40 244 209 25 245 211 23 245 211 23 245 211 23 245 213 29
-244 212 23 245 211 23 245 214 35 245 215 41 245 215 41 245 213 29
-142 83 36 142 83 36 238 192 33 241 205 27 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 44 44 44 49 50 50
-2 2 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 3 3 3 65 64 64 17 18 18
-199 129 48 199 129 48 245 211 23 245 211 23 245 211 23 245 211 23
-245 211 23 244 212 23 245 214 38 245 214 38 142 83 36 142 83 36
-142 83 36 245 211 23 244 210 23 230 165 41 0 0 0 0 0 0
-78 81 81 114 115 115 73 79 79 0 0 0 3 3 3 81 81 82
-9 9 9 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 1 1 1 49 50 50 29 29 30
-90 87 86 199 129 48 173 101 51 173 101 51 245 211 23 245 211 23
-245 211 23 230 165 41 142 83 36 142 83 36 142 83 36 245 211 23
-244 210 23 241 205 27 230 165 41 175 173 165 3 3 3 0 0 0
-44 46 46 118 118 118 118 118 118 108 110 110 0 0 0 75 75 76
-28 28 28 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 1 1 1 52 53 53 26 26 27
-118 118 118 175 173 165 199 129 48 173 101 51 173 101 51 173 101 51
-173 101 51 142 83 36 173 101 51 245 211 23 244 209 25 238 204 29
-213 157 40 214 196 166 227 227 227 214 214 215 120 121 122 0 0 0
-0 0 0 108 110 110 118 118 118 118 118 118 0 0 0 23 23 23
-66 66 66 4 6 6 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 7 7 7 75 75 76 4 4 4
-127 127 126 205 205 205 181 181 181 199 129 48 226 179 40 244 209 25
-244 209 25 244 209 25 243 206 27 238 192 33 213 157 40 187 166 103
-234 234 234 248 248 249 251 252 252 248 248 249 214 214 215 0 0 0
-0 0 0 0 0 0 103 103 103 100 103 103 0 0 0 0 0 0
-78 81 81 24 24 24 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 26 27 27 82 82 81 0 0 0
-146 146 147 234 234 234 222 221 221 178 178 179 180 121 62 213 157 40
-213 157 40 213 157 40 201 147 55 180 121 62 219 219 219 243 243 241
-253 253 253 255 255 255 255 255 255 255 255 255 250 250 251 120 121 122
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-20 20 20 72 71 71 8 8 8 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 10 10 10 75 75 76 22 22 22 0 0 0
-205 205 205 253 253 253 247 248 249 212 211 212 178 178 179 161 161 162
-165 165 165 181 181 181 205 205 205 227 227 227 244 245 245 254 254 254
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 239 239 240
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 67 70 70 39 39 39 2 2 2 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 4 4 4 50 51 51 60 60 60 0 0 0 16 16 16
-249 250 251 255 255 255 255 255 255 240 240 240 209 210 210 193 193 194
-200 200 197 212 211 212 231 231 231 246 247 248 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 253 253 253
-153 154 155 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 3 3 3 84 84 84 20 20 20 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-2 2 2 33 33 34 81 81 82 0 0 0 0 0 0 231 231 231
-255 255 255 255 255 255 255 255 255 253 253 253 234 234 234 222 221 221
-227 227 227 237 237 238 250 250 251 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-240 240 240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 26 27 27 72 71 71 8 8 8 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1
-21 21 22 84 84 84 7 7 7 0 0 0 150 151 151 252 252 252
-255 255 255 255 255 255 255 255 255 255 255 255 252 252 252 244 245 245
-246 247 248 253 253 253 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-251 251 252 9 9 9 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 65 64 64 47 47 47 3 3 3
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12 12 12
-75 75 76 26 26 27 0 0 0 1 1 1 239 239 240 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 202 202 203 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 84 84 84 28 28 29
-1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 4 4 4 55 55 55
-60 60 60 0 0 0 0 0 0 95 97 97 248 248 249 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 244 245 245 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 14 14 14 82 82 81
-15 15 15 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 1 1 1 29 29 30 84 84 84
-0 0 0 0 0 0 0 0 0 156 155 156 247 247 246 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 247 247 246 240 240 240 232 232 233 232 232 233
-243 243 243 253 253 253 53 54 54 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 44 44 44
-60 60 60 6 6 6 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 10 10 10 81 81 82 14 14 14
-0 0 0 0 0 0 6 6 6 150 151 151 214 214 215 250 251 252
-255 255 255 255 255 255 255 255 255 246 247 248 218 217 217 214 214 215
-218 217 217 244 245 245 255 255 255 255 255 255 255 255 255 250 248 249
-232 232 233 214 214 215 196 196 197 182 183 184 181 181 181 181 181 181
-187 187 188 240 240 240 232 232 233 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-78 81 81 34 34 35 1 1 1 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 1 1 1 39 39 39 74 74 74 0 0 0
-0 0 0 0 0 0 60 60 60 161 161 162 200 200 197 229 229 230
-251 251 252 255 255 255 255 255 255 255 255 255 243 243 241 214 214 215
-248 248 249 255 255 255 255 255 255 255 255 255 255 255 255 254 254 254
-239 239 240 214 214 215 193 193 194 182 183 184 178 178 179 176 177 177
-176 177 177 182 183 184 248 248 249 14 14 14 0 0 0 61 65 66
-10 16 16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-10 10 10 84 84 84 13 13 13 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 10 11 11 82 82 81 7 7 7 0 0 0
-0 0 0 0 0 0 165 165 165 229 229 230 249 250 251 254 254 254
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 253 253 253 240 240 240 227 227 227 205 205 205
-181 181 181 176 177 177 191 190 190 227 227 227 0 0 0 44 50 50
-84 89 89 61 65 66 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 58 58 58 49 50 50 3 3 3 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 1 1 1 36 36 36 66 66 66 0 0 0 29 33 34
-0 3 3 26 27 27 234 234 234 254 254 254 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-254 254 254 253 253 254 252 253 253 253 253 254 253 254 254 253 254 254
-254 254 254 255 255 255 255 255 255 255 255 255 255 255 255 251 251 252
-227 227 227 187 187 188 176 177 177 222 221 221 13 13 13 0 0 0
-12 15 14 73 79 79 36 40 40 0 0 0 0 0 0 0 0 0
-0 0 0 1 1 1 90 87 86 17 18 18 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 7 7 7 78 81 81 12 12 12 23 31 30 52 58 58
-0 0 0 209 210 210 253 253 253 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 254 254 254
-251 251 252 150 151 151 103 103 103 129 130 130 196 196 197 250 250 251
-252 252 253 254 254 254 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 240 240 240 193 193 194 196 196 197 229 229 230 0 0 0
-0 0 0 4 10 10 30 40 40 0 3 3 0 0 0 0 0 0
-0 0 0 0 0 0 47 47 47 53 54 54 3 3 3 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 23 23 23 81 81 82 0 0 0 52 58 58 36 40 40
-42 42 43 250 250 251 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 254 254 254
-227 227 227 7 7 7 7 7 7 7 7 7 7 7 7 44 44 45
-156 155 156 249 250 251 253 253 253 254 254 254 255 255 255 255 255 255
-255 255 255 255 255 255 247 247 246 222 221 221 239 239 240 0 0 0
-30 40 40 44 50 50 23 31 30 29 33 34 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 90 87 86 16 16 16 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-2 2 2 50 51 51 42 42 43 29 33 34 52 58 58 0 0 0
-232 232 233 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 254 254 254
-250 251 252 44 44 44 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 56 56 56 209 210 210 252 252 253 254 254 254 255 255 255
-255 255 255 255 255 255 255 255 255 254 253 253 249 250 251 146 146 147
-36 40 40 44 50 50 36 40 40 67 70 70 61 65 66 0 0 0
-0 0 0 0 0 0 0 0 0 55 55 55 44 44 45 1 1 1
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-10 10 10 81 81 82 1 1 1 52 58 58 44 50 50 52 53 53
-251 251 252 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 254 254 254
-253 253 253 187 187 188 8 8 8 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 19 19 19 178 178 179 252 252 253 254 254 254
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 237 237 238
-10 16 16 30 40 40 0 3 3 23 31 30 84 89 89 0 0 0
-0 0 0 0 0 0 0 0 0 3 3 3 81 81 82 9 9 9
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-29 29 30 72 71 71 10 16 16 52 58 58 0 0 0 222 221 221
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-254 254 254 251 251 252 95 97 97 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 10 10 10 161 161 162 251 252 252
-254 254 254 255 255 255 255 255 255 255 255 255 255 255 255 248 248 249
-0 0 0 0 0 0 0 0 0 0 0 0 84 89 89 0 3 3
-0 0 0 0 0 0 0 0 0 0 0 0 74 74 74 26 27 27
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 4 4
-65 64 64 20 20 20 20 25 25 30 40 40 0 0 0 247 247 246
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 253 253 254 222 221 221 9 9 9 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 8 8 8 149 149 150
-252 252 253 254 254 254 255 255 255 255 255 255 255 255 255 252 252 252
-0 0 0 0 0 0 0 0 0 0 0 0 73 79 79 12 15 14
-0 0 0 0 0 0 0 0 0 0 0 0 36 36 36 58 58 58
-3 3 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 20 20 20
-74 74 74 0 0 0 4 10 10 4 10 10 36 36 36 252 252 252
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 227 227 227 253 253 253 255 255 255
-255 255 255 254 254 254 250 251 252 65 64 64 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 8 8 8
-146 146 147 251 252 252 254 254 254 255 255 255 255 255 255 253 254 254
-0 0 0 0 0 0 0 0 0 0 0 0 52 58 58 10 16 16
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 82 82 81
-9 9 9 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 4 6 6 65 64 64
-25 25 25 0 3 3 30 40 40 0 0 0 187 187 188 254 254 254
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 193 193 194 253 252 252 255 255 255
-255 255 255 255 255 255 252 253 253 129 130 130 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-8 8 8 149 149 150 252 252 253 254 254 254 255 255 255 254 254 254
-52 53 53 0 0 0 0 0 0 0 0 0 20 25 25 2 5 4
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 81 81 82
-20 20 20 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 26 26 27 81 81 82
-0 0 0 18 21 21 73 79 79 0 0 0 237 237 238 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 182 183 184 255 255 255 255 255 255
-255 255 255 255 255 255 253 253 253 176 177 177 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 8 8 8 153 154 155 251 252 252 254 254 254 255 255 255
-150 151 151 0 0 0 0 0 0 0 0 0 20 25 25 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 65 64 64
-33 33 34 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 6 6 6 67 70 70 20 20 20
-0 0 0 23 31 30 82 85 86 0 0 0 247 247 246 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 182 183 184 255 255 255 255 255 255
-255 255 255 255 255 255 253 254 254 214 214 215 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 8 8 8 156 155 156 252 252 253 254 254 254
-167 168 167 0 0 0 0 0 0 0 0 0 67 70 70 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 47 47 47
-44 44 44 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 21 21 22 75 75 76 0 0 0
-0 0 0 29 33 34 84 89 89 0 0 0 248 248 249 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 248 248 249 181 181 181 255 255 255 255 255 255
-255 255 255 255 255 255 254 254 254 240 240 240 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 8 8 8 161 161 162 251 252 252
-185 185 184 4 4 4 0 0 0 10 11 11 100 103 103 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 36 36 36
-55 55 55 2 2 2 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 33 33 34 50 51 51 0 0 0
-0 0 0 9 11 11 82 85 86 10 16 16 248 248 249 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 245 244 245 179 180 181 255 255 255 255 255 255
-255 255 255 255 255 255 254 254 254 251 252 252 20 20 20 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 10 10 10 161 161 162
-205 205 205 17 18 18 0 0 0 95 97 97 78 81 81 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 36 36 36
-53 54 54 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 31 31 31 58 58 58 0 0 0
-0 0 0 0 0 0 67 70 70 78 81 81 248 248 249 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 234 234 234 179 180 181 255 255 255 255 255 255
-255 255 255 255 255 255 254 254 254 251 252 252 23 23 23 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-10 11 11 84 84 84 161 161 162 209 210 210 229 229 230 237 237 238
-202 202 203 26 26 27 9 11 11 44 50 50 0 0 0 4 6 6
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 52 53 53
-39 39 39 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 23 23 23 78 81 81 213 157 40
-243 206 27 243 206 27 54 42 32 73 79 79 222 221 221 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 238 238 236 178 178 179 255 255 255 255 255 255
-255 255 255 255 255 255 254 254 254 251 252 253 36 36 36 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 84 84 84
-222 221 221 251 252 252 252 253 253 253 253 253 253 254 254 252 252 253
-146 146 147 140 142 143 156 155 156 110 114 114 26 27 27 82 85 86
-84 89 89 95 97 97 36 40 40 0 0 0 0 0 0 74 74 74
-23 23 23 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 2 2 2 14 14 14
-24 24 24 26 26 27 26 26 27 26 26 27 25 25 26 21 21 22
-7 7 7 0 0 0 1 1 1 34 34 35 238 192 33 244 210 23
-244 212 23 244 212 23 244 210 23 88 79 47 200 200 197 254 254 254
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 244 245 245 179 180 181 255 255 255 255 255 255
-255 255 255 255 255 255 254 254 254 252 252 253 36 36 36 7 7 7
-7 7 7 7 7 7 7 7 7 8 8 8 149 149 150 251 251 252
-252 252 253 253 253 253 253 253 253 250 248 249 239 223 156 239 223 156
-120 121 122 182 183 184 176 177 177 120 121 122 33 33 34 3 3 3
-0 0 0 67 70 70 146 146 147 20 25 25 1 1 1 82 82 81
-9 9 9 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 19 19 19 89 90 91
-146 146 147 150 151 151 150 151 151 150 151 151 150 151 151 129 130 130
-58 58 58 6 6 6 14 14 14 201 147 55 245 211 23 245 213 29
-245 214 35 245 215 41 245 213 29 244 210 23 142 83 36 232 232 233
-254 254 254 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 185 185 184 255 255 255 255 255 255
-255 255 255 255 255 255 254 254 254 251 252 252 50 51 51 7 7 7
-7 7 7 7 7 7 7 7 7 146 146 147 251 252 252 252 253 253
-251 252 253 239 239 240 171 168 154 129 130 130 137 136 134 175 173 165
-221 218 200 65 64 64 22 22 22 186 186 187 114 115 115 26 26 27
-2 2 2 0 0 0 61 65 66 31 33 27 238 192 33 108 96 91
-9 9 9 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 2 2 2 52 53 53 178 178 179
-21 21 22 7 7 7 7 7 7 7 7 7 7 7 7 118 118 118
-137 136 134 36 36 36 65 64 64 243 206 27 244 212 23 245 215 41
-245 215 41 245 215 41 245 215 41 244 209 25 244 209 25 1 1 1
-219 219 219 253 253 253 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 214 214 215 255 255 255 255 255 255
-255 255 255 255 255 255 254 254 254 252 252 253 50 51 51 7 7 7
-7 7 7 7 7 7 84 84 84 250 251 252 252 253 253 251 251 252
-167 168 167 22 22 22 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 34 34 35 187 187 188 103 103 103
-29 29 30 3 3 3 7 9 9 238 204 29 245 215 41 245 214 35
-28 28 28 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 7 7 7 90 87 86 178 178 179
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 16 16 16
-193 193 194 133 133 133 187 166 103 245 218 76 245 218 76 245 216 51
-245 216 51 245 218 76 246 224 96 245 218 76 245 218 76 245 218 76
-25 25 25 186 186 187 252 252 252 254 254 254 254 254 254 253 254 254
-254 254 254 254 254 254 254 254 254 246 247 248 254 254 254 253 254 254
-254 254 254 254 254 254 253 254 254 251 252 252 36 36 36 7 7 7
-7 7 7 20 20 20 229 229 230 253 253 253 252 253 253 178 178 179
-10 10 10 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 42 42 43 196 196 197
-118 118 118 33 33 34 238 204 29 245 215 41 245 215 41 245 215 41
-49 50 50 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 17 18 18 120 121 122 137 136 134
-7 7 7 7 7 7 34 34 35 20 20 20 7 7 7 7 7 7
-202 202 203 209 206 202 193 187 162 193 187 162 248 234 156 245 218 76
-245 218 76 248 234 156 193 187 162 193 187 162 193 187 162 214 196 166
-240 219 129 95 97 97 196 196 197 186 186 187 187 187 188 196 196 197
-252 252 253 251 252 253 212 211 212 187 187 188 196 196 197 251 252 252
-218 217 217 187 187 188 191 190 190 250 251 252 24 24 24 7 7 7
-7 7 7 110 114 114 252 252 253 253 254 254 250 251 252 89 90 91
-89 90 91 129 130 130 127 127 126 44 44 44 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 49 50 50
-202 202 203 214 196 166 245 216 51 245 214 38 245 214 35 245 214 38
-58 58 58 2 2 2 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 31 31 31 156 155 156 82 82 81
-7 7 7 10 10 10 237 237 238 66 66 66 7 7 7 25 25 25
-247 248 249 81 81 82 7 7 7 31 31 31 247 237 174 245 218 76
-246 226 108 200 200 197 7 7 7 7 7 7 7 7 7 137 136 134
-247 237 174 193 193 194 72 71 71 7 7 7 7 7 7 8 8 8
-196 196 197 250 251 252 67 70 70 7 7 7 84 84 84 244 245 245
-47 47 47 7 7 7 118 118 118 249 250 251 12 12 12 7 7 7
-9 9 9 218 217 217 253 253 253 254 254 254 252 253 253 251 251 252
-249 250 251 237 237 238 95 97 97 9 9 9 15 15 15 95 97 97
-47 47 47 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-66 66 66 240 230 197 246 226 108 245 214 38 245 211 23 244 212 23
-65 64 64 3 3 3 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 2 2 2 52 53 53 185 185 184 25 25 25
-7 7 7 60 60 60 240 240 240 14 14 14 7 7 7 84 84 84
-247 248 249 23 23 23 7 7 7 94 91 88 248 234 156 245 218 76
-248 234 156 127 127 126 7 7 7 7 7 7 7 7 7 167 168 167
-251 248 240 65 64 64 7 7 7 7 7 7 7 7 7 7 7 7
-84 84 84 243 243 243 15 15 15 7 7 7 140 142 143 146 146 147
-7 7 7 33 33 34 237 237 238 243 243 243 21 21 22 120 121 122
-218 217 217 252 252 253 254 254 254 253 253 254 252 253 253 251 252 252
-247 248 249 72 71 71 7 7 7 58 58 58 222 221 221 248 248 249
-75 75 76 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 82 82 81 246 239 193 246 226 108 245 216 51 245 214 38
-238 192 33 21 21 22 1 1 1 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 8 8 8 90 87 86 182 183 184 7 7 7
-7 7 7 120 121 122 187 187 188 7 7 7 7 7 7 146 146 147
-205 205 205 7 7 7 7 7 7 153 153 148 240 219 129 246 224 96
-246 239 193 39 39 39 60 60 60 108 110 110 7 7 7 202 202 203
-227 227 227 7 7 7 7 7 7 205 205 205 89 90 91 7 7 7
-120 121 122 193 193 194 7 7 7 7 7 7 186 186 187 25 25 25
-7 7 7 167 168 167 251 251 252 243 243 243 214 214 215 250 251 252
-251 252 253 254 254 254 253 253 253 219 219 219 140 140 139 140 140 139
-118 118 118 7 7 7 52 53 53 237 237 238 247 247 246 176 177 177
-8 8 8 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 95 97 97 246 239 193 246 226 108 245 216 51
-245 214 38 201 147 55 31 31 31 103 103 103 103 103 103 72 71 71
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 17 18 18 127 127 126 140 140 139 7 7 7
-7 7 7 17 18 18 17 18 18 7 7 7 95 97 97 244 245 245
-146 146 147 7 7 7 7 7 7 200 200 197 246 226 108 240 219 129
-194 194 184 7 7 7 140 140 139 89 90 91 7 7 7 232 232 233
-165 165 165 7 7 7 31 31 31 249 250 251 39 39 39 7 7 7
-176 177 177 133 133 133 7 7 7 22 22 22 108 110 110 7 7 7
-72 71 71 251 252 252 252 253 253 250 251 252 247 248 249 205 205 205
-251 252 253 254 254 254 252 252 253 84 84 84 7 7 7 7 7 7
-7 7 7 7 7 7 140 142 143 247 248 249 140 140 139 14 14 14
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 16 16 16
-14 14 14 7 7 7 7 7 7 114 115 115 246 239 193 246 224 96
-245 216 51 245 216 51 243 235 220 176 177 177 185 185 184 229 229 230
-47 47 47 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 31 31 31 156 155 156 90 87 86 7 7 7
-7 7 7 7 7 7 7 7 7 31 31 31 243 243 241 247 247 246
-84 84 84 7 7 7 26 27 27 246 239 193 246 226 108 248 234 156
-108 110 110 7 7 7 212 211 212 44 44 44 22 22 22 249 250 251
-108 107 107 7 7 7 89 90 91 238 238 236 114 115 115 118 118 118
-231 231 231 75 75 76 7 7 7 34 34 35 10 11 11 12 12 12
-214 214 215 253 253 253 253 253 253 200 200 197 31 31 31 103 103 103
-252 252 253 252 253 253 218 217 217 9 9 9 7 7 7 7 7 7
-7 7 7 7 7 7 25 25 25 39 39 39 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 103 103 103 234 234 234
-181 181 181 7 7 7 7 7 7 7 7 7 133 133 133 247 237 174
-246 224 96 246 226 108 185 185 184 177 177 174 153 154 155 181 181 181
-140 140 139 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 1 1 1 49 50 50 186 186 187 28 28 28 7 7 7
-12 12 12 22 22 22 7 7 7 7 7 7 108 107 107 247 247 246
-25 25 25 7 7 7 90 87 86 247 237 174 246 226 108 246 239 193
-28 28 28 44 44 44 237 237 238 9 9 9 53 54 54 249 250 251
-49 50 50 7 7 7 153 153 148 249 241 199 214 196 166 185 185 184
-229 229 230 19 19 19 7 7 7 7 7 7 7 7 7 103 103 103
-251 252 253 254 254 254 253 253 253 150 151 151 7 7 7 187 187 188
-252 252 253 251 251 252 103 103 103 7 7 7 7 7 7 7 7 7
-7 7 7 23 23 23 17 18 18 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 12 12 12 153 153 148 246 239 193 249 241 199
-161 161 162 9 9 9 84 84 84 108 110 110 25 25 25 153 153 148
-247 237 174 246 224 96 218 217 217 165 165 165 182 183 184 193 193 194
-114 115 115 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 4 4 4 74 74 74 181 181 181 7 7 7 7 7 7
-110 114 114 200 200 197 7 7 7 7 7 7 60 60 60 209 210 210
-7 7 7 7 7 7 146 146 147 248 234 156 248 234 156 177 177 174
-7 7 7 118 118 118 193 193 194 7 7 7 84 84 84 232 232 233
-8 8 8 7 7 7 209 210 210 221 218 200 193 187 162 219 219 219
-200 200 197 7 7 7 7 7 7 7 7 7 7 7 7 95 97 97
-251 252 252 254 254 254 252 253 253 118 118 118 29 29 30 247 248 249
-252 252 253 227 227 227 16 16 16 7 7 7 7 7 7 7 7 7
-100 103 103 218 217 217 219 218 214 7 7 7 7 7 7 7 7 7
-7 7 7 21 21 22 185 185 184 246 239 193 248 234 156 240 230 197
-60 60 60 194 194 184 246 239 193 249 241 199 137 136 134 10 10 10
-171 168 154 248 234 156 248 234 156 226 226 219 209 210 210 249 241 199
-28 28 28 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 13 13 13 108 110 110 146 146 147 7 7 7 7 7 7
-167 168 167 140 140 139 7 7 7 7 7 7 120 121 122 146 146 147
-7 7 7 7 7 7 194 194 184 240 219 129 247 237 174 95 97 97
-7 7 7 95 97 97 90 87 86 7 7 7 118 118 118 176 177 177
-7 7 7 28 28 28 248 248 249 44 44 45 7 7 7 167 168 167
-140 140 139 7 7 7 36 36 36 74 74 74 7 7 7 65 64 64
-251 252 253 254 254 254 251 252 252 81 81 82 108 110 110 251 252 252
-251 251 252 127 127 126 7 7 7 7 7 7 8 8 8 140 140 139
-181 181 181 140 140 139 221 218 200 7 7 7 7 7 7 7 7 7
-34 34 35 209 210 210 231 231 231 246 239 193 247 237 174 194 194 184
-227 227 227 249 241 199 240 219 129 248 234 156 153 153 148 7 7 7
-13 13 13 185 185 184 248 234 156 245 218 76 245 216 51 245 214 38
-31 31 31 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 31 31 31 153 154 155 89 90 91 7 7 7 8 8 8
-232 232 233 82 82 81 7 7 7 7 7 7 179 180 181 89 90 91
-7 7 7 24 24 24 243 235 220 248 234 156 240 230 197 20 20 20
-7 7 7 7 7 7 7 7 7 7 7 7 149 149 150 118 118 118
-7 7 7 90 87 86 229 229 230 7 7 7 7 7 7 229 229 230
-82 82 81 7 7 7 95 97 97 100 103 103 7 7 7 34 34 35
-251 252 252 253 253 254 251 251 252 47 47 47 193 193 194 251 252 252
-239 239 240 23 23 23 7 7 7 13 13 13 165 165 165 234 234 234
-149 149 150 146 114 101 200 200 197 7 7 7 7 7 7 52 53 53
-227 227 227 167 168 167 16 16 16 214 196 166 248 234 156 243 235 220
-219 219 219 156 155 156 247 237 174 246 239 193 75 75 76 7 7 7
-60 60 60 227 227 227 243 235 220 240 219 129 245 218 76 245 213 29
-16 16 16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-1 1 1 49 50 50 185 185 184 33 33 34 7 7 7 10 11 11
-56 56 56 16 16 16 7 7 7 10 10 10 237 237 238 26 27 27
-7 7 7 55 55 55 185 185 184 221 218 200 167 168 167 7 7 7
-20 20 20 39 39 39 10 11 11 7 7 7 181 181 181 58 58 58
-7 7 7 103 103 103 133 133 133 7 7 7 44 44 44 247 248 249
-24 24 24 7 7 7 156 155 156 129 130 130 7 7 7 9 9 9
-244 245 245 252 253 253 237 237 238 34 34 35 248 248 249 251 251 252
-161 161 162 7 7 7 24 24 24 187 187 188 212 211 212 67 70 70
-187 187 188 173 170 143 209 206 202 10 10 10 95 97 97 237 237 238
-129 130 130 8 8 8 89 90 91 246 239 193 247 237 174 177 177 174
-17 18 18 137 136 134 249 241 199 219 218 214 10 10 10 95 97 97
-243 243 243 150 151 151 31 31 31 221 218 200 240 219 129 53 54 54
-3 3 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-4 4 4 72 71 71 182 183 184 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 12 12 12 161 161 162 209 210 210 7 7 7
-7 7 7 7 7 7 7 7 7 187 187 188 82 82 81 7 7 7
-146 146 147 247 248 249 17 18 18 7 7 7 212 211 212 47 47 47
-7 7 7 7 7 7 7 7 7 8 8 8 146 146 147 205 205 205
-7 7 7 7 7 7 214 214 215 156 155 156 7 7 7 7 7 7
-218 217 217 251 252 252 186 186 187 110 114 114 249 250 251 248 248 249
-75 75 76 34 34 35 205 205 205 129 130 130 16 16 16 7 7 7
-156 155 156 214 196 166 240 230 197 243 243 241 227 227 227 74 74 74
-7 7 7 29 29 30 226 226 219 249 241 199 175 173 165 14 14 14
-9 9 9 221 218 200 246 239 193 153 153 148 146 146 147 246 247 248
-110 114 114 7 7 7 7 7 7 42 42 43 193 193 194 95 97 97
-19 19 19 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-6 6 6 84 84 84 140 142 143 7 7 7 7 7 7 7 7 7
-7 7 7 20 20 20 177 177 174 249 241 199 149 149 150 7 7 7
-7 7 7 7 7 7 10 11 11 226 226 219 13 13 13 8 8 8
-219 218 214 219 218 214 7 7 7 8 8 8 238 238 236 200 200 197
-13 13 13 7 7 7 13 13 13 161 161 162 243 235 220 146 146 147
-7 7 7 29 29 30 232 232 233 176 177 177 7 7 7 7 7 7
-182 183 184 237 237 238 129 130 130 167 168 167 176 177 177 202 202 203
-10 11 11 95 97 97 44 44 45 7 7 7 7 7 7 7 7 7
-75 75 76 226 226 219 243 235 220 156 155 156 24 24 24 7 7 7
-7 7 7 176 177 177 247 247 246 200 200 197 17 18 18 7 7 7
-49 50 50 246 239 193 248 234 156 251 248 240 239 239 240 84 84 84
-7 7 7 7 7 7 7 7 7 7 7 7 60 60 60 187 187 188
-84 84 84 14 14 14 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-4 4 4 53 54 54 137 136 134 156 155 156 161 161 162 161 161 162
-167 168 167 239 223 156 240 219 129 246 226 108 239 223 156 239 223 156
-239 223 156 239 223 156 214 196 166 239 223 156 193 187 162 193 187 162
-248 234 156 239 223 156 193 187 162 193 187 162 248 234 156 248 234 156
-214 196 166 193 187 162 214 196 166 248 234 156 240 219 129 214 196 166
-193 187 162 193 187 162 171 168 154 146 146 147 137 136 134 137 136 134
-161 161 162 209 210 210 65 64 64 202 202 203 179 180 181 140 140 139
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 60 60 60 39 39 39 7 7 7 7 7 7 7 7 7
-66 66 66 249 250 251 202 202 203 16 16 16 7 7 7 7 7 7
-23 23 23 243 235 220 246 239 193 226 226 219 52 53 53 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 75 75 76
-176 177 177 66 66 66 9 9 9 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 10 10 10 28 28 29 34 34 35 36 36 36 36 36 36
-44 44 45 146 114 101 241 207 50 241 207 50 241 207 50 241 211 63
-241 211 63 241 211 63 241 211 63 241 211 63 241 211 63 245 216 51
-245 216 51 245 216 51 241 211 63 241 211 63 245 216 51 241 211 63
-245 218 76 245 218 76 245 216 51 245 215 41 245 214 38 241 207 50
-241 211 63 201 147 55 88 79 47 29 29 30 34 34 35 42 42 43
-103 103 103 191 190 190 75 75 76 196 196 197 200 200 197 65 64 64
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-90 87 86 146 146 147 19 19 19 7 7 7 7 7 7 7 7 7
-7 7 7 90 87 86 140 140 139 31 31 31 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-103 103 103 161 161 162 53 54 54 7 7 7 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 12 12 12 50 51 51 146 114 101 180 121 62 199 129 48
-201 147 55 213 157 40 213 157 40 230 165 41 226 179 40 226 179 40
-238 192 33 241 205 27 244 209 25 244 210 23 244 212 23 245 211 23
-245 211 23 245 211 23 245 211 23 244 209 25 238 204 29 226 179 40
-213 157 40 199 129 48 54 42 32 0 0 0 4 6 6 44 44 45
-150 151 151 129 130 130 137 136 134 205 205 205 202 202 203 8 8 8
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 129 130 130 146 146 147 47 47 47 4 4 4 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 2 2 2 12 12 12 28 28 29 49 50 50
-74 74 74 108 96 91 180 121 62 180 121 62 199 129 48 201 147 55
-213 157 40 230 165 41 226 179 40 238 192 33 241 205 27 241 205 27
-243 206 27 243 206 27 241 205 27 238 204 29 226 179 40 213 157 40
-199 129 48 199 129 48 21 19 17 65 64 64 103 103 103 167 168 167
-202 202 203 24 24 24 193 193 194 229 229 230 140 140 139 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 8 8 8 156 155 156 133 133 133 36 36 36 3 3 3
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1
-4 4 4 10 11 11 21 21 22 39 39 39 60 60 60 108 96 91
-180 121 62 199 129 48 199 129 48 213 157 40 230 165 41 226 179 40
-226 179 40 226 179 40 226 179 40 226 179 40 213 157 40 199 129 48
-180 121 62 99 91 79 72 71 71 56 56 56 129 130 130 167 168 167
-21 21 22 17 18 18 231 231 231 229 229 230 52 53 53 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 13 13 13 176 177 177 120 121 122 33 33 34
-2 2 2 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 2 2 2 8 8 8
-21 21 22 47 47 47 99 91 79 180 121 62 199 129 48 199 129 48
-201 147 55 213 157 40 213 157 40 201 147 55 199 129 48 180 121 62
-99 91 79 26 26 27 9 9 9 60 60 60 186 186 187 31 31 31
-7 7 7 60 60 60 243 243 243 209 210 210 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
-7 7 7 7 7 7 7 7 7 26 27 27 193 193 194 108 110 110
-22 22 22 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 1 1 1 8 8 8 24 24 24 58 58 58 108 96 91
-180 121 62 180 121 62 180 121 62 180 121 62 180 121 62 72 71 71
-15 15 15 0 0 0 4 6 6 75 75 76 156 155 156 24 24 24
-24 24 24 108 107 107 232 232 233 137 136 134 24 24 24 24 24 24
-24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
-24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
-24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
-24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
-24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
-24 24 24 24 24 24 24 24 24 24 24 24 58 58 58 176 177 177
-60 60 60 3 3 3
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 2 2 2 12 12 12
-26 27 27 44 44 44 55 55 55 50 51 51 29 29 30 8 8 8
-0 0 0 0 0 0 3 3 3 47 47 47 127 127 126 150 151 151
-150 151 151 140 142 143 129 130 130 140 142 143 150 151 151 150 151 151
-150 151 151 150 151 151 150 151 151 150 151 151 150 151 151 150 151 151
-150 151 151 150 151 151 153 154 155 161 161 162 165 165 165 167 168 167
-177 177 174 167 168 167 161 161 162 156 155 156 150 151 151 150 151 151
-150 151 151 150 151 151 150 151 151 150 151 151 150 151 151 150 151 151
-150 151 151 150 151 151 150 151 151 150 151 151 150 151 151 150 151 151
-150 151 151 150 151 151 150 151 151 150 151 151 149 149 150 127 127 126
-44 44 45 2 2 2
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 2 2 2 1 1 1 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 7 7 7 21 21 22 25 25 26
-25 25 26 24 24 24 20 20 20 23 23 24 25 25 26 26 26 27
-26 26 27 26 26 27 26 26 27 26 26 27 26 26 27 26 26 27
-26 26 27 26 26 27 26 26 27 26 26 27 26 26 27 26 27 27
-28 28 29 26 27 27 26 26 27 26 26 27 26 26 27 26 26 27
-26 26 27 26 26 27 26 26 27 26 26 27 26 26 27 26 26 27
-26 26 27 26 26 27 26 26 27 26 26 27 26 26 27 26 26 27
-26 26 27 26 26 27 26 26 27 26 26 27 25 25 26 21 21 22
-7 7 7 0 0 0
diff --git a/drivers/video/logo/logo_blackfin_vga16.ppm b/drivers/video/logo/logo_blackfin_vga16.ppm
deleted file mode 100644
index 1352b02a9d93..000000000000
--- a/drivers/video/logo/logo_blackfin_vga16.ppm
+++ /dev/null
@@ -1,1127 +0,0 @@
-P3
-# This was generated by the GIMP & Netpbm tools
-# gimp linux_bf.svg (create 80x80 save as linux_bf.ppm)
-# ppmquant -mapfile clut_vga16.ppm linux_bf.ppm | pnmnoraw > logo_blackfin_vga16.ppm
-#
-80 80
-255
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85
-85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-85 85 85 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 85 85 85 85 85 85 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 85 85 85 85 85 85 85 85 85 0 0 0 0 0 0
-85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 170 170 170 170 170 170 85 85 85 0 0 0 0 0 0
-0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0
-0 0 0 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 170 170
-170 170 170 85 85 85 85 85 85 170 170 170 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 170 170 170 170 170 170 170 170 170 85 85 85 85 85 85
-0 0 0 0 0 0 0 0 0 85 85 85 170 170 170 255 255 255
-255 255 255 255 255 255 170 170 170 85 85 85 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-170 170 170 255 255 255 255 255 255 255 255 255 255 255 255 0 0 0
-0 0 0 0 0 0 0 0 0 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 170 170 170 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-255 255 255 170 170 170 85 85 85 170 170 170 255 255 255 255 255 255
-0 0 0 0 0 0 170 170 170 255 255 255 255 255 255 85 85 85
-85 85 85 170 170 170 255 255 255 255 255 255 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-255 255 255 85 85 85 170 170 170 170 170 170 255 255 255 255 255 255
-85 85 85 85 85 85 170 170 170 255 255 255 170 170 170 0 0 0
-170 170 170 170 170 170 255 255 255 255 255 255 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-255 255 255 0 0 0 85 85 85 170 170 170 170 170 170 255 255 255
-0 0 0 85 85 85 85 85 85 255 255 255 85 85 85 0 0 0
-0 0 0 85 85 85 170 170 170 255 255 255 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-255 255 255 85 85 85 0 0 0 0 0 0 255 85 85 255 255 85
-255 255 85 255 255 85 255 255 85 255 255 85 85 85 85 0 0 0
-0 0 0 0 0 0 170 170 170 255 255 255 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-170 170 170 255 255 255 0 0 0 255 85 85 170 85 0 170 85 0
-255 255 85 255 255 85 170 85 0 255 255 85 255 255 85 255 255 85
-0 0 0 85 85 85 255 255 255 255 255 255 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 255 255 255 255 85 85 255 255 85 255 255 85 255 255 85
-255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
-255 255 85 255 255 85 255 255 85 170 170 170 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 255 85 85 255 255 85 255 255 85 255 255 85 255 255 85
-255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
-255 255 85 255 255 85 255 255 85 255 255 85 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-170 85 0 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
-255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
-255 255 85 170 85 0 85 85 85 255 255 85 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-255 85 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
-255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
-170 85 0 85 85 85 255 255 85 255 255 85 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-170 85 0 170 85 0 255 255 85 255 255 85 255 255 85 255 255 85
-255 255 85 255 255 85 255 255 85 255 255 85 170 85 0 170 85 0
-170 85 0 255 255 85 255 255 85 255 85 85 0 0 0 0 0 0
-85 85 85 85 85 85 85 85 85 0 0 0 0 0 0 85 85 85
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-85 85 85 170 85 0 170 85 0 170 85 0 255 255 85 255 255 85
-255 255 85 255 85 85 170 85 0 170 85 0 170 85 0 255 255 85
-255 255 85 255 255 85 255 85 85 170 170 170 0 0 0 0 0 0
-85 85 85 85 85 85 85 85 85 85 85 85 0 0 0 85 85 85
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-85 85 85 170 170 170 170 85 0 170 85 0 170 85 0 170 85 0
-170 85 0 170 85 0 170 85 0 255 255 85 255 255 85 255 255 85
-255 85 85 170 170 170 255 255 255 255 255 255 85 85 85 0 0 0
-0 0 0 85 85 85 85 85 85 85 85 85 0 0 0 0 0 0
-85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-170 170 170 170 170 170 170 170 170 170 85 0 255 255 85 255 255 85
-255 255 85 255 255 85 255 255 85 255 255 85 255 85 85 170 170 170
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 0 0 0
-0 0 0 0 0 0 85 85 85 85 85 85 0 0 0 0 0 0
-85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-170 170 170 255 255 255 255 255 255 170 170 170 170 85 0 255 85 85
-255 85 85 255 85 85 255 85 85 255 85 85 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 85 85 85
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
-170 170 170 255 255 255 255 255 255 170 170 170 170 170 170 170 170 170
-170 170 170 170 170 170 170 170 170 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 85 85 85 85 85 85 0 0 0 0 0 0
-255 255 255 255 255 255 255 255 255 255 255 255 170 170 170 170 170 170
-170 170 170 170 170 170 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-170 170 170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 85 85 85 0 0 0 0 0 0 170 170 170 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-85 85 85 0 0 0 0 0 0 0 0 0 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 170 170 170 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
-85 85 85 0 0 0 0 0 0 85 85 85 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
-0 0 0 0 0 0 0 0 0 170 170 170 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 85 85 85 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
-85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 170 170 170 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 170 170 170 170 170 170 170 170 170 170 170 170
-170 170 170 255 255 255 255 255 255 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 0 0 0 85 85 85 170 170 170 170 170 170 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 170 170 170 170 170 170 170 170 170 170 170 170
-170 170 170 170 170 170 255 255 255 0 0 0 0 0 0 85 85 85
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
-0 0 0 0 0 0 170 170 170 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 170 170 170
-170 170 170 170 170 170 170 170 170 255 255 255 0 0 0 85 85 85
-85 85 85 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
-0 0 0 0 0 0 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 170 170 170 170 170 170 255 255 255 0 0 0 0 0 0
-0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
-0 0 0 170 170 170 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 170 170 170 85 85 85 170 170 170 170 170 170 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 170 170 170 170 170 170 255 255 255 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 85 85 85 85 85 85 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
-0 0 0 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
-170 170 170 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 0 0 0
-0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 85 85 85 170 170 170 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 170 170 170
-0 0 0 85 85 85 0 0 0 85 85 85 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 85 85 85 0 0 0 85 85 85 85 85 85 85 85 85
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 170 170 170 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 170 170 170 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 85 85 85 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 170 170 170
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 85 85 85 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-170 170 170 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
-0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 170 170 170 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 170 170 170 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 170 170 170 255 255 255 255 255 255 255 255 255 255 255 255
-85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
-0 0 0 0 0 0 85 85 85 0 0 0 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 170 170 170 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 170 170 170 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 170 170 170 255 255 255 255 255 255 255 255 255
-170 170 170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 0 0 0 85 85 85 0 0 0 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 170 170 170 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 170 170 170 255 255 255 255 255 255
-170 170 170 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
-85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 0 0 0 85 85 85 0 0 0 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 170 170 170 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 255 255 255
-170 170 170 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 0 0 0 85 85 85 0 0 0 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 170 170 170 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 170 170 170
-170 170 170 0 0 0 0 0 0 85 85 85 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
-0 0 0 0 0 0 85 85 85 85 85 85 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 170 170 170 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 85 85 85 170 170 170 170 170 170 255 255 255 255 255 255
-170 170 170 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 85 0
-255 255 85 255 255 85 0 0 0 85 85 85 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 170 170 170 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-170 170 170 170 170 170 170 170 170 85 85 85 0 0 0 85 85 85
-85 85 85 85 85 85 0 0 0 0 0 0 0 0 0 85 85 85
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 255 255 85 255 255 85
-255 255 85 255 255 85 255 255 85 85 85 85 170 170 170 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 170 170 170 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 85 170 170 170
-85 85 85 170 170 170 170 170 170 85 85 85 0 0 0 0 0 0
-0 0 0 85 85 85 170 170 170 0 0 0 0 0 0 85 85 85
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
-170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170
-85 85 85 0 0 0 0 0 0 170 85 0 255 255 85 255 255 85
-255 255 85 255 255 85 255 255 85 255 255 85 170 85 0 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 170 170 170 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 170 170 170 255 255 255 255 255 255
-255 255 255 255 255 255 170 170 170 170 170 170 170 170 170 170 170 170
-255 255 255 85 85 85 0 0 0 170 170 170 85 85 85 0 0 0
-0 0 0 0 0 0 85 85 85 0 0 0 255 255 85 85 85 85
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 170 170
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
-170 170 170 0 0 0 85 85 85 255 255 85 255 255 85 255 255 85
-255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 0 0 0
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 85 85 85 0 0 0
-0 0 0 0 0 0 85 85 85 255 255 255 255 255 255 255 255 255
-170 170 170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 85 85 85
-0 0 0 0 0 0 0 0 0 255 255 85 255 255 85 255 255 85
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 170 170
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-170 170 170 170 170 170 255 255 85 255 255 85 255 255 85 255 255 85
-255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
-0 0 0 170 170 170 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 0 0 0 0 0 0
-0 0 0 0 0 0 255 255 255 255 255 255 255 255 255 170 170 170
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 170 170 170
-85 85 85 0 0 0 255 255 85 255 255 85 255 255 85 255 255 85
-85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 170 170
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-170 170 170 170 170 170 170 170 170 170 170 170 255 255 85 255 255 85
-255 255 85 255 255 85 170 170 170 170 170 170 170 170 170 170 170 170
-255 255 85 85 85 85 170 170 170 170 170 170 170 170 170 170 170 170
-255 255 255 255 255 255 170 170 170 170 170 170 170 170 170 255 255 255
-255 255 255 170 170 170 170 170 170 255 255 255 0 0 0 0 0 0
-0 0 0 85 85 85 255 255 255 255 255 255 255 255 255 85 85 85
-85 85 85 170 170 170 170 170 170 85 85 85 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
-170 170 170 170 170 170 255 255 85 255 255 85 255 255 85 255 255 85
-85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 85 85 85
-0 0 0 0 0 0 255 255 255 85 85 85 0 0 0 0 0 0
-255 255 255 85 85 85 0 0 0 0 0 0 255 255 255 255 255 85
-255 255 85 170 170 170 0 0 0 0 0 0 0 0 0 170 170 170
-255 255 255 170 170 170 85 85 85 0 0 0 0 0 0 0 0 0
-170 170 170 255 255 255 85 85 85 0 0 0 85 85 85 255 255 255
-85 85 85 0 0 0 85 85 85 255 255 255 0 0 0 0 0 0
-0 0 0 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 85 85 85 0 0 0 0 0 0 85 85 85
-85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-85 85 85 255 255 255 255 255 85 255 255 85 255 255 85 255 255 85
-85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 85 85 85 170 170 170 0 0 0
-0 0 0 85 85 85 255 255 255 0 0 0 0 0 0 85 85 85
-255 255 255 0 0 0 0 0 0 85 85 85 255 255 85 255 255 85
-255 255 85 85 85 85 0 0 0 0 0 0 0 0 0 170 170 170
-255 255 255 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
-85 85 85 255 255 255 0 0 0 0 0 0 170 170 170 170 170 170
-0 0 0 0 0 0 255 255 255 255 255 255 0 0 0 85 85 85
-255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 85 85 85 0 0 0 85 85 85 255 255 255 255 255 255
-85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 85 85 85 255 255 255 255 255 85 255 255 85 255 255 85
-255 255 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 85 85 85 170 170 170 0 0 0
-0 0 0 85 85 85 170 170 170 0 0 0 0 0 0 170 170 170
-170 170 170 0 0 0 0 0 0 170 170 170 255 255 85 255 255 85
-255 255 255 0 0 0 85 85 85 85 85 85 0 0 0 170 170 170
-255 255 255 0 0 0 0 0 0 170 170 170 85 85 85 0 0 0
-85 85 85 170 170 170 0 0 0 0 0 0 170 170 170 0 0 0
-0 0 0 170 170 170 255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255 170 170 170 170 170 170
-85 85 85 0 0 0 85 85 85 255 255 255 255 255 255 170 170 170
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 85 85 85 255 255 255 255 255 85 255 255 85
-255 255 85 170 85 0 0 0 0 85 85 85 85 85 85 85 85 85
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 85 85 85 170 170 170 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 255 255 255
-170 170 170 0 0 0 0 0 0 170 170 170 255 255 85 255 255 85
-170 170 170 0 0 0 170 170 170 85 85 85 0 0 0 255 255 255
-170 170 170 0 0 0 0 0 0 255 255 255 0 0 0 0 0 0
-170 170 170 170 170 170 0 0 0 0 0 0 85 85 85 0 0 0
-85 85 85 255 255 255 255 255 255 255 255 255 255 255 255 170 170 170
-255 255 255 255 255 255 255 255 255 85 85 85 0 0 0 0 0 0
-0 0 0 0 0 0 170 170 170 255 255 255 170 170 170 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 85 85 85 255 255 255 255 255 85
-255 255 85 255 255 85 255 255 255 170 170 170 170 170 170 255 255 255
-85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 170 170 170 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 255 255 255 255 255 255
-85 85 85 0 0 0 0 0 0 255 255 255 255 255 85 255 255 85
-85 85 85 0 0 0 255 255 255 85 85 85 0 0 0 255 255 255
-85 85 85 0 0 0 85 85 85 255 255 255 85 85 85 85 85 85
-255 255 255 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
-255 255 255 255 255 255 255 255 255 170 170 170 0 0 0 85 85 85
-255 255 255 255 255 255 255 255 255 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 255 255 255
-170 170 170 0 0 0 0 0 0 0 0 0 170 170 170 255 255 255
-255 255 85 255 255 85 170 170 170 170 170 170 170 170 170 170 170 170
-170 170 170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 85 85 85 170 170 170 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 255 255 255
-0 0 0 0 0 0 85 85 85 255 255 85 255 255 85 255 255 255
-0 0 0 85 85 85 255 255 255 0 0 0 85 85 85 255 255 255
-85 85 85 0 0 0 170 170 170 255 255 255 170 170 170 170 170 170
-255 255 255 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
-255 255 255 255 255 255 255 255 255 170 170 170 0 0 0 170 170 170
-255 255 255 255 255 255 85 85 85 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 170 170 170 255 255 255 255 255 255
-170 170 170 0 0 0 85 85 85 85 85 85 0 0 0 170 170 170
-255 255 85 255 255 85 255 255 255 170 170 170 170 170 170 170 170 170
-85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 85 85 85 170 170 170 0 0 0 0 0 0
-85 85 85 170 170 170 0 0 0 0 0 0 85 85 85 170 170 170
-0 0 0 0 0 0 170 170 170 255 255 85 255 255 85 170 170 170
-0 0 0 85 85 85 170 170 170 0 0 0 85 85 85 255 255 255
-0 0 0 0 0 0 170 170 170 170 170 170 170 170 170 255 255 255
-170 170 170 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
-255 255 255 255 255 255 255 255 255 85 85 85 0 0 0 255 255 255
-255 255 255 255 255 255 0 0 0 0 0 0 0 0 0 0 0 0
-85 85 85 255 255 255 255 255 255 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 170 170 170 255 255 255 255 255 85 255 255 255
-85 85 85 170 170 170 255 255 255 255 255 255 170 170 170 0 0 0
-170 170 170 255 255 85 255 255 85 255 255 255 170 170 170 255 255 255
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 85 85 85 170 170 170 0 0 0 0 0 0
-170 170 170 170 170 170 0 0 0 0 0 0 85 85 85 170 170 170
-0 0 0 0 0 0 170 170 170 255 255 85 255 255 255 85 85 85
-0 0 0 85 85 85 85 85 85 0 0 0 85 85 85 170 170 170
-0 0 0 0 0 0 255 255 255 85 85 85 0 0 0 170 170 170
-170 170 170 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
-255 255 255 255 255 255 255 255 255 85 85 85 85 85 85 255 255 255
-255 255 255 85 85 85 0 0 0 0 0 0 0 0 0 170 170 170
-170 170 170 170 170 170 255 255 255 0 0 0 0 0 0 0 0 0
-0 0 0 170 170 170 255 255 255 255 255 255 255 255 85 170 170 170
-255 255 255 255 255 255 255 255 85 255 255 85 170 170 170 0 0 0
-0 0 0 170 170 170 255 255 85 255 255 85 255 255 85 255 255 85
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 170 170 170 85 85 85 0 0 0 0 0 0
-255 255 255 85 85 85 0 0 0 0 0 0 170 170 170 85 85 85
-0 0 0 0 0 0 255 255 255 255 255 85 255 255 255 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 85 85 85
-0 0 0 85 85 85 255 255 255 0 0 0 0 0 0 255 255 255
-85 85 85 0 0 0 85 85 85 85 85 85 0 0 0 0 0 0
-255 255 255 255 255 255 255 255 255 85 85 85 170 170 170 255 255 255
-255 255 255 0 0 0 0 0 0 0 0 0 170 170 170 255 255 255
-170 170 170 85 85 85 170 170 170 0 0 0 0 0 0 85 85 85
-255 255 255 170 170 170 0 0 0 170 170 170 255 255 85 255 255 255
-255 255 255 170 170 170 255 255 255 255 255 255 85 85 85 0 0 0
-85 85 85 255 255 255 255 255 255 255 255 85 255 255 85 255 255 85
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 85 85 85 170 170 170 0 0 0 0 0 0 0 0 0
-85 85 85 0 0 0 0 0 0 0 0 0 255 255 255 0 0 0
-0 0 0 85 85 85 170 170 170 255 255 255 170 170 170 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 85 85 85
-0 0 0 85 85 85 170 170 170 0 0 0 85 85 85 255 255 255
-0 0 0 0 0 0 170 170 170 170 170 170 0 0 0 0 0 0
-255 255 255 255 255 255 255 255 255 0 0 0 255 255 255 255 255 255
-170 170 170 0 0 0 0 0 0 170 170 170 255 255 255 85 85 85
-170 170 170 170 170 170 170 170 170 0 0 0 85 85 85 255 255 255
-170 170 170 0 0 0 85 85 85 255 255 255 255 255 85 170 170 170
-0 0 0 170 170 170 255 255 255 255 255 255 0 0 0 85 85 85
-255 255 255 170 170 170 0 0 0 170 170 170 255 255 85 85 85 85
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 85 85 85 170 170 170 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 170 170 170 170 170 170 0 0 0
-0 0 0 0 0 0 0 0 0 170 170 170 85 85 85 0 0 0
-170 170 170 255 255 255 0 0 0 0 0 0 170 170 170 85 85 85
-0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 170 170 170
-0 0 0 0 0 0 255 255 255 170 170 170 0 0 0 0 0 0
-255 255 255 255 255 255 170 170 170 85 85 85 255 255 255 255 255 255
-85 85 85 0 0 0 170 170 170 170 170 170 0 0 0 0 0 0
-170 170 170 170 170 170 255 255 255 255 255 255 255 255 255 85 85 85
-0 0 0 0 0 0 255 255 255 255 255 255 170 170 170 0 0 0
-0 0 0 170 170 170 255 255 255 170 170 170 170 170 170 255 255 255
-85 85 85 0 0 0 0 0 0 0 0 0 170 170 170 85 85 85
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 85 85 85 170 170 170 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 170 170 170 255 255 255 170 170 170 0 0 0
-0 0 0 0 0 0 0 0 0 255 255 255 0 0 0 0 0 0
-255 255 255 255 255 255 0 0 0 0 0 0 255 255 255 170 170 170
-0 0 0 0 0 0 0 0 0 170 170 170 255 255 255 170 170 170
-0 0 0 0 0 0 255 255 255 170 170 170 0 0 0 0 0 0
-170 170 170 255 255 255 170 170 170 170 170 170 170 170 170 170 170 170
-0 0 0 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0
-85 85 85 255 255 255 255 255 255 170 170 170 0 0 0 0 0 0
-0 0 0 170 170 170 255 255 255 170 170 170 0 0 0 0 0 0
-85 85 85 255 255 255 255 255 85 255 255 255 255 255 255 85 85 85
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 170 170
-85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 85 85 85 170 170 170 170 170 170 170 170 170 170 170 170
-170 170 170 170 170 170 255 255 85 255 255 85 255 255 85 170 170 170
-170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170
-255 255 85 170 170 170 170 170 170 170 170 170 255 255 85 255 255 85
-170 170 170 170 170 170 170 170 170 255 255 85 255 255 85 170 170 170
-170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170
-170 170 170 170 170 170 85 85 85 170 170 170 170 170 170 170 170 170
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
-85 85 85 255 255 255 170 170 170 0 0 0 0 0 0 0 0 0
-0 0 0 255 255 255 255 255 255 255 255 255 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
-170 170 170 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-85 85 85 85 85 85 255 255 85 255 255 85 255 255 85 255 255 85
-255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
-255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
-255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
-255 255 85 255 85 85 85 85 85 0 0 0 0 0 0 0 0 0
-85 85 85 170 170 170 85 85 85 170 170 170 170 170 170 85 85 85
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-85 85 85 170 170 170 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 85 85 85 170 170 170 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-85 85 85 170 170 170 85 85 85 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 85 85 85 85 85 85 170 85 0 170 85 0
-170 85 0 255 85 85 255 85 85 255 85 85 255 255 85 255 255 85
-255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
-255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
-255 85 85 170 85 0 85 85 85 0 0 0 0 0 0 85 85 85
-170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 170 170 170 170 170 170 85 85 85 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
-85 85 85 85 85 85 170 85 0 170 85 0 170 85 0 170 85 0
-255 85 85 255 85 85 255 255 85 255 255 85 255 255 85 255 255 85
-255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 85 85
-170 85 0 170 85 0 0 0 0 85 85 85 85 85 85 170 170 170
-170 170 170 0 0 0 170 170 170 255 255 255 170 170 170 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 170 170 170 170 170 170 0 0 0 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
-170 85 0 170 85 0 170 85 0 255 85 85 255 85 85 255 255 85
-255 255 85 255 255 85 255 255 85 255 255 85 255 85 85 170 85 0
-170 85 0 85 85 85 85 85 85 85 85 85 170 170 170 170 170 170
-0 0 0 0 0 0 255 255 255 255 255 255 85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 170 170 170 85 85 85 0 0 0
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 85 85 85 85 85 85 170 85 0 170 85 0 170 85 0
-170 85 0 255 85 85 255 85 85 255 85 85 170 85 0 170 85 0
-85 85 85 0 0 0 0 0 0 85 85 85 170 170 170 0 0 0
-0 0 0 85 85 85 255 255 255 170 170 170 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 85 85 85
-0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
-170 85 0 170 85 0 170 85 0 170 85 0 170 85 0 85 85 85
-0 0 0 0 0 0 0 0 0 85 85 85 170 170 170 0 0 0
-0 0 0 85 85 85 255 255 255 170 170 170 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 170 170
-85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 85 85 85 85 85 85 85 85 85 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 170 170 170
-170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170
-170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170
-170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170
-170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170
-170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170
-170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170
-170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 85 85 85
-85 85 85 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-0 0 0 0 0 0
diff --git a/drivers/video/logo/logo_m32r_clut224.ppm b/drivers/video/logo/logo_m32r_clut224.ppm
deleted file mode 100644
index 8b2983c5a0bd..000000000000
--- a/drivers/video/logo/logo_m32r_clut224.ppm
+++ /dev/null
@@ -1,1292 +0,0 @@
-P3
-# CREATOR: The GIMP's PNM Filter Version 1.0
-#
-# Note: how to convert ppm to pnm(ascii).
-# $ convert -posterize 224 m32r.ppm - | pnm2asc -f5 >logo_m32r_clut224.ppm
-#
-# convert - imagemagick: /usr/bin/convert
-# pnm2asc - pnm to ascii-pnm format converter
-# http://www.is.aist.go.jp/etlcdb/util/p2a.htm#English
-
-80 80
-255
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 43 43 43 75 75 75 27 27 27 2 2 3
- 2 2 3 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 59 59 59 123 123 123 67 67 67 27 27 27
- 2 2 3 2 2 3 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 10 6 3 59 59 59 80 80 80 43 43 43 27 27 27
- 2 2 3 2 2 3 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 19 19 19 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 2 2 3
- 2 2 3 2 2 3 10 6 3 10 6 3 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 10 6 3 11 11 11 11 11 11 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 2 2 3
- 2 2 3 2 2 3 2 2 3 27 27 27 10 6 3
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 19 19 19 2 2 3 2 2 3 51 51 51 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 2 2 3
- 2 2 3 123 123 123 196 196 196 115 115 115 2 2 3
- 2 2 3 2 2 3 2 2 3 75 75 75 141 141 140
- 172 172 172 196 196 196 190 189 188 2 2 3 11 11 11
- 2 2 3 2 2 3 2 2 3 2 2 3 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 2 2 3
- 27 27 27 164 164 164 228 228 228 221 221 220 10 6 3
- 2 2 3 2 2 3 2 2 3 172 172 172 245 245 245
- 254 254 252 254 254 252 221 221 220 35 35 35 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 2 2 3
- 164 164 164 228 228 228 35 35 35 236 236 236 236 236 236
- 2 2 3 11 11 11 2 2 3 254 254 252 245 245 245
- 2 2 3 75 75 75 245 245 245 245 245 245 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 2 2 3
- 212 212 212 2 2 3 51 51 51 11 11 11 245 245 245
- 27 27 27 80 80 80 10 6 3 254 254 252 2 2 3
- 2 2 3 91 91 91 19 19 19 254 254 252 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 2 2 3
- 196 196 196 10 6 3 2 2 3 11 11 11 107 107 107
- 49 35 5 57 42 11 31 22 3 236 236 236 2 2 3
- 2 2 3 2 2 3 2 2 3 254 254 252 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 2 2 3
- 107 107 107 221 221 220 2 2 3 64 43 7 194 148 10
- 236 188 10 225 180 10 170 126 10 236 188 10 94 86 67
- 2 2 3 2 2 3 204 204 204 236 236 236 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 2 2 3
- 2 2 3 228 228 228 182 126 10 218 164 9 236 188 10
- 236 188 10 237 204 14 236 205 40 246 214 48 246 214 48
- 245 189 11 209 156 9 196 196 196 11 11 11 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 2 2 3
- 2 2 3 165 114 10 207 148 7 229 172 9 236 180 10
- 236 196 11 237 204 14 242 218 43 246 218 75 246 218 19
- 246 213 13 246 218 19 244 205 11 218 164 9 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 2 2 3
- 164 109 5 192 133 7 224 165 9 236 180 10 236 188 10
- 236 196 11 241 212 42 246 218 75 246 218 19 246 218 19
- 246 218 19 236 196 11 150 114 10 229 172 9 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 2 2 3
- 165 114 10 201 142 7 229 172 9 242 182 11 236 188 10
- 237 204 14 245 213 67 246 218 19 246 213 13 246 213 13
- 154 119 10 207 148 7 218 164 9 216 156 8 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 2 2 3
- 2 2 3 120 78 3 225 180 10 245 189 11 236 205 40
- 241 212 42 241 212 17 237 204 14 148 107 9 182 126 10
- 216 156 8 218 164 9 207 148 7 82 70 43 2 2 3
- 2 2 3 123 123 123 35 35 35 2 2 3 2 2 3
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 2 2 3
- 10 6 3 180 180 180 156 102 5 135 88 5 142 106 7
- 126 98 11 165 114 10 185 132 9 207 148 7 215 150 13
- 199 140 8 188 148 71 196 196 196 190 189 188 2 2 3
- 2 2 3 11 11 11 132 132 132 75 75 75 2 2 3
- 2 2 3 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 2 2 3
- 10 6 3 190 189 188 190 189 188 151 97 5 192 133 7
- 207 148 7 206 142 8 199 140 8 180 121 7 180 132 31
- 190 189 188 190 189 188 212 212 212 212 212 212 107 107 107
- 2 2 3 2 2 3 99 99 99 51 51 51 2 2 3
- 2 2 3 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 2 2 3
- 2 2 3 190 189 188 190 189 188 190 189 188 136 95 7
- 151 97 5 151 97 5 151 97 5 183 156 91 190 189 188
- 190 189 188 228 228 228 254 254 252 254 254 252 221 221 220
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 10 6 3 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 2 2 3 2 2 3
- 75 75 75 245 245 245 196 196 196 190 189 188 190 189 188
- 190 189 188 196 196 196 190 189 188 190 189 188 204 204 204
- 236 236 236 254 254 252 254 254 252 254 254 252 254 254 252
- 35 35 35 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 2 2 3 27 27 27 2 2 3
- 245 245 245 254 254 252 245 245 245 190 189 188 190 189 188
- 190 189 188 190 189 188 190 189 188 212 212 212 245 245 245
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 10 6 3 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 2 2 3 2 2 3 132 132 132
- 254 254 252 254 254 252 254 254 252 236 236 236 196 196 196
- 190 189 188 204 204 204 245 245 245 245 245 245 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 80 80 80 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 2 2 3 2 2 3 2 2 3 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 245 245 245
- 245 245 245 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 2 2 3 2 2 3 2 2 3 212 212 212 245 245 245
- 254 254 252 254 254 252 254 254 252 254 254 252 245 245 245
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 2 2 3
- 2 2 3 2 2 3 2 2 3 204 204 204 245 245 245
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 245 245 245 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 245 245 245 236 236 236 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 2 2 3 2 2 3
- 2 2 3 2 2 3 11 11 11 164 164 164 212 212 212
- 236 236 236 245 245 245 254 254 252 236 236 236 221 221 220
- 221 221 220 228 228 228 245 245 245 245 245 245 245 245 245
- 236 236 236 221 221 220 212 212 212 204 204 204 204 204 204
- 196 196 196 204 204 204 59 59 59 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 2 2 3 2 2 3
- 2 2 3 2 2 3 27 27 27 172 172 172 212 212 212
- 236 236 236 254 254 252 254 254 252 254 254 252 228 228 228
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 245 245 245 221 221 220 204 204 204 196 196 196
- 196 196 196 196 196 196 228 228 228 19 19 19 2 2 3
- 80 80 80 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 2 2 3 2 2 3 2 2 3
- 11 11 11 2 2 3 164 164 164 236 236 236 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 245 245 245
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 236 236 236 212 212 212 196 196 196 245 245 245 2 2 3
- 2 2 3 11 11 11 51 51 51 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 2 2 3 2 2 3 86 86 83
- 2 2 3 27 27 27 236 236 236 254 254 252 254 254 252
- 245 245 245 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 212 212 212 196 196 196 91 91 91
- 2 2 3 2 2 3 2 2 3 11 11 11 2 2 3
- 2 2 3 2 2 3 2 2 3 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 2 2 3 2 2 3 2 2 3
- 2 2 3 245 245 245 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 245 245 245
- 254 254 252 245 245 245 254 254 252 254 254 252 254 254 252
- 254 254 252 245 245 245 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 221 221 220 245 245 245
- 2 2 3 11 11 11 43 43 43 19 19 19 10 6 3
- 2 2 3 2 2 3 2 2 3 2 2 3 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 2 2 3 80 80 80 2 2 3
- 2 2 3 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 245 245 245 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 43 43 43 27 27 27 80 80 80 19 19 19 80 80 80
- 2 2 3 2 2 3 2 2 3 2 2 3 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 2 2 3 2 2 3 2 2 3 2 2 3
- 245 245 245 254 254 252 254 254 252 17 11 233 254 254 252
- 254 254 252 254 254 252 254 254 252 236 236 236 17 11 233
- 17 11 233 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 245 245 245
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 11 11 11 11 11 11 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 2 2 3 67 67 67 2 2 3 19 19 19
- 254 254 252 254 254 252 245 245 245 17 11 233 245 245 245
- 254 254 252 254 254 252 17 11 233 228 228 228 17 11 233
- 17 11 233 17 11 233 17 11 233 254 254 252 17 11 233
- 17 11 233 254 254 252 254 254 252 17 11 233 17 11 233
- 17 11 233 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 2 2 3 2 2 3 2 2 3 2 2 3
- 11 11 11 2 2 3 2 2 3 2 2 3 2 2 3
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 2 2 3 10 6 3 11 11 11 2 2 3 228 228 228
- 254 254 252 254 254 252 254 254 252 17 11 233 254 254 252
- 254 254 252 17 11 233 17 11 233 17 11 233 245 245 245
- 254 254 252 254 254 252 17 11 233 17 11 233 17 11 233
- 17 11 233 17 11 233 254 254 252 17 11 233 17 11 233
- 17 11 233 17 11 233 254 254 252 254 254 252 254 254 252
- 254 254 252 2 2 3 2 2 3 2 2 3 2 2 3
- 27 27 27 2 2 3 2 2 3 2 2 3 2 2 3
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 2 2 3 2 2 3 2 2 3 2 2 3 254 254 252
- 254 254 252 254 254 252 254 254 252 17 11 233 17 11 233
- 17 11 233 17 11 233 17 11 233 17 11 233 254 254 252
- 17 11 233 17 11 233 17 11 233 254 254 252 254 254 252
- 17 11 233 17 11 233 254 254 252 17 11 233 17 11 233
- 254 254 252 17 11 233 254 254 252 254 254 252 254 254 252
- 254 254 252 2 2 3 2 2 3 2 2 3 2 2 3
- 11 11 11 2 2 3 2 2 3 2 2 3 2 2 3
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 2 2 3
- 2 2 3 19 19 19 2 2 3 2 2 3 254 254 252
- 254 254 252 254 254 252 17 11 233 245 245 245 17 11 233
- 17 11 233 245 245 245 254 254 252 17 11 233 254 254 252
- 17 11 233 17 11 233 17 11 233 254 254 252 254 254 252
- 17 11 233 17 11 233 254 254 252 17 11 233 17 11 233
- 17 11 233 17 11 233 254 254 252 254 254 252 254 254 252
- 254 254 252 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 2 2 3
- 2 2 3 19 19 19 2 2 3 19 19 19 254 254 252
- 254 254 252 245 245 245 17 11 233 254 254 252 17 11 233
- 17 11 233 254 254 252 254 254 252 17 11 233 254 254 252
- 254 254 252 254 254 252 17 11 233 17 11 233 254 254 252
- 17 11 233 17 11 233 254 254 252 17 11 233 17 11 233
- 17 11 233 17 11 233 17 11 233 254 254 252 254 254 252
- 254 254 252 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 2 2 3 2 2 3
- 2 2 3 43 43 43 2 2 3 43 43 43 254 254 252
- 245 245 245 254 254 252 17 11 233 254 254 252 17 11 233
- 254 254 252 254 254 252 254 254 252 17 11 233 17 11 233
- 17 11 233 17 11 233 17 11 233 254 254 252 17 11 233
- 17 11 233 17 11 233 17 11 233 17 11 233 17 11 233
- 245 245 245 254 254 252 17 11 233 254 254 252 254 254 252
- 245 245 245 2 2 3 2 2 3 2 2 3 11 11 11
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 2 2 3 2 2 3
- 2 2 3 75 75 75 2 2 3 99 99 99 254 254 252
- 254 254 252 254 254 252 17 11 233 254 254 252 254 254 252
- 254 254 252 254 254 252 245 245 245 228 228 228 254 254 252
- 254 254 252 17 11 233 245 245 245 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 17 11 233 17 11 233
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 2 2 3 2 2 3 2 2 3 75 75 75
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 2 2 3 2 2 3
- 2 2 3 2 2 3 11 11 11 107 107 107 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 245 245 245 254 254 252 245 245 245 236 236 236 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 245 245 245
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 2 2 3 2 2 3 11 11 11 19 19 19
- 11 11 11 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 2 2 3 11 11 11
- 140 102 3 11 11 11 10 6 3 67 67 67 254 254 252
- 245 245 245 245 245 245 254 254 252 254 254 252 245 245 245
- 254 254 252 254 254 252 245 245 245 228 228 228 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 245 245 245 254 254 252 254 254 252 245 245 245
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 2 2 3 43 43 43 2 2 3 2 2 3
- 2 2 3 11 11 11 67 67 67 11 11 11 2 2 3
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 185 132 9 242 182 11
- 245 189 11 245 189 11 49 35 5 2 2 3 228 228 228
- 254 254 252 254 254 252 254 254 252 245 245 245 254 254 252
- 254 254 252 254 254 252 254 254 252 228 228 228 245 245 245
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 245 238 222 232 189 94
- 226 186 99 43 43 43 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 59 59 59 2 2 3
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 216 156 8 236 180 22
- 245 189 11 245 189 11 245 189 11 49 35 5 11 11 11
- 212 212 212 245 245 245 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 245 245 245 228 228 228 254 254 252
- 245 245 245 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 245 245 245 254 254 252 254 254 252 229 172 9 246 218 19
- 246 218 19 41 27 3 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 19 19 19 27 27 27 196 154 14
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 199 140 8 229 172 9 242 182 11
- 245 189 11 245 189 11 245 189 11 244 196 10 2 2 3
- 2 2 3 115 115 115 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 245 245 245 228 228 228 254 254 252
- 254 254 252 245 245 245 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 224 165 9 245 189 11
- 236 196 11 19 19 19 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 11 11 11 236 196 11
- 244 205 11 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 182 126 10 209 156 9 215 150 13
- 193 140 10 207 148 24 216 156 8 242 182 11 245 189 11
- 245 189 11 245 189 11 245 189 11 245 189 11 209 156 9
- 2 2 3 2 2 3 43 43 43 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 245 245 245
- 254 254 252 254 254 252 254 254 252 254 254 252 245 245 245
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 236 236 236 216 156 8 245 189 11
- 229 172 9 64 43 7 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 207 148 7 236 188 10
- 245 189 11 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 180 121 7 216 156 8 242 182 11 236 180 10
- 229 172 9 242 182 11 242 182 11 245 189 11 245 189 11
- 245 189 11 245 189 11 245 189 11 245 189 11 237 204 14
- 170 126 10 2 2 3 2 2 3 11 11 11 236 236 236
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 204 204 204 196 196 196 216 156 8 236 180 10
- 224 165 9 182 126 10 73 48 6 2 2 3 2 2 3
- 2 2 3 41 27 3 199 140 8 229 172 9 236 180 10
- 245 189 11 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 185 132 9 229 172 9 245 189 11 245 189 11
- 245 189 11 245 189 11 245 189 11 245 189 11 245 189 11
- 245 189 11 245 189 11 245 189 11 245 189 11 245 189 11
- 226 188 11 2 2 3 2 2 3 2 2 3 11 11 11
- 245 245 245 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 245 245 245 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 196 196 196 196 196 196 215 150 13 236 180 10
- 229 172 9 201 142 7 185 132 9 180 121 7 173 120 10
- 180 121 7 192 133 7 229 172 9 242 182 11 245 189 11
- 245 189 11 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 180 126 47 224 165 9 245 189 11 245 189 11
- 245 189 11 245 189 11 245 189 11 245 189 11 245 189 11
- 245 189 11 245 189 11 245 189 11 245 189 11 245 189 11
- 236 188 10 193 140 10 2 2 3 2 2 3 2 2 3
- 2 2 3 212 212 212 254 254 252 245 245 245 245 245 245
- 254 254 252 254 254 252 254 254 252 245 245 245 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 204 204 204 196 196 196 199 140 8 229 172 9
- 236 180 10 218 164 9 215 150 13 207 148 7 207 148 7
- 216 156 8 229 172 9 245 189 11 245 189 11 245 189 11
- 245 189 11 242 182 11 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 185 132 9 216 156 8 242 182 11 245 189 11
- 245 189 11 245 189 11 245 189 11 245 189 11 245 189 11
- 245 189 11 245 189 11 245 189 11 245 189 11 245 189 11
- 245 189 11 236 196 11 19 19 19 2 2 3 2 2 3
- 2 2 3 11 11 11 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 245 245 245 254 254 252 254 254 252
- 245 245 245 221 221 220 196 196 196 185 132 9 229 172 9
- 242 182 11 229 172 9 224 165 9 218 164 9 224 165 9
- 229 172 9 236 180 10 245 189 11 245 189 11 245 189 11
- 245 189 11 236 180 22 242 182 11 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 236 180 22 245 189 11
- 245 189 11 245 189 11 245 189 11 245 189 11 245 189 11
- 245 189 11 245 189 11 245 189 11 245 189 11 245 189 11
- 245 189 11 236 188 10 225 180 10 2 2 3 2 2 3
- 2 2 3 11 11 11 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 221 221 220 19 19 19 185 132 9 224 165 9
- 245 189 11 245 189 11 242 182 11 236 180 10 236 180 10
- 242 182 11 242 182 11 245 189 11 245 189 11 245 189 11
- 245 189 11 245 189 11 245 189 11 245 189 11 196 154 14
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 207 148 7 236 180 22 245 189 11
- 245 189 11 245 189 11 245 189 11 245 189 11 245 189 11
- 245 189 11 245 189 11 245 189 11 245 189 11 242 182 11
- 245 189 11 245 189 11 237 204 14 135 88 5 2 2 3
- 27 27 27 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 245 245 245 254 254 252 254 254 252 245 245 245
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 67 67 67 19 13 3 185 132 9 229 172 9
- 242 182 11 245 189 11 245 189 11 245 189 11 245 189 11
- 245 189 11 245 189 11 245 189 11 245 189 11 245 189 11
- 245 189 11 245 189 11 245 189 11 245 189 11 245 189 11
- 236 180 22 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 245 189 11 242 182 11
- 242 182 11 245 189 11 245 189 11 245 189 11 245 189 11
- 245 189 11 245 189 11 245 189 11 245 189 11 245 189 11
- 245 189 11 245 189 11 236 188 10 226 188 11 104 83 48
- 254 254 252 254 254 252 254 254 252 254 254 252 245 245 245
- 254 254 252 254 254 252 245 245 245 254 254 252 245 245 245
- 254 254 252 245 245 245 254 254 252 254 254 252 254 254 252
- 2 2 3 2 2 3 56 38 5 185 132 9 229 172 9
- 245 189 11 245 189 11 245 189 11 245 189 11 245 189 11
- 245 189 11 245 189 11 245 189 11 245 189 11 245 189 11
- 245 189 11 245 189 11 245 189 11 245 189 11 242 182 11
- 229 172 9 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 182 126 10 215 150 13 242 182 11 245 189 11
- 245 189 11 245 189 11 245 189 11 245 189 11 245 189 11
- 245 189 11 245 189 11 245 189 11 245 189 11 245 189 11
- 245 189 11 242 182 11 245 189 11 236 196 11 216 156 8
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 245 245 245 2 2 3
- 2 2 3 2 2 3 75 54 3 182 126 10 229 172 9
- 242 182 11 245 189 11 245 189 11 245 189 11 245 189 11
- 245 189 11 245 189 11 245 189 11 245 189 11 245 189 11
- 245 189 11 245 189 11 245 189 11 245 189 11 229 172 9
- 207 148 24 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 192 133 7 229 172 9 242 182 11 245 189 11
- 245 189 11 245 189 11 245 189 11 245 189 11 245 189 11
- 245 189 11 245 189 11 245 189 11 245 189 11 245 189 11
- 245 189 11 245 189 11 242 182 11 225 180 10 224 165 9
- 107 69 5 245 245 245 254 254 252 254 254 252 254 254 252
- 254 254 252 254 254 252 254 254 252 254 254 252 254 254 252
- 254 254 252 236 236 236 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 91 67 9 182 126 10 229 172 9
- 245 189 11 245 189 11 245 189 11 245 189 11 245 189 11
- 245 189 11 245 189 11 245 189 11 245 189 11 245 189 11
- 245 189 11 242 182 11 242 182 11 216 156 8 180 126 47
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 206 142 8 224 165 9 245 189 11 242 182 11
- 245 189 11 245 189 11 245 189 11 245 189 11 245 189 11
- 245 189 11 245 189 11 245 189 11 245 189 11 242 182 11
- 245 189 11 245 189 11 242 182 11 242 182 11 216 156 8
- 156 102 5 19 13 3 43 43 43 196 196 196 254 254 252
- 245 245 245 254 254 252 254 254 252 204 204 204 51 51 51
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 95 62 5 185 132 9 229 172 9
- 242 182 11 245 189 11 245 189 11 245 189 11 245 189 11
- 245 189 11 245 189 11 242 182 11 245 189 11 245 189 11
- 236 180 22 216 156 8 206 142 8 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 192 133 7 215 150 13 229 172 9 229 172 9
- 236 180 10 236 180 22 242 182 11 242 182 11 245 189 11
- 245 189 11 245 189 11 245 189 11 245 189 11 245 189 11
- 245 189 11 245 189 11 245 189 11 229 172 9 216 156 8
- 156 102 5 83 54 6 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 115 73 3 185 132 9 229 172 9
- 242 182 11 245 189 11 245 189 11 245 189 11 245 189 11
- 245 189 11 242 182 11 229 172 9 229 172 9 216 156 8
- 180 121 7 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 180 121 7 182 126 10 192 133 7 199 140 8
- 207 148 7 215 150 13 216 156 8 224 165 9 229 172 9
- 236 180 22 245 189 11 242 182 11 245 189 11 242 182 11
- 245 189 11 245 189 11 242 182 11 229 172 9 199 140 8
- 151 97 5 101 67 7 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 115 73 3 180 121 7 216 156 8
- 236 180 22 242 182 11 245 189 11 245 189 11 242 182 11
- 236 180 10 224 165 9 215 150 13 206 142 8 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 156 102 5 164 109 5 172 114 5 180 121 7 180 121 7
- 192 133 7 201 142 7 216 156 8 224 165 9 236 180 22
- 245 189 11 242 182 11 229 172 9 201 142 7 172 114 5
- 125 83 5 83 54 6 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 2 2 3 2 2 3 2 2 3
- 2 2 3 2 2 3 91 58 5 156 102 5 192 133 7
- 216 156 8 229 172 9 236 180 10 236 180 10 229 172 9
- 215 150 13 199 140 8 164 109 5 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 120 78 3 132 82 3
- 151 97 5 157 106 7 180 121 7 185 132 9 193 140 10
- 207 148 7 207 148 7 192 133 7 172 114 5 132 82 3
- 101 67 7 41 27 3 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 73 48 6 143 90 3 180 121 7
- 192 133 7 207 148 7 207 148 7 201 142 7 185 132 9
- 173 120 10 136 95 7 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 91 58 5 125 83 5 135 88 5
- 144 95 7 151 97 5 132 82 3 115 73 3 95 62 5
- 64 43 7 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 64 43 7 91 58 5 151 97 5
- 157 106 7 172 114 5 172 114 5 164 109 5 151 97 5
- 85 59 6 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 73 48 6
- 91 58 5 95 62 5 95 62 5 91 58 5 56 38 5
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 83 54 6
- 107 69 5 132 82 3 125 83 5 101 67 7 71 47 31
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
- 215 150 13 215 150 13 215 150 13 215 150 13 215 150 13
diff --git a/drivers/video/of_display_timing.c b/drivers/video/of_display_timing.c
index 8ce0a99bf17c..83b8963c9657 100644
--- a/drivers/video/of_display_timing.c
+++ b/drivers/video/of_display_timing.c
@@ -244,23 +244,3 @@ dispfail:
return NULL;
}
EXPORT_SYMBOL_GPL(of_get_display_timings);
-
-/**
- * of_display_timings_exist - check if a display-timings node is provided
- * @np: device_node with the timing
- **/
-int of_display_timings_exist(const struct device_node *np)
-{
- struct device_node *timings_np;
-
- if (!np)
- return -EINVAL;
-
- timings_np = of_parse_phandle(np, "display-timings", 0);
- if (!timings_np)
- return -EINVAL;
-
- of_node_put(timings_np);
- return 1;
-}
-EXPORT_SYMBOL_GPL(of_display_timings_exist);