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authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>2021-03-31 13:57:35 +0300
committerRob Clark <robdclark@chromium.org>2021-04-07 11:05:47 -0700
commit36c5dde5fdf028daf005197a4dd08b196784bf9e (patch)
treeeeb0fa41956d40edb7db3780456e6426a96e7566 /drivers/watchdog/ebc-c384_wdt.c
parent6e2ad9c3bfca3e43f0b66c85385f12bd254ef92d (diff)
drm/msm/dsi: stop passing src_pll_id to the phy_enable call
Phy driver already knows the source PLL id basing on the set usecase and the current PLL id. Stop passing it to the phy_enable call. As a reminder, dsi manager will always use DSI 0 as a clock master in a slave mode, so PLL 0 is always a clocksource for DSI 0 and it is always a clocksource for DSI 1 too unless DSI 1 is used in the standalone mode. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Stephen Boyd <swboyd@chromium.org> # on sc7180 lazor Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Link: https://lore.kernel.org/r/20210331105735.3690009-25-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/watchdog/ebc-c384_wdt.c')
0 files changed, 0 insertions, 0 deletions