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authorMatt Roper <matthew.d.roper@intel.com>2023-08-11 09:06:13 -0700
committerRodrigo Vivi <rodrigo.vivi@intel.com>2023-12-21 11:40:25 -0500
commite9bb0891e69055cdfc1053f297b1b8b033372975 (patch)
tree777c150d5c50aa671d7603c96918e109aa6bf0f8 /drivers
parent595e4a3aade359f8e3bc84bd30746cb5826c4e67 (diff)
drm/xe/xe2: Track VA bits independently of max page table level
Starting with Xe2, a 5-level page table is always used, regardless of the actual virtual address range supported by the platform. The two values need to be tracked separately in the device descriptor since Xe2 platforms only have a 48 bit virtual address range. Bspec: 59505, 65637, 70817 Cc: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/xe/xe_device_types.h2
-rw-r--r--drivers/gpu/drm/xe/xe_pci.c6
-rw-r--r--drivers/gpu/drm/xe/xe_pci_types.h1
-rw-r--r--drivers/gpu/drm/xe/xe_query.c3
-rw-r--r--drivers/gpu/drm/xe/xe_vm.c2
5 files changed, 11 insertions, 3 deletions
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 6e852809d3ac..552e8a343d8f 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -210,6 +210,8 @@ struct xe_device {
u8 gt_count;
/** @vm_max_level: Max VM level */
u8 vm_max_level;
+ /** @va_bits: Maximum bits of a virtual address */
+ u8 va_bits;
/** @is_dgfx: is discrete device */
u8 is_dgfx:1;
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 467b0cef6d21..8512cd451887 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -94,6 +94,7 @@ static const struct xe_graphics_desc graphics_xelp = {
.hw_engine_mask = BIT(XE_HW_ENGINE_RCS0) | BIT(XE_HW_ENGINE_BCS0),
.dma_mask_size = 39,
+ .va_bits = 48,
.vm_max_level = 3,
};
@@ -105,6 +106,7 @@ static const struct xe_graphics_desc graphics_xelpp = {
.hw_engine_mask = BIT(XE_HW_ENGINE_RCS0) | BIT(XE_HW_ENGINE_BCS0),
.dma_mask_size = 39,
+ .va_bits = 48,
.vm_max_level = 3,
};
@@ -112,6 +114,7 @@ static const struct xe_graphics_desc graphics_xelpp = {
.has_range_tlb_invalidation = true, \
.has_flat_ccs = true, \
.dma_mask_size = 46, \
+ .va_bits = 48, \
.vm_max_level = 3
static const struct xe_graphics_desc graphics_xehpg = {
@@ -145,6 +148,7 @@ static const struct xe_graphics_desc graphics_xehpc = {
XE_HP_FEATURES,
.dma_mask_size = 52,
.max_remote_tiles = 1,
+ .va_bits = 57,
.vm_max_level = 4,
.vram_flags = XE_VRAM_FLAGS_NEED64K,
@@ -170,6 +174,7 @@ static const struct xe_graphics_desc graphics_xelpg = {
.has_flat_ccs = 0 /* FIXME: implementation missing */, \
.has_range_tlb_invalidation = 1, \
.supports_usm = 0 /* FIXME: implementation missing */, \
+ .va_bits = 48, \
.vm_max_level = 4, \
.hw_engine_mask = \
BIT(XE_HW_ENGINE_RCS0) | \
@@ -560,6 +565,7 @@ static int xe_info_init(struct xe_device *xe,
xe->info.dma_mask_size = graphics_desc->dma_mask_size;
xe->info.vram_flags = graphics_desc->vram_flags;
+ xe->info.va_bits = graphics_desc->va_bits;
xe->info.vm_max_level = graphics_desc->vm_max_level;
xe->info.supports_usm = graphics_desc->supports_usm;
xe->info.has_asid = graphics_desc->has_asid;
diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h
index ba31b933eb8e..df6ddbc52d7f 100644
--- a/drivers/gpu/drm/xe/xe_pci_types.h
+++ b/drivers/gpu/drm/xe/xe_pci_types.h
@@ -14,6 +14,7 @@ struct xe_graphics_desc {
u8 rel;
u8 dma_mask_size; /* available DMA address bits */
+ u8 va_bits;
u8 vm_max_level;
u8 vram_flags;
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index 7ea235c71385..1db77a7c9039 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -197,8 +197,7 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
XE_QUERY_CONFIG_FLAGS_HAS_VRAM;
config->info[XE_QUERY_CONFIG_MIN_ALIGNEMENT] =
xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;
- config->info[XE_QUERY_CONFIG_VA_BITS] = 12 +
- (9 * (xe->info.vm_max_level + 1));
+ config->info[XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;
config->info[XE_QUERY_CONFIG_GT_COUNT] = xe->info.gt_count;
config->info[XE_QUERY_CONFIG_MEM_REGION_COUNT] =
hweight_long(xe->info.mem_region_mask);
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index d683418b817d..a774f9632dda 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -1221,7 +1221,7 @@ struct xe_vm *xe_vm_create(struct xe_device *xe, u32 flags)
vm->xe = xe;
- vm->size = 1ull << xe_pt_shift(xe->info.vm_max_level + 1);
+ vm->size = 1ull << xe->info.va_bits;
vm->flags = flags;