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authorAnurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>2017-08-21 13:17:20 +0200
committerTejun Heo <tj@kernel.org>2017-10-23 07:09:26 -0700
commit05e890d8438651777cf05a19aa3c29519cd762ea (patch)
tree9b135f7d6cf6c57bd54399f47207d527ada4bcee /drivers
parentff0d63778ca0c2cec9ce33d69b69fe5f8567169b (diff)
ata: ceva: Make RxWaterMark value as module parameter
This patch updates the driver to make Rx Fifo water mark value as a module parameter. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Tejun Heo <tj@kernel.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/ata/ahci_ceva.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/ata/ahci_ceva.c b/drivers/ata/ahci_ceva.c
index b63fab2507fa..eff40ec86065 100644
--- a/drivers/ata/ahci_ceva.c
+++ b/drivers/ata/ahci_ceva.c
@@ -71,6 +71,10 @@
#define DRV_NAME "ahci-ceva"
#define CEVA_FLAG_BROKEN_GEN2 1
+static unsigned int rx_watermark = PTC_RX_WM_VAL;
+module_param(rx_watermark, uint, 0644);
+MODULE_PARM_DESC(rx_watermark, "RxWaterMark value (0 - 0x80)");
+
struct ceva_ahci_priv {
struct platform_device *ahci_pdev;
/* Port Phy2Cfg Register */
@@ -152,7 +156,7 @@ static void ahci_ceva_setup(struct ahci_host_priv *hpriv)
writel(cevapriv->pp5c[i], mmio + AHCI_VEND_PP5C);
/* Rx Watermark setting */
- tmp = PTC_RX_WM_VAL | PTC_RSVD;
+ tmp = rx_watermark | PTC_RSVD;
writel(tmp, mmio + AHCI_VEND_PTC);
/* Default to Gen 3 Speed and Gen 1 if Gen2 is broken */