diff options
author | Russell King <rmk+kernel@armlinux.org.uk> | 2020-03-29 12:24:59 +0100 |
---|---|---|
committer | Russell King <rmk+kernel@armlinux.org.uk> | 2020-08-03 22:09:44 +0100 |
commit | 7ee44c175fedf2a8fe1741881fabcf1b799ab443 (patch) | |
tree | a664edb504fde4701ef643b065a6a304da48f387 /drivers | |
parent | a5565e627bb566a6e682c37011a10be32c7372a9 (diff) |
gpio: mvebu: fix PWM period calculation
The period of a PWM signal is the sum of the on and off durations. The
calculation being used by gpio-mvebu is not correct, resulting in the
period being miscalculated and invalid. Fix this.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpio/gpio-mvebu.c | 24 |
1 files changed, 10 insertions, 14 deletions
diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c index bd65114eb170..8399ff02c243 100644 --- a/drivers/gpio/gpio-mvebu.c +++ b/drivers/gpio/gpio-mvebu.c @@ -660,8 +660,8 @@ static void mvebu_pwm_get_state(struct pwm_chip *chip, spin_lock_irqsave(&mvpwm->lock, flags); - val = (unsigned long long) - readl_relaxed(mvebu_pwmreg_blink_on_duration(mvpwm)); + u = readl_relaxed(mvebu_pwmreg_blink_on_duration(mvpwm)); + val = u; val *= NSEC_PER_SEC; do_div(val, mvpwm->clk_rate); if (val > UINT_MAX) @@ -671,21 +671,17 @@ static void mvebu_pwm_get_state(struct pwm_chip *chip, else state->duty_cycle = 1; - val = (unsigned long long) - readl_relaxed(mvebu_pwmreg_blink_off_duration(mvpwm)); + val = u; + u = readl_relaxed(mvebu_pwmreg_blink_off_duration(mvpwm)); + val += u; val *= NSEC_PER_SEC; do_div(val, mvpwm->clk_rate); - if (val < state->duty_cycle) { + if (val > UINT_MAX) + state->period = UINT_MAX; + else if (val) + state->period = val; + else state->period = 1; - } else { - val -= state->duty_cycle; - if (val > UINT_MAX) - state->period = UINT_MAX; - else if (val) - state->period = val; - else - state->period = 1; - } regmap_read(mvchip->regs, GPIO_BLINK_EN_OFF + mvchip->offset, &u); if (u) |