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authorVinod Koul <vkoul@kernel.org>2019-12-23 20:00:46 +0530
committerKishon Vijay Abraham I <kishon@ti.com>2020-01-08 12:58:06 +0530
commitd0312fdbf3e1dc34bc370b17fee290921cf9b814 (patch)
tree5b64c302b5d8d128469b3f42df653f79cc4337a6 /drivers
parent7d59e8e8fdd0d690c7b6956d591125321a508c5f (diff)
phy: qcom-qmp: Add SW reset register
For V4 QMP UFS Phy, we need to assert reset bits, configure the phy and then deassert it, so add the QPHY_SW_RESET register which does this. Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Manu Gautam <mgautam@codeaurora.org> Reviewed-by: Can Guo <cang@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/phy/qualcomm/phy-qcom-qmp.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
index dee5616253f5..45c9de4a6f55 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -168,6 +168,7 @@ static const unsigned int sdm845_ufsphy_regs_layout[] = {
static const unsigned int sm8150_ufsphy_regs_layout[] = {
[QPHY_START_CTRL] = QPHY_V4_PHY_START,
[QPHY_PCS_READY_STATUS] = QPHY_V4_PCS_READY_STATUS,
+ [QPHY_SW_RESET] = QPHY_V4_SW_RESET,
};
static const struct qmp_phy_init_tbl msm8996_pcie_serdes_tbl[] = {