summaryrefslogtreecommitdiff
path: root/include/acpi
diff options
context:
space:
mode:
authorSunil V L <sunilvl@ventanamicro.com>2023-04-05 15:40:57 +0200
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2023-04-06 20:29:11 +0200
commit003567a3b70d0dc5adf71ca0b2bd43d2b4a1ee26 (patch)
treed2eb6342645914943ec65a372bc970f137a430df /include/acpi
parentf2ca92d08325b8d4668a6b3ee4b3d5622b75b952 (diff)
ACPICA: Add structure definitions for RISC-V RHCT
ACPICA commit 82afd0434e79f74b96a6be88115ddc8343a1ba40 RISC-V Hart Capabilities Table (RHCT) is a new static table. The ECR to add RHCT is approved by the UEFI forum and will be available in the next version of the ACPI spec. Link: https://github.com/acpica/acpica/commit/82afd043 Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'include/acpi')
-rw-r--r--include/acpi/actbl2.h48
1 files changed, 48 insertions, 0 deletions
diff --git a/include/acpi/actbl2.h b/include/acpi/actbl2.h
index 9af17cb66faa..db292f325696 100644
--- a/include/acpi/actbl2.h
+++ b/include/acpi/actbl2.h
@@ -48,6 +48,7 @@
#define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */
#define ACPI_SIG_RASF "RASF" /* RAS Feature table */
#define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */
+#define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */
#define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
#define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */
#define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
@@ -2722,6 +2723,53 @@ enum acpi_rgrt_image_type {
/*******************************************************************************
*
+ * RHCT - RISC-V Hart Capabilities Table
+ * Version 1
+ *
+ ******************************************************************************/
+
+struct acpi_table_rhct {
+ struct acpi_table_header header; /* Common ACPI table header */
+ u32 reserved;
+ u64 time_base_freq;
+ u32 node_count;
+ u32 node_offset;
+};
+
+/*
+ * RHCT subtables
+ */
+struct acpi_rhct_node_header {
+ u16 type;
+ u16 length;
+ u16 revision;
+};
+
+/* Values for RHCT subtable Type above */
+
+enum acpi_rhct_node_type {
+ ACPI_RHCT_NODE_TYPE_ISA_STRING = 0x0000,
+ ACPI_RHCT_NODE_TYPE_HART_INFO = 0xFFFF,
+};
+
+/*
+ * RHCT node specific subtables
+ */
+
+/* ISA string node structure */
+struct acpi_rhct_isa_string {
+ u16 isa_length;
+ char isa[];
+};
+
+/* Hart Info node structure */
+struct acpi_rhct_hart_info {
+ u16 num_offsets;
+ u32 uid; /* ACPI processor UID */
+};
+
+/*******************************************************************************
+ *
* SBST - Smart Battery Specification Table
* Version 1
*