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authorStefan Kristiansson <stefan.kristiansson@saunalahti.fi>2014-05-13 22:30:56 +0300
committerStafford Horne <shorne@gmail.com>2017-02-25 04:14:06 +0900
commitbc19598f1dde267e5214e386b97bb647973275db (patch)
treefb35f0097281aa51ce3b629342f4a4287693a7de /include/asm-generic/atomic.h
parent11595172537788f0007bfc16590aab18f2b9c40f (diff)
openrisc: add optimized atomic operations
Using the l.lwa and l.swa atomic instruction pair. Most openrisc processor cores provide these instructions now. If the instructions are not available emulation is provided. Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> [shorne@gmail.com: remove OPENRISC_HAVE_INST_LWA_SWA config suggesed by Alan Cox https://lkml.org/lkml/2014/7/23/666] [shorne@gmail.com: expand to implement all ops suggested by Peter Zijlstra https://lkml.org/lkml/2017/2/20/317] Signed-off-by: Stafford Horne <shorne@gmail.com>
Diffstat (limited to 'include/asm-generic/atomic.h')
-rw-r--r--include/asm-generic/atomic.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-generic/atomic.h b/include/asm-generic/atomic.h
index 9ed8b987185b..3f38eb03649c 100644
--- a/include/asm-generic/atomic.h
+++ b/include/asm-generic/atomic.h
@@ -223,6 +223,7 @@ static inline void atomic_dec(atomic_t *v)
#define atomic_xchg(ptr, v) (xchg(&(ptr)->counter, (v)))
#define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), (old), (new)))
+#ifndef __atomic_add_unless
static inline int __atomic_add_unless(atomic_t *v, int a, int u)
{
int c, old;
@@ -231,5 +232,6 @@ static inline int __atomic_add_unless(atomic_t *v, int a, int u)
c = old;
return c;
}
+#endif
#endif /* __ASM_GENERIC_ATOMIC_H */