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authorAndi Kleen <ak@suse.de>2005-07-28 21:15:25 -0700
committerLinus Torvalds <torvalds@g5.osdl.org>2005-07-28 21:45:57 -0700
commit74f0629397cb435e144ff47c48f3bc39e879f196 (patch)
treea5e7a0c889304e3e56b54ea2c8006aa23589cd11 /include/asm-x86_64
parentacc7b6f01c3d387faa34233a25949eaaf18e0753 (diff)
[PATCH] x86_64: Use for_each_cpu_mask for clustered IPI flush
Makes it slightly more efficient. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-x86_64')
-rw-r--r--include/asm-x86_64/ipi.h45
1 files changed, 21 insertions, 24 deletions
diff --git a/include/asm-x86_64/ipi.h b/include/asm-x86_64/ipi.h
index d1841847ed89..5e166b9d3bde 100644
--- a/include/asm-x86_64/ipi.h
+++ b/include/asm-x86_64/ipi.h
@@ -82,30 +82,27 @@ static inline void send_IPI_mask_sequence(cpumask_t mask, int vector)
*/
local_irq_save(flags);
- for (query_cpu = 0; query_cpu < NR_CPUS; ++query_cpu) {
- if (cpu_isset(query_cpu, mask)) {
-
- /*
- * Wait for idle.
- */
- apic_wait_icr_idle();
-
- /*
- * prepare target chip field
- */
- cfg = __prepare_ICR2(x86_cpu_to_apicid[query_cpu]);
- apic_write_around(APIC_ICR2, cfg);
-
- /*
- * program the ICR
- */
- cfg = __prepare_ICR(0, vector, APIC_DEST_PHYSICAL);
-
- /*
- * Send the IPI. The write to APIC_ICR fires this off.
- */
- apic_write_around(APIC_ICR, cfg);
- }
+ for_each_cpu_mask(query_cpu, mask) {
+ /*
+ * Wait for idle.
+ */
+ apic_wait_icr_idle();
+
+ /*
+ * prepare target chip field
+ */
+ cfg = __prepare_ICR2(x86_cpu_to_apicid[query_cpu]);
+ apic_write_around(APIC_ICR2, cfg);
+
+ /*
+ * program the ICR
+ */
+ cfg = __prepare_ICR(0, vector, APIC_DEST_PHYSICAL);
+
+ /*
+ * Send the IPI. The write to APIC_ICR fires this off.
+ */
+ apic_write_around(APIC_ICR, cfg);
}
local_irq_restore(flags);
}