summaryrefslogtreecommitdiff
path: root/include/drm/drm_dp_helper.h
diff options
context:
space:
mode:
authorManasi Navare <manasi.d.navare@intel.com>2018-10-30 17:19:20 -0700
committerManasi Navare <manasi.d.navare@intel.com>2018-10-31 14:08:32 -0700
commit0575650077eae2a431f33532de4e15405cc9f653 (patch)
tree84710dad08f922bbb456d2f3ff9ae7951ae1adc1 /include/drm/drm_dp_helper.h
parent93ac092f054b25e41341b008fdb1ac69c9a8334c (diff)
drm/dp: DRM DP helper/macros to get DP sink DSC parameters
This patch adds inline functions and helpers for obtaining DP sink's supported DSC parameters like DSC sink support, eDP compressed BPP supported, maximum slice count supported by the sink devices, DSC line buffer bit depth supported on DP sink, DSC sink maximum color depth by parsing corresponding DPCD registers. v4: * Add helper to give line buf bit depth (Manasi) * Correct the bit masking in color depth helper (manasi) v3: * Use SLICE_CAP_2 for DP (Anusha) v2: * Add DSC sink support macro (Jani N) Cc: Gaurav K Singh <gaurav.k.singh@intel.com> Cc: dri-devel@lists.freedesktop.org Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Reviewed-by: Gaurav K Singh <gaurav.k.singh@intel.com> Acked-by: Sean Paul <seanpaul@chromium.org> (For merging through drm-intel) Link: https://patchwork.freedesktop.org/patch/msgid/20181031001923.31442-4-manasi.d.navare@intel.com
Diffstat (limited to 'include/drm/drm_dp_helper.h')
-rw-r--r--include/drm/drm_dp_helper.h30
1 files changed, 30 insertions, 0 deletions
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 4139738d3024..636607388a66 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -1116,6 +1116,36 @@ drm_dp_is_branch(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
return dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_PRESENT;
}
+/* DP/eDP DSC support */
+u8 drm_dp_dsc_sink_max_slice_count(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE],
+ bool is_edp);
+u8 drm_dp_dsc_sink_line_buf_depth(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]);
+u8 drm_dp_dsc_sink_max_color_depth(const u8 dsc_dpc[DP_DSC_RECEIVER_CAP_SIZE]);
+
+static inline bool
+drm_dp_sink_supports_dsc(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
+{
+ return dsc_dpcd[DP_DSC_SUPPORT - DP_DSC_SUPPORT] &
+ DP_DSC_DECOMPRESSION_IS_SUPPORTED;
+}
+
+static inline u16
+drm_edp_dsc_sink_output_bpp(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
+{
+ return dsc_dpcd[DP_DSC_MAX_BITS_PER_PIXEL_LOW - DP_DSC_SUPPORT] |
+ (dsc_dpcd[DP_DSC_MAX_BITS_PER_PIXEL_HI - DP_DSC_SUPPORT] &
+ DP_DSC_MAX_BITS_PER_PIXEL_HI_MASK <<
+ DP_DSC_MAX_BITS_PER_PIXEL_HI_SHIFT);
+}
+
+static inline u32
+drm_dp_dsc_sink_max_slice_width(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
+{
+ /* Max Slicewidth = Number of Pixels * 320 */
+ return dsc_dpcd[DP_DSC_MAX_SLICE_WIDTH - DP_DSC_SUPPORT] *
+ DP_DSC_SLICE_WIDTH_MULTIPLIER;
+}
+
/*
* DisplayPort AUX channel
*/