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authorDave Airlie <airlied@redhat.com>2018-03-26 10:01:11 +1000
committerDave Airlie <airlied@redhat.com>2018-03-26 10:01:11 +1000
commit33d009cd889490838c5db9b9339856c9e3d3facc (patch)
treea447078a59708c6b8ebe0a737a3be404ac98bd53 /include/drm
parentb4eec0fa537165efc3265cdbb4bac06e6bdaf596 (diff)
parent09695ad78f1f5f315c7e9c5090f0c7b846a43690 (diff)
Merge branch 'drm-next-4.17' of git://people.freedesktop.org/~agd5f/linux into drm-next
Last pull for 4.17. Highlights: - Vega12 support - A few more bug fixes and cleanups for powerplay * 'drm-next-4.17' of git://people.freedesktop.org/~agd5f/linux: (77 commits) drm/amd/pp: clean header file hwmgr.h drm/amd/pp: use mlck_table.count for array loop index limit drm/amdgpu: Add an ATPX quirk for hybrid laptop drm/amdgpu: fix spelling mistake: "asssert" -> "assert" drm/amd/pp: Add new asic support in pp_psm.c drm/amd/pp: Clean up powerplay code on Vega12 drm/amd/pp: Add smu irq handlers for legacy asics drm/amd/pp: Fix set wrong temperature range on smu7 drm/amdgpu: Don't change preferred domian when fallback GTT v5 drm/amdgpu: Fix NULL ptr on driver unload due to init failure. drm/amdgpu: fix "mitigate workaround for i915" drm/amd/pp: Add smu irq handlers in sw_init instand of hw_init drm/amd/pp: Refine register_thermal_interrupt function drm/amdgpu: Remove wrapper layer of cgs irq handling drm/amd/powerplay: Return per DPM level clock drm/amd/powerplay: Remove the SOC floor voltage setting drm/amdgpu: no job timeout setting on compute queues drm/amdgpu: add vega12 pci ids (v2) drm/amd/powerplay: add the hw manager for vega12 (v4) drm/amd/powerplay: add the smu manager for vega12 (v4) ...
Diffstat (limited to 'include/drm')
-rw-r--r--include/drm/amd_asic_type.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/drm/amd_asic_type.h b/include/drm/amd_asic_type.h
index 599028f66585..6c731c52c071 100644
--- a/include/drm/amd_asic_type.h
+++ b/include/drm/amd_asic_type.h
@@ -45,6 +45,7 @@ enum amd_asic_type {
CHIP_POLARIS11,
CHIP_POLARIS12,
CHIP_VEGA10,
+ CHIP_VEGA12,
CHIP_RAVEN,
CHIP_LAST,
};