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authorDave Airlie <airlied@redhat.com>2015-07-24 14:29:06 +1000
committerDave Airlie <airlied@redhat.com>2015-07-24 14:29:06 +1000
commitf60de9767490a73b54c2754e1de83fc68eb7d9a0 (patch)
tree66789fa6a012579e04049ee144424f1707ca8f12 /include/drm
parentfa78ceab99e4481e17ab6b6a88257c1c7c23d55a (diff)
parente0548f1979bfee900fb0671a5dd3a2f217dce5df (diff)
Merge tag 'drm-intel-next-2015-07-17' of git://anongit.freedesktop.org/drm-intel into drm-next
- prelim hw support dropped for skl after Damien fixed an ABI issue around planes - legacy modesetting is done using atomic infrastructure now (Maarten)! - more gen9 workarounds (Arun&Nick) - MOCS programming (cache control for better performance) for skl/bxt - vlv/chv dpll improvements (Ville) - PSR fixes from Rodrigo - fbc improvements from Paulo - plumb requests into execlist submit functions (Mika) - opregion code cleanup from Jani - resource streamer support from Abdiel for mesa - final fixes for 12bpc hdmi + enabling support from Ville drm-intel-next-2015-07-03: - dsi improvements (Gaurav) - bxt ddi dpll hw state readout (Imre) - chv dvfs support and overall wm improvements for both vlv and chv (Ville) - ppgtt polish from Mika and Michel - cdclk support for bxt (Bob Pauwe) - make frontbuffer tracking more precise - OLR removal (John Harrison) - per-ctx WA batch buffer support (Arun Siluvery) - remvoe KMS Kconfig option (Chris) - more hpd handling refactoring from Jani - use atomic states throughout modeset code and integrate with atomic plane update (Maarten) drm-intel-next-2015-06-19: - refactoring hpd irq handlers (Jani) - polish skl dpll code a bit (Damien) - dynamic cdclk adjustement (Ville & Mika) - fix up 12bpc hdmi and enable it for real again (Ville) - extend hsw cmd parser to be useful for atomic configuration (Franscico Jerez) - even more atomic conversion and rolling state handling out across modeset code from Maarten & Ander - fix DRRS idleness detection (Ramalingam) - clean up dsp address alignment handling (Ville) - some fbc cleanup patches from Paulo - prevent hard-hangs when trying to reset the gpu on skl (Mika) * tag 'drm-intel-next-2015-07-17' of git://anongit.freedesktop.org/drm-intel: (386 commits) drm/i915: Update DRIVER_DATE to 20150717 drm/i915/skl: Drop the preliminary_hw_support flag drm/i915/skl: Don't expose the top most plane on gen9 display drm/i915: Fix divide by zero on watermark update drm/i915: Invert fastboot check drm/i915: Clarify logic for initial modeset drm/i915: Unconditionally check gmch pfit state drm/i915: always disable irqs in intel_pipe_update_start drm/i915: Remove use of runtime pm in atomic commit functions drm/i915: Call plane update functions directly from intel_atomic_commit. drm/i915: Use full atomic modeset. drm/i915/gen9: Add WaSetDisablePixMaskCammingAndRhwoInCommonSliceChicken drm/i915/gen9: Add WaFlushCoherentL3CacheLinesAtContextSwitch workaround drm/i915/gen9: Add WaDisableCtxRestoreArbitration workaround drm/i915: Enable WA batch buffers for Gen9 drm/i915/gen9: Implement WaDisableKillLogic for gen 9 drm/i915: Use expcitly fixed type in compat32 structs drm/i915: Fix noatomic crtc disabling, v2. drm/i915: fill in more mode members drm/i915: Added BXT check in HAS_CORE_RING_FREQ macro ...
Diffstat (limited to 'include/drm')
-rw-r--r--include/drm/intel-gtt.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h
index b08bdade6002..9e9bddaa58a5 100644
--- a/include/drm/intel-gtt.h
+++ b/include/drm/intel-gtt.h
@@ -3,8 +3,8 @@
#ifndef _DRM_INTEL_GTT_H
#define _DRM_INTEL_GTT_H
-void intel_gtt_get(size_t *gtt_total, size_t *stolen_size,
- phys_addr_t *mappable_base, unsigned long *mappable_end);
+void intel_gtt_get(u64 *gtt_total, size_t *stolen_size,
+ phys_addr_t *mappable_base, u64 *mappable_end);
int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
struct agp_bridge_data *bridge);