diff options
| author | Paul Cercueil <paul@crapouillou.net> | 2021-10-16 14:33:21 +0100 |
|---|---|---|
| committer | Rob Herring <robh@kernel.org> | 2021-11-11 22:27:14 -0600 |
| commit | c4a11bf423ec84a16f7df0773041c29f2f305cc1 (patch) | |
| tree | 2345d1b872d7a32d1e1dfca19be8a96b16dfdd5c /include/dt-bindings/clock/ingenic,jz4725b-cgu.h | |
| parent | 5833291ab6de9c3e2374336b51c814e515e8f3a5 (diff) | |
dt-bindings: Rename Ingenic CGU headers to ingenic,*.h
Tidy up a bit the tree, by prefixing all include/dt-bindings/clock/ files
related to Ingenic SoCs with 'ingenic,'.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211016133322.40771-1-paul@crapouillou.net
Diffstat (limited to 'include/dt-bindings/clock/ingenic,jz4725b-cgu.h')
| -rw-r--r-- | include/dt-bindings/clock/ingenic,jz4725b-cgu.h | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/ingenic,jz4725b-cgu.h b/include/dt-bindings/clock/ingenic,jz4725b-cgu.h new file mode 100644 index 000000000000..31f1ab0fe42c --- /dev/null +++ b/include/dt-bindings/clock/ingenic,jz4725b-cgu.h @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * This header provides clock numbers for the ingenic,jz4725b-cgu DT binding. + */ + +#ifndef __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__ +#define __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__ + +#define JZ4725B_CLK_EXT 0 +#define JZ4725B_CLK_OSC32K 1 +#define JZ4725B_CLK_PLL 2 +#define JZ4725B_CLK_PLL_HALF 3 +#define JZ4725B_CLK_CCLK 4 +#define JZ4725B_CLK_HCLK 5 +#define JZ4725B_CLK_PCLK 6 +#define JZ4725B_CLK_MCLK 7 +#define JZ4725B_CLK_IPU 8 +#define JZ4725B_CLK_LCD 9 +#define JZ4725B_CLK_I2S 10 +#define JZ4725B_CLK_SPI 11 +#define JZ4725B_CLK_MMC_MUX 12 +#define JZ4725B_CLK_UDC 13 +#define JZ4725B_CLK_UART 14 +#define JZ4725B_CLK_DMA 15 +#define JZ4725B_CLK_ADC 16 +#define JZ4725B_CLK_I2C 17 +#define JZ4725B_CLK_AIC 18 +#define JZ4725B_CLK_MMC0 19 +#define JZ4725B_CLK_MMC1 20 +#define JZ4725B_CLK_BCH 21 +#define JZ4725B_CLK_TCU 22 +#define JZ4725B_CLK_EXT512 23 +#define JZ4725B_CLK_RTC 24 +#define JZ4725B_CLK_UDC_PHY 25 + +#endif /* __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__ */ |