diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2017-04-03 11:53:08 +0200 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2017-04-03 06:33:23 -0400 |
| commit | 7b39e985cfc18bba43646240b10a830046382abf (patch) | |
| tree | 16f070c19821a69f6b3b0444adf56f0b3aea5e05 /include/dt-bindings/clock/r8a7792-clock.h | |
| parent | 1cd9028027c7a7c10b774df698c3cfafec6aa67d (diff) | |
ARM: dts: r8a7792: Correct Z clock
Unlike other R-Car Gen2 SoCs with Cortex-A15 CPU cores, R-Car V2H does
not have a programmable Z clock (Cortex-A15 CPU core clock), but uses a
fixed divider.
This is similar to the Z2 clock (Cortex-A7 CPU core clock) on R-Car E2.
Hence:
- Remove the Z clock output from the cpg_clocks node, as this implied
a programmable clock,
- Add the Z clock as a fixed factor clock,
- Let the first CPU node point to the new Z clock,
- Remove the Z clock index from the bindings (this definition was used
by r8a7792.dtsi only, and was not a contract between DT and driver).
Fixes: 7c4163aae3d8e5b9 ("ARM: dts: r8a7792: initial SoC device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'include/dt-bindings/clock/r8a7792-clock.h')
| -rw-r--r-- | include/dt-bindings/clock/r8a7792-clock.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/r8a7792-clock.h b/include/dt-bindings/clock/r8a7792-clock.h index 94dd16a1e6e6..5be90bc23bd7 100644 --- a/include/dt-bindings/clock/r8a7792-clock.h +++ b/include/dt-bindings/clock/r8a7792-clock.h @@ -17,7 +17,6 @@ #define R8A7792_CLK_PLL3 3 #define R8A7792_CLK_LB 4 #define R8A7792_CLK_QSPI 5 -#define R8A7792_CLK_Z 6 /* MSTP0 */ #define R8A7792_CLK_MSIOF0 0 |