diff options
| author | Mikko Perttunen <mperttunen@nvidia.com> | 2021-11-12 13:35:34 +0100 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2021-12-16 16:43:49 +0100 |
| commit | fc5e0e37621973758e7e49dd85f28673e72e4b85 (patch) | |
| tree | 2e70d70df8fccf3f862ff160ad3277dbde8fedd5 /include/dt-bindings/clock/tegra234-clock.h | |
| parent | fa55b7dcdc43c1aa1ba12bca9d2dd4318c2a0dbf (diff) | |
dt-bindings: Update headers for Tegra234
Add a few more clocks that will be used in follow-up patches to enable
more functionality on Tegra234.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'include/dt-bindings/clock/tegra234-clock.h')
| -rw-r--r-- | include/dt-bindings/clock/tegra234-clock.h | 17 |
1 files changed, 14 insertions, 3 deletions
diff --git a/include/dt-bindings/clock/tegra234-clock.h b/include/dt-bindings/clock/tegra234-clock.h index 2c82072950ee..21ed0c732fb9 100644 --- a/include/dt-bindings/clock/tegra234-clock.h +++ b/include/dt-bindings/clock/tegra234-clock.h @@ -4,11 +4,22 @@ #ifndef DT_BINDINGS_CLOCK_TEGRA234_CLOCK_H #define DT_BINDINGS_CLOCK_TEGRA234_CLOCK_H +/** + * @file + * @defgroup bpmp_clock_ids Clock ID's + * @{ + */ /** @brief output of gate CLK_ENB_FUSE */ -#define TEGRA234_CLK_FUSE 40 +#define TEGRA234_CLK_FUSE 40U /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC4 */ -#define TEGRA234_CLK_SDMMC4 123 +#define TEGRA234_CLK_SDMMC4 123U /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_UARTA */ -#define TEGRA234_CLK_UARTA 155 +#define TEGRA234_CLK_UARTA 155U +/** @brief CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC_LEGACY_TM switch divider output */ +#define TEGRA234_CLK_SDMMC_LEGACY_TM 219U +/** @brief PLL controlled by CLK_RST_CONTROLLER_PLLC4_BASE */ +#define TEGRA234_CLK_PLLC4 237U +/** @brief 32K input clock provided by PMIC */ +#define TEGRA234_CLK_CLK_32K 289U #endif |