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authorChen-Yu Tsai <wens@csie.org>2016-08-25 14:21:58 +0800
committerMaxime Ripard <maxime.ripard@free-electrons.com>2016-08-25 22:30:36 +0200
commit8adfb08605a99d742853ff8cf4da5bc68db2028a (patch)
tree48cf32d443456015e70f70d550380fffc265a708 /include/dt-bindings/reset
parentff5294db4161d7121c0251527d6ea2f1f9c91854 (diff)
clk: sunxi-ng: mux: Add clk notifier functions
On sunxi we support cpufreq by changing the clock rate of PLL-CPU. It's possible the clock output of the PLL goes out of the CPU's operational limits when the PLL's multipliers / dividers are changed and it hasn't stabilized yet. This would result in the CPU hanging. To circumvent this, we temporarily switch the CPU mux clock to another stable clock before the rate change, and switch it back after the PLL stabilizes. This is done with clk notifiers registered on the PLL. This patch adds common functions for notifiers to reparent mux clocks. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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