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authorArnd Bergmann <arnd@arndb.de>2018-01-05 17:06:04 +0100
committerArnd Bergmann <arnd@arndb.de>2018-01-05 17:06:04 +0100
commitb55eb1ae91e986ff75b1cd6ff8889d056ad68a10 (patch)
tree3af373d0910b5d1eed54471cfc95e9ff505aaa53 /include/dt-bindings
parent7598a4e035b81c5e2a3dae17b33d77232141124a (diff)
parente40ed274489a5f516da120186578eb379b452ac6 (diff)
Merge tag 'aspeed-4.16-devicetree' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into next/dt
Pull "ASPEED device tree updates for 4.16" from Joel Stanley: Clock driver support: Rework all platforms to use proper clock bindings. Linux should now boot upstream kernels on ast2400 and ast2500 platforms without out of tree patches. New systems: Witherspoon: OpenPower Power9 server manufactured by IBM that uses the ASPEED ast2500 Zaius: OpenPower Power9 server manufactured by Invatech that uses the ASPEED ast2500 Q71L: Intel Xeon server manufactured by Qanta that uses the ASPEED ast2400 We also see updates to the Palmetto and Romulus systems to bring them in line with the functionality of those above. The systems take advantage of recently added drivers for LPC Snoop device and the PWM/Tachometer fan controller. OpenBMC flash layout: The flash layout used OpenBMC systems is added and the device trees now use it. * tag 'aspeed-4.16-devicetree' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/joel/aspeed: ARM: dts: aspeed-evb: Add unit name to memory node ARM: dts: aspeed-plametto: Add flash layout and fix memory node ARM: dts: aspeed-romulus: Update Romulus system ARM: dts: aspeed: Add Qanta Q71L BMC machine ARM: dts: aspeed: Add Ingrasys Zaius BMC machine ARM: dts: aspeed: Add Witherspoon BMC machine ARM: dts: aspeed: Sort ASPEED entries in makefile ARM: dts: Add OpenBMC flash layout ARM: dts: aspeed: Update license headers ARM: dts: aspeed: Remove skeleton.dtsi ARM: dts: aspeed: Add LPC Snoop device ARM: dts: aspeed: Add PWM and tachometer node ARM: dts: aspeed: Add clock phandle to GPIO ARM: dts: aspeed: Add flash controller clocks ARM: dts: aspeed: Add watchdog clocks ARM: dts: aspeed: Add MAC clocks ARM: dts: aspeed: Add proper clock references ARM: dts: aspeed: Add LPC and child devices dt-bindings: gpio: Add ASPEED constants dt-bindings: clock: Add ASPEED constants Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clock/aspeed-clock.h52
-rw-r--r--include/dt-bindings/gpio/aspeed-gpio.h49
2 files changed, 101 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/aspeed-clock.h b/include/dt-bindings/clock/aspeed-clock.h
new file mode 100644
index 000000000000..d3558d897a4d
--- /dev/null
+++ b/include/dt-bindings/clock/aspeed-clock.h
@@ -0,0 +1,52 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
+
+#ifndef DT_BINDINGS_ASPEED_CLOCK_H
+#define DT_BINDINGS_ASPEED_CLOCK_H
+
+#define ASPEED_CLK_GATE_ECLK 0
+#define ASPEED_CLK_GATE_GCLK 1
+#define ASPEED_CLK_GATE_MCLK 2
+#define ASPEED_CLK_GATE_VCLK 3
+#define ASPEED_CLK_GATE_BCLK 4
+#define ASPEED_CLK_GATE_DCLK 5
+#define ASPEED_CLK_GATE_REFCLK 6
+#define ASPEED_CLK_GATE_USBPORT2CLK 7
+#define ASPEED_CLK_GATE_LCLK 8
+#define ASPEED_CLK_GATE_USBUHCICLK 9
+#define ASPEED_CLK_GATE_D1CLK 10
+#define ASPEED_CLK_GATE_YCLK 11
+#define ASPEED_CLK_GATE_USBPORT1CLK 12
+#define ASPEED_CLK_GATE_UART1CLK 13
+#define ASPEED_CLK_GATE_UART2CLK 14
+#define ASPEED_CLK_GATE_UART5CLK 15
+#define ASPEED_CLK_GATE_ESPICLK 16
+#define ASPEED_CLK_GATE_MAC1CLK 17
+#define ASPEED_CLK_GATE_MAC2CLK 18
+#define ASPEED_CLK_GATE_RSACLK 19
+#define ASPEED_CLK_GATE_UART3CLK 20
+#define ASPEED_CLK_GATE_UART4CLK 21
+#define ASPEED_CLK_GATE_SDCLKCLK 22
+#define ASPEED_CLK_GATE_LHCCLK 23
+#define ASPEED_CLK_HPLL 24
+#define ASPEED_CLK_AHB 25
+#define ASPEED_CLK_APB 26
+#define ASPEED_CLK_UART 27
+#define ASPEED_CLK_SDIO 28
+#define ASPEED_CLK_ECLK 29
+#define ASPEED_CLK_ECLK_MUX 30
+#define ASPEED_CLK_LHCLK 31
+#define ASPEED_CLK_MAC 32
+#define ASPEED_CLK_BCLK 33
+#define ASPEED_CLK_MPLL 34
+
+#define ASPEED_RESET_XDMA 0
+#define ASPEED_RESET_MCTP 1
+#define ASPEED_RESET_ADC 2
+#define ASPEED_RESET_JTAG_MASTER 3
+#define ASPEED_RESET_MIC 4
+#define ASPEED_RESET_PWM 5
+#define ASPEED_RESET_PCIVGA 6
+#define ASPEED_RESET_I2C 7
+#define ASPEED_RESET_AHB 8
+
+#endif
diff --git a/include/dt-bindings/gpio/aspeed-gpio.h b/include/dt-bindings/gpio/aspeed-gpio.h
new file mode 100644
index 000000000000..56fc4889b2c4
--- /dev/null
+++ b/include/dt-bindings/gpio/aspeed-gpio.h
@@ -0,0 +1,49 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * This header provides constants for binding aspeed,*-gpio.
+ *
+ * The first cell in Aspeed's GPIO specifier is the GPIO ID. The macros below
+ * provide names for this.
+ *
+ * The second cell contains standard flag values specified in gpio.h.
+ */
+
+#ifndef _DT_BINDINGS_GPIO_ASPEED_GPIO_H
+#define _DT_BINDINGS_GPIO_ASPEED_GPIO_H
+
+#include <dt-bindings/gpio/gpio.h>
+
+#define ASPEED_GPIO_PORT_A 0
+#define ASPEED_GPIO_PORT_B 1
+#define ASPEED_GPIO_PORT_C 2
+#define ASPEED_GPIO_PORT_D 3
+#define ASPEED_GPIO_PORT_E 4
+#define ASPEED_GPIO_PORT_F 5
+#define ASPEED_GPIO_PORT_G 6
+#define ASPEED_GPIO_PORT_H 7
+#define ASPEED_GPIO_PORT_I 8
+#define ASPEED_GPIO_PORT_J 9
+#define ASPEED_GPIO_PORT_K 10
+#define ASPEED_GPIO_PORT_L 11
+#define ASPEED_GPIO_PORT_M 12
+#define ASPEED_GPIO_PORT_N 13
+#define ASPEED_GPIO_PORT_O 14
+#define ASPEED_GPIO_PORT_P 15
+#define ASPEED_GPIO_PORT_Q 16
+#define ASPEED_GPIO_PORT_R 17
+#define ASPEED_GPIO_PORT_S 18
+#define ASPEED_GPIO_PORT_T 19
+#define ASPEED_GPIO_PORT_U 20
+#define ASPEED_GPIO_PORT_V 21
+#define ASPEED_GPIO_PORT_W 22
+#define ASPEED_GPIO_PORT_X 23
+#define ASPEED_GPIO_PORT_Y 24
+#define ASPEED_GPIO_PORT_Z 25
+#define ASPEED_GPIO_PORT_AA 26
+#define ASPEED_GPIO_PORT_AB 27
+#define ASPEED_GPIO_PORT_AC 28
+
+#define ASPEED_GPIO(port, offset) \
+ ((ASPEED_GPIO_PORT_##port * 8) + offset)
+
+#endif