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authorArnd Bergmann <arnd@arndb.de>2017-10-30 12:04:32 +0100
committerArnd Bergmann <arnd@arndb.de>2017-10-30 12:04:32 +0100
commitc4db01edbac83f8b06adefe6654f98951dad3ecb (patch)
treec852b9bc979bf311d05a53ec015de3f86eb053aa /include/dt-bindings
parent6ac5482ee67d7b959eeae081e2b514d125598113 (diff)
parent3e09b155d58e44e33a699650128f8c6c833cb320 (diff)
Merge tag 'tegra-for-4.15-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
Pull "dt-bindings: Updates for v4.15-rc1" from Thierry Reding: This contains the addition of a clock alias which will be used to fix the implementation of the SOR1 clock. Also included are the bindings for the Tegra186 BPMP thermal driver, a prerequisite for both the driver and device tree changes. * tag 'tegra-for-4.15-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: dt-bindings: Add bindings for nvidia,tegra186-bpmp-thermal dt-bindings: clock: tegra: Add sor1_out clock
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clock/tegra210-car.h1
-rw-r--r--include/dt-bindings/thermal/tegra186-bpmp-thermal.h14
2 files changed, 15 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/tegra210-car.h b/include/dt-bindings/clock/tegra210-car.h
index 46689cd3750b..43c4a8407333 100644
--- a/include/dt-bindings/clock/tegra210-car.h
+++ b/include/dt-bindings/clock/tegra210-car.h
@@ -309,6 +309,7 @@
#define TEGRA210_CLK_BLINK 280
/* 281 */
#define TEGRA210_CLK_SOR1_SRC 282
+#define TEGRA210_CLK_SOR1_OUT 282
/* 283 */
#define TEGRA210_CLK_XUSB_HOST_SRC 284
#define TEGRA210_CLK_XUSB_FALCON_SRC 285
diff --git a/include/dt-bindings/thermal/tegra186-bpmp-thermal.h b/include/dt-bindings/thermal/tegra186-bpmp-thermal.h
new file mode 100644
index 000000000000..a96b8fa31aab
--- /dev/null
+++ b/include/dt-bindings/thermal/tegra186-bpmp-thermal.h
@@ -0,0 +1,14 @@
+/*
+ * This header provides constants for binding nvidia,tegra186-bpmp-thermal.
+ */
+
+#ifndef _DT_BINDINGS_THERMAL_TEGRA186_BPMP_THERMAL_H
+#define _DT_BINDINGS_THERMAL_TEGRA186_BPMP_THERMAL_H
+
+#define TEGRA186_BPMP_THERMAL_ZONE_CPU 2
+#define TEGRA186_BPMP_THERMAL_ZONE_GPU 3
+#define TEGRA186_BPMP_THERMAL_ZONE_AUX 4
+#define TEGRA186_BPMP_THERMAL_ZONE_PLLX 5
+#define TEGRA186_BPMP_THERMAL_ZONE_AO 6
+
+#endif