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authorOliver Upton <oliver.upton@linux.dev>2023-10-30 20:18:23 +0000
committerOliver Upton <oliver.upton@linux.dev>2023-10-30 20:18:23 +0000
commit7ff7dfe946ab696a3335a98bdc30210f2b567825 (patch)
treeecfc2f2ea6318c8f51a29f8bc89c1e6ade2f58c8 /include/kvm
parentd47dcb67fcf619df971f2c6df6ce1a81426917b6 (diff)
parentae8d3522e5b7208d238c893a00957864536983dc (diff)
Merge branch kvm-arm64/pmevtyper-filter into kvmarm/next
* kvm-arm64/pmevtyper-filter: : Fixes to KVM's handling of the PMUv3 exception level filtering bits : : - NSH (count at EL2) and M (count at EL3) should be stateful when the : respective EL is advertised in the ID registers but have no effect on : event counting. : : - NSU and NSK modify the event filtering of EL0 and EL1, respectively. : Though the kernel may not use these bits, other KVM guests might. : Implement these bits exactly as written in the pseudocode if EL3 is : advertised. KVM: arm64: Add PMU event filter bits required if EL3 is implemented KVM: arm64: Make PMEVTYPER<n>_EL0.NSH RES0 if EL2 isn't advertised Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
Diffstat (limited to 'include/kvm')
-rw-r--r--include/kvm/arm_pmu.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/kvm/arm_pmu.h b/include/kvm/arm_pmu.h
index 3546ebc469ad..4df71290b676 100644
--- a/include/kvm/arm_pmu.h
+++ b/include/kvm/arm_pmu.h
@@ -101,6 +101,7 @@ void kvm_vcpu_pmu_resync_el0(void);
})
u8 kvm_arm_pmu_get_pmuver_limit(void);
+u64 kvm_pmu_evtyper_mask(struct kvm *kvm);
#else
struct kvm_pmu {
@@ -172,6 +173,10 @@ static inline u8 kvm_arm_pmu_get_pmuver_limit(void)
{
return 0;
}
+static inline u64 kvm_pmu_evtyper_mask(struct kvm *kvm)
+{
+ return 0;
+}
static inline void kvm_vcpu_pmu_resync_el0(void) {}
#endif